dm writecache: add cond_resched to loop in persistent_memory_claim()
[linux/fpc-iii.git] / drivers / usb / phy / phy-jz4770.c
blob3ea1f5b9bcf8e48bfbf38665f82ae3a4069598c1
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Ingenic JZ4770 USB PHY driver
4 * Copyright (c) Paul Cercueil <paul@crapouillou.net>
5 */
7 #include <linux/clk.h>
8 #include <linux/io.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/regulator/consumer.h>
12 #include <linux/usb/otg.h>
13 #include <linux/usb/phy.h>
15 #define REG_USBPCR_OFFSET 0x00
16 #define REG_USBRDT_OFFSET 0x04
17 #define REG_USBVBFIL_OFFSET 0x08
18 #define REG_USBPCR1_OFFSET 0x0c
20 /* USBPCR */
21 #define USBPCR_USB_MODE BIT(31)
22 #define USBPCR_AVLD_REG BIT(30)
23 #define USBPCR_INCRM BIT(27)
24 #define USBPCR_CLK12_EN BIT(26)
25 #define USBPCR_COMMONONN BIT(25)
26 #define USBPCR_VBUSVLDEXT BIT(24)
27 #define USBPCR_VBUSVLDEXTSEL BIT(23)
28 #define USBPCR_POR BIT(22)
29 #define USBPCR_SIDDQ BIT(21)
30 #define USBPCR_OTG_DISABLE BIT(20)
31 #define USBPCR_TXPREEMPHTUNE BIT(6)
33 #define USBPCR_IDPULLUP_LSB 28
34 #define USBPCR_IDPULLUP_MASK GENMASK(29, USBPCR_IDPULLUP_LSB)
35 #define USBPCR_IDPULLUP_ALWAYS (3 << USBPCR_IDPULLUP_LSB)
36 #define USBPCR_IDPULLUP_SUSPEND (1 << USBPCR_IDPULLUP_LSB)
37 #define USBPCR_IDPULLUP_OTG (0 << USBPCR_IDPULLUP_LSB)
39 #define USBPCR_COMPDISTUNE_LSB 17
40 #define USBPCR_COMPDISTUNE_MASK GENMASK(19, USBPCR_COMPDISTUNE_LSB)
41 #define USBPCR_COMPDISTUNE_DFT 4
43 #define USBPCR_OTGTUNE_LSB 14
44 #define USBPCR_OTGTUNE_MASK GENMASK(16, USBPCR_OTGTUNE_LSB)
45 #define USBPCR_OTGTUNE_DFT 4
47 #define USBPCR_SQRXTUNE_LSB 11
48 #define USBPCR_SQRXTUNE_MASK GENMASK(13, USBPCR_SQRXTUNE_LSB)
49 #define USBPCR_SQRXTUNE_DFT 3
51 #define USBPCR_TXFSLSTUNE_LSB 7
52 #define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB)
53 #define USBPCR_TXFSLSTUNE_DFT 3
55 #define USBPCR_TXRISETUNE_LSB 4
56 #define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB)
57 #define USBPCR_TXRISETUNE_DFT 3
59 #define USBPCR_TXVREFTUNE_LSB 0
60 #define USBPCR_TXVREFTUNE_MASK GENMASK(3, USBPCR_TXVREFTUNE_LSB)
61 #define USBPCR_TXVREFTUNE_DFT 5
63 /* USBRDT */
64 #define USBRDT_VBFIL_LD_EN BIT(25)
65 #define USBRDT_IDDIG_EN BIT(24)
66 #define USBRDT_IDDIG_REG BIT(23)
68 #define USBRDT_USBRDT_LSB 0
69 #define USBRDT_USBRDT_MASK GENMASK(22, USBRDT_USBRDT_LSB)
71 /* USBPCR1 */
72 #define USBPCR1_UHC_POWON BIT(5)
74 struct jz4770_phy {
75 struct usb_phy phy;
76 struct usb_otg otg;
77 struct device *dev;
78 void __iomem *base;
79 struct clk *clk;
80 struct regulator *vcc_supply;
83 static inline struct jz4770_phy *otg_to_jz4770_phy(struct usb_otg *otg)
85 return container_of(otg, struct jz4770_phy, otg);
88 static inline struct jz4770_phy *phy_to_jz4770_phy(struct usb_phy *phy)
90 return container_of(phy, struct jz4770_phy, phy);
93 static int jz4770_phy_set_peripheral(struct usb_otg *otg,
94 struct usb_gadget *gadget)
96 struct jz4770_phy *priv = otg_to_jz4770_phy(otg);
97 u32 reg;
99 reg = readl(priv->base + REG_USBPCR_OFFSET);
100 reg &= ~USBPCR_USB_MODE;
101 reg |= USBPCR_VBUSVLDEXT | USBPCR_VBUSVLDEXTSEL | USBPCR_OTG_DISABLE;
102 writel(reg, priv->base + REG_USBPCR_OFFSET);
104 return 0;
107 static int jz4770_phy_set_host(struct usb_otg *otg, struct usb_bus *host)
109 struct jz4770_phy *priv = otg_to_jz4770_phy(otg);
110 u32 reg;
112 reg = readl(priv->base + REG_USBPCR_OFFSET);
113 reg &= ~(USBPCR_VBUSVLDEXT | USBPCR_VBUSVLDEXTSEL | USBPCR_OTG_DISABLE);
114 reg |= USBPCR_USB_MODE;
115 writel(reg, priv->base + REG_USBPCR_OFFSET);
117 return 0;
120 static int jz4770_phy_init(struct usb_phy *phy)
122 struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
123 int err;
124 u32 reg;
126 err = regulator_enable(priv->vcc_supply);
127 if (err) {
128 dev_err(priv->dev, "Unable to enable VCC: %d", err);
129 return err;
132 err = clk_prepare_enable(priv->clk);
133 if (err) {
134 dev_err(priv->dev, "Unable to start clock: %d", err);
135 return err;
138 reg = USBPCR_AVLD_REG | USBPCR_COMMONONN | USBPCR_IDPULLUP_ALWAYS |
139 (USBPCR_COMPDISTUNE_DFT << USBPCR_COMPDISTUNE_LSB) |
140 (USBPCR_OTGTUNE_DFT << USBPCR_OTGTUNE_LSB) |
141 (USBPCR_SQRXTUNE_DFT << USBPCR_SQRXTUNE_LSB) |
142 (USBPCR_TXFSLSTUNE_DFT << USBPCR_TXFSLSTUNE_LSB) |
143 (USBPCR_TXRISETUNE_DFT << USBPCR_TXRISETUNE_LSB) |
144 (USBPCR_TXVREFTUNE_DFT << USBPCR_TXVREFTUNE_LSB) |
145 USBPCR_POR;
146 writel(reg, priv->base + REG_USBPCR_OFFSET);
148 /* Wait for PHY to reset */
149 usleep_range(30, 300);
150 writel(reg & ~USBPCR_POR, priv->base + REG_USBPCR_OFFSET);
151 usleep_range(300, 1000);
153 return 0;
156 static void jz4770_phy_shutdown(struct usb_phy *phy)
158 struct jz4770_phy *priv = phy_to_jz4770_phy(phy);
160 clk_disable_unprepare(priv->clk);
161 regulator_disable(priv->vcc_supply);
164 static void jz4770_phy_remove(void *phy)
166 usb_remove_phy(phy);
169 static int jz4770_phy_probe(struct platform_device *pdev)
171 struct device *dev = &pdev->dev;
172 struct jz4770_phy *priv;
173 int err;
175 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
176 if (!priv)
177 return -ENOMEM;
179 platform_set_drvdata(pdev, priv);
180 priv->dev = dev;
181 priv->phy.dev = dev;
182 priv->phy.otg = &priv->otg;
183 priv->phy.label = "jz4770-phy";
184 priv->phy.init = jz4770_phy_init;
185 priv->phy.shutdown = jz4770_phy_shutdown;
187 priv->otg.state = OTG_STATE_UNDEFINED;
188 priv->otg.usb_phy = &priv->phy;
189 priv->otg.set_host = jz4770_phy_set_host;
190 priv->otg.set_peripheral = jz4770_phy_set_peripheral;
192 priv->base = devm_platform_ioremap_resource(pdev, 0);
193 if (IS_ERR(priv->base)) {
194 dev_err(dev, "Failed to map registers");
195 return PTR_ERR(priv->base);
198 priv->clk = devm_clk_get(dev, NULL);
199 if (IS_ERR(priv->clk)) {
200 err = PTR_ERR(priv->clk);
201 if (err != -EPROBE_DEFER)
202 dev_err(dev, "Failed to get clock");
203 return err;
206 priv->vcc_supply = devm_regulator_get(dev, "vcc");
207 if (IS_ERR(priv->vcc_supply)) {
208 err = PTR_ERR(priv->vcc_supply);
209 if (err != -EPROBE_DEFER)
210 dev_err(dev, "failed to get regulator");
211 return err;
214 err = usb_add_phy(&priv->phy, USB_PHY_TYPE_USB2);
215 if (err) {
216 if (err != -EPROBE_DEFER)
217 dev_err(dev, "Unable to register PHY");
218 return err;
221 return devm_add_action_or_reset(dev, jz4770_phy_remove, &priv->phy);
224 #ifdef CONFIG_OF
225 static const struct of_device_id jz4770_phy_of_matches[] = {
226 { .compatible = "ingenic,jz4770-phy" },
229 MODULE_DEVICE_TABLE(of, jz4770_phy_of_matches);
230 #endif
232 static struct platform_driver jz4770_phy_driver = {
233 .probe = jz4770_phy_probe,
234 .driver = {
235 .name = "jz4770-phy",
236 .of_match_table = of_match_ptr(jz4770_phy_of_matches),
239 module_platform_driver(jz4770_phy_driver);
241 MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
242 MODULE_DESCRIPTION("Ingenic JZ4770 USB PHY driver");
243 MODULE_LICENSE("GPL");