PM / yenta: Split resume into early and late parts (rev. 4)
[linux/fpc-iii.git] / net / dsa / mv88e6xxx.h
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1 /*
2 * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
3 * Copyright (c) 2008 Marvell Semiconductor
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
11 #ifndef __MV88E6XXX_H
12 #define __MV88E6XXX_H
14 #define REG_PORT(p) (0x10 + (p))
15 #define REG_GLOBAL 0x1b
16 #define REG_GLOBAL2 0x1c
18 struct mv88e6xxx_priv_state {
20 * When using multi-chip addressing, this mutex protects
21 * access to the indirect access registers. (In single-chip
22 * mode, this mutex is effectively useless.)
24 struct mutex smi_mutex;
26 #ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
28 * Handles automatic disabling and re-enabling of the PHY
29 * polling unit.
31 struct mutex ppu_mutex;
32 int ppu_disabled;
33 struct work_struct ppu_work;
34 struct timer_list ppu_timer;
35 #endif
38 * This mutex serialises access to the statistics unit.
39 * Hold this mutex over snapshot + dump sequences.
41 struct mutex stats_mutex;
44 struct mv88e6xxx_hw_stat {
45 char string[ETH_GSTRING_LEN];
46 int sizeof_stat;
47 int reg;
50 int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
51 int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
52 int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
53 int reg, u16 val);
54 int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
55 int mv88e6xxx_config_prio(struct dsa_switch *ds);
56 int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
57 int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
58 int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
59 int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
60 void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
61 int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
62 int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
63 int regnum, u16 val);
64 void mv88e6xxx_poll_link(struct dsa_switch *ds);
65 void mv88e6xxx_get_strings(struct dsa_switch *ds,
66 int nr_stats, struct mv88e6xxx_hw_stat *stats,
67 int port, uint8_t *data);
68 void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
69 int nr_stats, struct mv88e6xxx_hw_stat *stats,
70 int port, uint64_t *data);
72 #define REG_READ(addr, reg) \
73 ({ \
74 int __ret; \
76 __ret = mv88e6xxx_reg_read(ds, addr, reg); \
77 if (__ret < 0) \
78 return __ret; \
79 __ret; \
82 #define REG_WRITE(addr, reg, val) \
83 ({ \
84 int __ret; \
86 __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
87 if (__ret < 0) \
88 return __ret; \
93 #endif