2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #define pr_fmt(fmt) "software IO TLB: " fmt
22 #include <linux/cache.h>
23 #include <linux/dma-mapping.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
39 #include <linux/init.h>
40 #include <linux/bootmem.h>
41 #include <linux/iommu-helper.h>
43 #define CREATE_TRACE_POINTS
44 #include <trace/events/swiotlb.h>
46 #define OFFSET(val,align) ((unsigned long) \
47 ( (val) & ( (align) - 1)))
49 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
52 * Minimum IO TLB size to bother booting with. Systems with mainly
53 * 64bit capable cards will only lightly use the swiotlb. If we can't
54 * allocate a contiguous 1MB, we're probably in trouble anyway.
56 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
58 enum swiotlb_force swiotlb_force
;
61 * Used to do a quick range check in swiotlb_tbl_unmap_single and
62 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
65 static phys_addr_t io_tlb_start
, io_tlb_end
;
68 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
69 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
71 static unsigned long io_tlb_nslabs
;
74 * When the IOMMU overflows we return a fallback buffer. This sets the size.
76 static unsigned long io_tlb_overflow
= 32*1024;
78 static phys_addr_t io_tlb_overflow_buffer
;
81 * This is a free list describing the number of free entries available from
84 static unsigned int *io_tlb_list
;
85 static unsigned int io_tlb_index
;
88 * We need to save away the original address corresponding to a mapped entry
89 * for the sync operations.
91 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
92 static phys_addr_t
*io_tlb_orig_addr
;
95 * Protect the above data structures in the map and unmap calls
97 static DEFINE_SPINLOCK(io_tlb_lock
);
99 static int late_alloc
;
102 setup_io_tlb_npages(char *str
)
105 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
111 if (!strcmp(str
, "force")) {
112 swiotlb_force
= SWIOTLB_FORCE
;
113 } else if (!strcmp(str
, "noforce")) {
114 swiotlb_force
= SWIOTLB_NO_FORCE
;
120 early_param("swiotlb", setup_io_tlb_npages
);
121 /* make io_tlb_overflow tunable too? */
123 unsigned long swiotlb_nr_tbl(void)
125 return io_tlb_nslabs
;
127 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl
);
129 /* default to 64MB */
130 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
131 unsigned long swiotlb_size_or_default(void)
135 size
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
137 return size
? size
: (IO_TLB_DEFAULT_SIZE
);
140 /* Note that this doesn't work with highmem page */
141 static dma_addr_t
swiotlb_virt_to_bus(struct device
*hwdev
,
142 volatile void *address
)
144 return phys_to_dma(hwdev
, virt_to_phys(address
));
147 static bool no_iotlb_memory
;
149 void swiotlb_print_info(void)
151 unsigned long bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
153 if (no_iotlb_memory
) {
154 pr_warn("No low mem\n");
158 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
159 (unsigned long long)io_tlb_start
,
160 (unsigned long long)io_tlb_end
,
164 int __init
swiotlb_init_with_tbl(char *tlb
, unsigned long nslabs
, int verbose
)
166 void *v_overflow_buffer
;
167 unsigned long i
, bytes
;
169 bytes
= nslabs
<< IO_TLB_SHIFT
;
171 io_tlb_nslabs
= nslabs
;
172 io_tlb_start
= __pa(tlb
);
173 io_tlb_end
= io_tlb_start
+ bytes
;
176 * Get the overflow emergency buffer
178 v_overflow_buffer
= memblock_virt_alloc_low_nopanic(
179 PAGE_ALIGN(io_tlb_overflow
),
181 if (!v_overflow_buffer
)
184 io_tlb_overflow_buffer
= __pa(v_overflow_buffer
);
187 * Allocate and initialize the free list array. This array is used
188 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
189 * between io_tlb_start and io_tlb_end.
191 io_tlb_list
= memblock_virt_alloc(
192 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)),
194 io_tlb_orig_addr
= memblock_virt_alloc(
195 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)),
197 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
198 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
199 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
204 swiotlb_print_info();
210 * Statically reserve bounce buffer space and initialize bounce buffer data
211 * structures for the software IO TLB used to implement the DMA API.
214 swiotlb_init(int verbose
)
216 size_t default_size
= IO_TLB_DEFAULT_SIZE
;
217 unsigned char *vstart
;
220 if (!io_tlb_nslabs
) {
221 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
222 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
225 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
227 /* Get IO TLB memory from the low pages */
228 vstart
= memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes
), PAGE_SIZE
);
229 if (vstart
&& !swiotlb_init_with_tbl(vstart
, io_tlb_nslabs
, verbose
))
233 memblock_free_early(io_tlb_start
,
234 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
235 pr_warn("Cannot allocate buffer");
236 no_iotlb_memory
= true;
240 * Systems with larger DMA zones (those that don't support ISA) can
241 * initialize the swiotlb later using the slab allocator if needed.
242 * This should be just like above, but with some error catching.
245 swiotlb_late_init_with_default_size(size_t default_size
)
247 unsigned long bytes
, req_nslabs
= io_tlb_nslabs
;
248 unsigned char *vstart
= NULL
;
252 if (!io_tlb_nslabs
) {
253 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
254 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
258 * Get IO TLB memory from the low pages
260 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
261 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
262 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
264 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
265 vstart
= (void *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
,
273 io_tlb_nslabs
= req_nslabs
;
276 if (order
!= get_order(bytes
)) {
277 pr_warn("only able to allocate %ld MB\n",
278 (PAGE_SIZE
<< order
) >> 20);
279 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
281 rc
= swiotlb_late_init_with_tbl(vstart
, io_tlb_nslabs
);
283 free_pages((unsigned long)vstart
, order
);
288 swiotlb_late_init_with_tbl(char *tlb
, unsigned long nslabs
)
290 unsigned long i
, bytes
;
291 unsigned char *v_overflow_buffer
;
293 bytes
= nslabs
<< IO_TLB_SHIFT
;
295 io_tlb_nslabs
= nslabs
;
296 io_tlb_start
= virt_to_phys(tlb
);
297 io_tlb_end
= io_tlb_start
+ bytes
;
299 memset(tlb
, 0, bytes
);
302 * Get the overflow emergency buffer
304 v_overflow_buffer
= (void *)__get_free_pages(GFP_DMA
,
305 get_order(io_tlb_overflow
));
306 if (!v_overflow_buffer
)
309 io_tlb_overflow_buffer
= virt_to_phys(v_overflow_buffer
);
312 * Allocate and initialize the free list array. This array is used
313 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
314 * between io_tlb_start and io_tlb_end.
316 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
317 get_order(io_tlb_nslabs
* sizeof(int)));
321 io_tlb_orig_addr
= (phys_addr_t
*)
322 __get_free_pages(GFP_KERNEL
,
323 get_order(io_tlb_nslabs
*
324 sizeof(phys_addr_t
)));
325 if (!io_tlb_orig_addr
)
328 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
329 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
330 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
334 swiotlb_print_info();
341 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
345 free_pages((unsigned long)v_overflow_buffer
,
346 get_order(io_tlb_overflow
));
347 io_tlb_overflow_buffer
= 0;
355 void __init
swiotlb_free(void)
357 if (!io_tlb_orig_addr
)
361 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer
),
362 get_order(io_tlb_overflow
));
363 free_pages((unsigned long)io_tlb_orig_addr
,
364 get_order(io_tlb_nslabs
* sizeof(phys_addr_t
)));
365 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
367 free_pages((unsigned long)phys_to_virt(io_tlb_start
),
368 get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
));
370 memblock_free_late(io_tlb_overflow_buffer
,
371 PAGE_ALIGN(io_tlb_overflow
));
372 memblock_free_late(__pa(io_tlb_orig_addr
),
373 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)));
374 memblock_free_late(__pa(io_tlb_list
),
375 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)));
376 memblock_free_late(io_tlb_start
,
377 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
382 int is_swiotlb_buffer(phys_addr_t paddr
)
384 return paddr
>= io_tlb_start
&& paddr
< io_tlb_end
;
388 * Bounce: copy the swiotlb buffer back to the original dma location
390 static void swiotlb_bounce(phys_addr_t orig_addr
, phys_addr_t tlb_addr
,
391 size_t size
, enum dma_data_direction dir
)
393 unsigned long pfn
= PFN_DOWN(orig_addr
);
394 unsigned char *vaddr
= phys_to_virt(tlb_addr
);
396 if (PageHighMem(pfn_to_page(pfn
))) {
397 /* The buffer does not have a mapping. Map it in and copy */
398 unsigned int offset
= orig_addr
& ~PAGE_MASK
;
404 sz
= min_t(size_t, PAGE_SIZE
- offset
, size
);
406 local_irq_save(flags
);
407 buffer
= kmap_atomic(pfn_to_page(pfn
));
408 if (dir
== DMA_TO_DEVICE
)
409 memcpy(vaddr
, buffer
+ offset
, sz
);
411 memcpy(buffer
+ offset
, vaddr
, sz
);
412 kunmap_atomic(buffer
);
413 local_irq_restore(flags
);
420 } else if (dir
== DMA_TO_DEVICE
) {
421 memcpy(vaddr
, phys_to_virt(orig_addr
), size
);
423 memcpy(phys_to_virt(orig_addr
), vaddr
, size
);
427 phys_addr_t
swiotlb_tbl_map_single(struct device
*hwdev
,
428 dma_addr_t tbl_dma_addr
,
429 phys_addr_t orig_addr
, size_t size
,
430 enum dma_data_direction dir
)
433 phys_addr_t tlb_addr
;
434 unsigned int nslots
, stride
, index
, wrap
;
437 unsigned long offset_slots
;
438 unsigned long max_slots
;
441 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
443 mask
= dma_get_seg_boundary(hwdev
);
445 tbl_dma_addr
&= mask
;
447 offset_slots
= ALIGN(tbl_dma_addr
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
450 * Carefully handle integer overflow which can occur when mask == ~0UL.
453 ? ALIGN(mask
+ 1, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
454 : 1UL << (BITS_PER_LONG
- IO_TLB_SHIFT
);
457 * For mappings greater than or equal to a page, we limit the stride
458 * (and hence alignment) to a page size.
460 nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
461 if (size
>= PAGE_SIZE
)
462 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
469 * Find suitable number of IO TLB entries size that will fit this
470 * request and allocate a buffer from that IO TLB pool.
472 spin_lock_irqsave(&io_tlb_lock
, flags
);
473 index
= ALIGN(io_tlb_index
, stride
);
474 if (index
>= io_tlb_nslabs
)
479 while (iommu_is_span_boundary(index
, nslots
, offset_slots
,
482 if (index
>= io_tlb_nslabs
)
489 * If we find a slot that indicates we have 'nslots' number of
490 * contiguous buffers, we allocate the buffers from that slot
491 * and mark the entries as '0' indicating unavailable.
493 if (io_tlb_list
[index
] >= nslots
) {
496 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
498 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
- 1) && io_tlb_list
[i
]; i
--)
499 io_tlb_list
[i
] = ++count
;
500 tlb_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
503 * Update the indices to avoid searching in the next
506 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
507 ? (index
+ nslots
) : 0);
512 if (index
>= io_tlb_nslabs
)
514 } while (index
!= wrap
);
517 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
518 if (printk_ratelimit())
519 dev_warn(hwdev
, "swiotlb buffer is full (sz: %zd bytes)\n", size
);
520 return SWIOTLB_MAP_ERROR
;
522 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
525 * Save away the mapping from the original address to the DMA address.
526 * This is needed when we sync the memory. Then we sync the buffer if
529 for (i
= 0; i
< nslots
; i
++)
530 io_tlb_orig_addr
[index
+i
] = orig_addr
+ (i
<< IO_TLB_SHIFT
);
531 if (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
532 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_TO_DEVICE
);
536 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single
);
539 * Allocates bounce buffer and returns its kernel virtual address.
543 map_single(struct device
*hwdev
, phys_addr_t phys
, size_t size
,
544 enum dma_data_direction dir
)
546 dma_addr_t start_dma_addr
;
548 if (swiotlb_force
== SWIOTLB_NO_FORCE
) {
549 dev_warn_ratelimited(hwdev
, "Cannot do DMA to address %pa\n",
551 return SWIOTLB_MAP_ERROR
;
554 start_dma_addr
= phys_to_dma(hwdev
, io_tlb_start
);
555 return swiotlb_tbl_map_single(hwdev
, start_dma_addr
, phys
, size
, dir
);
559 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
561 void swiotlb_tbl_unmap_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
562 size_t size
, enum dma_data_direction dir
)
565 int i
, count
, nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
566 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
567 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
570 * First, sync the memory before unmapping the entry
572 if (orig_addr
!= INVALID_PHYS_ADDR
&&
573 ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
574 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_FROM_DEVICE
);
577 * Return the buffer to the free list by setting the corresponding
578 * entries to indicate the number of contiguous entries available.
579 * While returning the entries to the free list, we merge the entries
580 * with slots below and above the pool being returned.
582 spin_lock_irqsave(&io_tlb_lock
, flags
);
584 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
585 io_tlb_list
[index
+ nslots
] : 0);
587 * Step 1: return the slots to the free list, merging the
588 * slots with superceeding slots
590 for (i
= index
+ nslots
- 1; i
>= index
; i
--) {
591 io_tlb_list
[i
] = ++count
;
592 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
595 * Step 2: merge the returned slots with the preceding slots,
596 * if available (non zero)
598 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
599 io_tlb_list
[i
] = ++count
;
601 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
603 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single
);
605 void swiotlb_tbl_sync_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
606 size_t size
, enum dma_data_direction dir
,
607 enum dma_sync_target target
)
609 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
610 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
612 if (orig_addr
== INVALID_PHYS_ADDR
)
614 orig_addr
+= (unsigned long)tlb_addr
& ((1 << IO_TLB_SHIFT
) - 1);
618 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
619 swiotlb_bounce(orig_addr
, tlb_addr
,
620 size
, DMA_FROM_DEVICE
);
622 BUG_ON(dir
!= DMA_TO_DEVICE
);
624 case SYNC_FOR_DEVICE
:
625 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
626 swiotlb_bounce(orig_addr
, tlb_addr
,
627 size
, DMA_TO_DEVICE
);
629 BUG_ON(dir
!= DMA_FROM_DEVICE
);
635 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single
);
638 swiotlb_alloc_coherent(struct device
*hwdev
, size_t size
,
639 dma_addr_t
*dma_handle
, gfp_t flags
)
643 int order
= get_order(size
);
644 u64 dma_mask
= DMA_BIT_MASK(32);
646 if (hwdev
&& hwdev
->coherent_dma_mask
)
647 dma_mask
= hwdev
->coherent_dma_mask
;
649 ret
= (void *)__get_free_pages(flags
, order
);
651 dev_addr
= swiotlb_virt_to_bus(hwdev
, ret
);
652 if (dev_addr
+ size
- 1 > dma_mask
) {
654 * The allocated memory isn't reachable by the device.
656 free_pages((unsigned long) ret
, order
);
662 * We are either out of memory or the device can't DMA to
663 * GFP_DMA memory; fall back on map_single(), which
664 * will grab memory from the lowest available address range.
666 phys_addr_t paddr
= map_single(hwdev
, 0, size
, DMA_FROM_DEVICE
);
667 if (paddr
== SWIOTLB_MAP_ERROR
)
670 ret
= phys_to_virt(paddr
);
671 dev_addr
= phys_to_dma(hwdev
, paddr
);
673 /* Confirm address can be DMA'd by device */
674 if (dev_addr
+ size
- 1 > dma_mask
) {
675 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
676 (unsigned long long)dma_mask
,
677 (unsigned long long)dev_addr
);
679 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
680 swiotlb_tbl_unmap_single(hwdev
, paddr
,
681 size
, DMA_TO_DEVICE
);
686 *dma_handle
= dev_addr
;
687 memset(ret
, 0, size
);
692 pr_warn("coherent allocation failed for device %s size=%zu\n",
693 dev_name(hwdev
), size
);
698 EXPORT_SYMBOL(swiotlb_alloc_coherent
);
701 swiotlb_free_coherent(struct device
*hwdev
, size_t size
, void *vaddr
,
704 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
706 WARN_ON(irqs_disabled());
707 if (!is_swiotlb_buffer(paddr
))
708 free_pages((unsigned long)vaddr
, get_order(size
));
710 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
711 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, DMA_TO_DEVICE
);
713 EXPORT_SYMBOL(swiotlb_free_coherent
);
716 swiotlb_full(struct device
*dev
, size_t size
, enum dma_data_direction dir
,
719 if (swiotlb_force
== SWIOTLB_NO_FORCE
)
723 * Ran out of IOMMU space for this operation. This is very bad.
724 * Unfortunately the drivers cannot handle this operation properly.
725 * unless they check for dma_mapping_error (most don't)
726 * When the mapping is small enough return a static buffer to limit
727 * the damage, or panic when the transfer is too big.
729 printk(KERN_ERR
"DMA: Out of SW-IOMMU space for %zu bytes at "
730 "device %s\n", size
, dev
? dev_name(dev
) : "?");
732 if (size
<= io_tlb_overflow
|| !do_panic
)
735 if (dir
== DMA_BIDIRECTIONAL
)
736 panic("DMA: Random memory could be DMA accessed\n");
737 if (dir
== DMA_FROM_DEVICE
)
738 panic("DMA: Random memory could be DMA written\n");
739 if (dir
== DMA_TO_DEVICE
)
740 panic("DMA: Random memory could be DMA read\n");
744 * Map a single buffer of the indicated size for DMA in streaming mode. The
745 * physical address to use is returned.
747 * Once the device is given the dma address, the device owns this memory until
748 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
750 dma_addr_t
swiotlb_map_page(struct device
*dev
, struct page
*page
,
751 unsigned long offset
, size_t size
,
752 enum dma_data_direction dir
,
755 phys_addr_t map
, phys
= page_to_phys(page
) + offset
;
756 dma_addr_t dev_addr
= phys_to_dma(dev
, phys
);
758 BUG_ON(dir
== DMA_NONE
);
760 * If the address happens to be in the device's DMA window,
761 * we can safely return the device addr and not worry about bounce
764 if (dma_capable(dev
, dev_addr
, size
) && swiotlb_force
!= SWIOTLB_FORCE
)
767 trace_swiotlb_bounced(dev
, dev_addr
, size
, swiotlb_force
);
769 /* Oh well, have to allocate and map a bounce buffer. */
770 map
= map_single(dev
, phys
, size
, dir
);
771 if (map
== SWIOTLB_MAP_ERROR
) {
772 swiotlb_full(dev
, size
, dir
, 1);
773 return phys_to_dma(dev
, io_tlb_overflow_buffer
);
776 dev_addr
= phys_to_dma(dev
, map
);
778 /* Ensure that the address returned is DMA'ble */
779 if (!dma_capable(dev
, dev_addr
, size
)) {
780 swiotlb_tbl_unmap_single(dev
, map
, size
, dir
);
781 return phys_to_dma(dev
, io_tlb_overflow_buffer
);
786 EXPORT_SYMBOL_GPL(swiotlb_map_page
);
789 * Unmap a single streaming mode DMA translation. The dma_addr and size must
790 * match what was provided for in a previous swiotlb_map_page call. All
791 * other usages are undefined.
793 * After this call, reads by the cpu to the buffer are guaranteed to see
794 * whatever the device wrote there.
796 static void unmap_single(struct device
*hwdev
, dma_addr_t dev_addr
,
797 size_t size
, enum dma_data_direction dir
)
799 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
801 BUG_ON(dir
== DMA_NONE
);
803 if (is_swiotlb_buffer(paddr
)) {
804 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, dir
);
808 if (dir
!= DMA_FROM_DEVICE
)
812 * phys_to_virt doesn't work with hihgmem page but we could
813 * call dma_mark_clean() with hihgmem page here. However, we
814 * are fine since dma_mark_clean() is null on POWERPC. We can
815 * make dma_mark_clean() take a physical address if necessary.
817 dma_mark_clean(phys_to_virt(paddr
), size
);
820 void swiotlb_unmap_page(struct device
*hwdev
, dma_addr_t dev_addr
,
821 size_t size
, enum dma_data_direction dir
,
824 unmap_single(hwdev
, dev_addr
, size
, dir
);
826 EXPORT_SYMBOL_GPL(swiotlb_unmap_page
);
829 * Make physical memory consistent for a single streaming mode DMA translation
832 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
833 * using the cpu, yet do not wish to teardown the dma mapping, you must
834 * call this function before doing so. At the next point you give the dma
835 * address back to the card, you must first perform a
836 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
839 swiotlb_sync_single(struct device
*hwdev
, dma_addr_t dev_addr
,
840 size_t size
, enum dma_data_direction dir
,
841 enum dma_sync_target target
)
843 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
845 BUG_ON(dir
== DMA_NONE
);
847 if (is_swiotlb_buffer(paddr
)) {
848 swiotlb_tbl_sync_single(hwdev
, paddr
, size
, dir
, target
);
852 if (dir
!= DMA_FROM_DEVICE
)
855 dma_mark_clean(phys_to_virt(paddr
), size
);
859 swiotlb_sync_single_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
860 size_t size
, enum dma_data_direction dir
)
862 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_CPU
);
864 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu
);
867 swiotlb_sync_single_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
868 size_t size
, enum dma_data_direction dir
)
870 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_DEVICE
);
872 EXPORT_SYMBOL(swiotlb_sync_single_for_device
);
875 * Map a set of buffers described by scatterlist in streaming mode for DMA.
876 * This is the scatter-gather version of the above swiotlb_map_page
877 * interface. Here the scatter gather list elements are each tagged with the
878 * appropriate dma address and length. They are obtained via
879 * sg_dma_{address,length}(SG).
881 * NOTE: An implementation may be able to use a smaller number of
882 * DMA address/length pairs than there are SG table elements.
883 * (for example via virtual mapping capabilities)
884 * The routine returns the number of addr/length pairs actually
885 * used, at most nents.
887 * Device ownership issues as mentioned above for swiotlb_map_page are the
891 swiotlb_map_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
892 enum dma_data_direction dir
, unsigned long attrs
)
894 struct scatterlist
*sg
;
897 BUG_ON(dir
== DMA_NONE
);
899 for_each_sg(sgl
, sg
, nelems
, i
) {
900 phys_addr_t paddr
= sg_phys(sg
);
901 dma_addr_t dev_addr
= phys_to_dma(hwdev
, paddr
);
903 if (swiotlb_force
== SWIOTLB_FORCE
||
904 !dma_capable(hwdev
, dev_addr
, sg
->length
)) {
905 phys_addr_t map
= map_single(hwdev
, sg_phys(sg
),
907 if (map
== SWIOTLB_MAP_ERROR
) {
908 /* Don't panic here, we expect map_sg users
909 to do proper error handling. */
910 swiotlb_full(hwdev
, sg
->length
, dir
, 0);
911 swiotlb_unmap_sg_attrs(hwdev
, sgl
, i
, dir
,
916 sg
->dma_address
= phys_to_dma(hwdev
, map
);
918 sg
->dma_address
= dev_addr
;
919 sg_dma_len(sg
) = sg
->length
;
923 EXPORT_SYMBOL(swiotlb_map_sg_attrs
);
926 swiotlb_map_sg(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
927 enum dma_data_direction dir
)
929 return swiotlb_map_sg_attrs(hwdev
, sgl
, nelems
, dir
, 0);
931 EXPORT_SYMBOL(swiotlb_map_sg
);
934 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
935 * concerning calls here are the same as for swiotlb_unmap_page() above.
938 swiotlb_unmap_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
,
939 int nelems
, enum dma_data_direction dir
,
942 struct scatterlist
*sg
;
945 BUG_ON(dir
== DMA_NONE
);
947 for_each_sg(sgl
, sg
, nelems
, i
)
948 unmap_single(hwdev
, sg
->dma_address
, sg_dma_len(sg
), dir
);
951 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs
);
954 swiotlb_unmap_sg(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
955 enum dma_data_direction dir
)
957 return swiotlb_unmap_sg_attrs(hwdev
, sgl
, nelems
, dir
, 0);
959 EXPORT_SYMBOL(swiotlb_unmap_sg
);
962 * Make physical memory consistent for a set of streaming mode DMA translations
965 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
969 swiotlb_sync_sg(struct device
*hwdev
, struct scatterlist
*sgl
,
970 int nelems
, enum dma_data_direction dir
,
971 enum dma_sync_target target
)
973 struct scatterlist
*sg
;
976 for_each_sg(sgl
, sg
, nelems
, i
)
977 swiotlb_sync_single(hwdev
, sg
->dma_address
,
978 sg_dma_len(sg
), dir
, target
);
982 swiotlb_sync_sg_for_cpu(struct device
*hwdev
, struct scatterlist
*sg
,
983 int nelems
, enum dma_data_direction dir
)
985 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_CPU
);
987 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu
);
990 swiotlb_sync_sg_for_device(struct device
*hwdev
, struct scatterlist
*sg
,
991 int nelems
, enum dma_data_direction dir
)
993 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_DEVICE
);
995 EXPORT_SYMBOL(swiotlb_sync_sg_for_device
);
998 swiotlb_dma_mapping_error(struct device
*hwdev
, dma_addr_t dma_addr
)
1000 return (dma_addr
== phys_to_dma(hwdev
, io_tlb_overflow_buffer
));
1002 EXPORT_SYMBOL(swiotlb_dma_mapping_error
);
1005 * Return whether the given device DMA address mask can be supported
1006 * properly. For example, if your device can only drive the low 24-bits
1007 * during bus mastering, then you would pass 0x00ffffff as the mask to
1011 swiotlb_dma_supported(struct device
*hwdev
, u64 mask
)
1013 return phys_to_dma(hwdev
, io_tlb_end
- 1) <= mask
;
1015 EXPORT_SYMBOL(swiotlb_dma_supported
);