2 * RSB (Reduced Serial Bus) driver.
4 * Author: Chen-Yu Tsai <wens@csie.org>
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
10 * The RSB controller looks like an SMBus controller which only supports
11 * byte and word data transfers. But, it differs from standard SMBus
12 * protocol on several aspects:
13 * - it uses addresses set at runtime to address slaves. Runtime addresses
14 * are sent to slaves using their 12bit hardware addresses. Up to 15
15 * runtime addresses are available.
16 * - it adds a parity bit every 8bits of data and address for read and
17 * write accesses; this replaces the ack bit
18 * - only one read access is required to read a byte (instead of a write
19 * followed by a read access in standard SMBus protocol)
20 * - there's no Ack bit after each read access
22 * This means this bus cannot be used to interface with standard SMBus
23 * devices. Devices known to support this interface include the AXP223,
24 * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
26 * A description of the operation and wire protocol can be found in the
27 * RSB section of Allwinner's A80 user manual, which can be found at
29 * https://github.com/allwinner-zh/documents/tree/master/A80
31 * This document is officially released by Allwinner.
33 * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
37 #include <linux/clk.h>
38 #include <linux/clk/clk-conf.h>
39 #include <linux/device.h>
40 #include <linux/interrupt.h>
42 #include <linux/iopoll.h>
43 #include <linux/module.h>
45 #include <linux/of_irq.h>
46 #include <linux/of_platform.h>
47 #include <linux/platform_device.h>
48 #include <linux/regmap.h>
49 #include <linux/reset.h>
50 #include <linux/slab.h>
51 #include <linux/sunxi-rsb.h>
52 #include <linux/types.h>
55 #define RSB_CTRL 0x0 /* Global control */
56 #define RSB_CCR 0x4 /* Clock control */
57 #define RSB_INTE 0x8 /* Interrupt controls */
58 #define RSB_INTS 0xc /* Interrupt status */
59 #define RSB_ADDR 0x10 /* Address to send with read/write command */
60 #define RSB_DATA 0x1c /* Data to read/write */
61 #define RSB_LCR 0x24 /* Line control */
62 #define RSB_DMCR 0x28 /* Device mode (init) control */
63 #define RSB_CMD 0x2c /* RSB Command */
64 #define RSB_DAR 0x30 /* Device address / runtime address */
67 #define RSB_CTRL_START_TRANS BIT(7)
68 #define RSB_CTRL_ABORT_TRANS BIT(6)
69 #define RSB_CTRL_GLOBAL_INT_ENB BIT(1)
70 #define RSB_CTRL_SOFT_RST BIT(0)
73 #define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8)
74 #define RSB_CCR_MAX_CLK_DIV 0xff
75 #define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV)
78 #define RSB_INTS_TRANS_ERR_ACK BIT(16)
79 #define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf)
80 #define RSB_INTS_TRANS_ERR_DATA GENMASK(11, 8)
81 #define RSB_INTS_LOAD_BSY BIT(2)
82 #define RSB_INTS_TRANS_ERR BIT(1)
83 #define RSB_INTS_TRANS_OVER BIT(0)
86 #define RSB_LCR_SCL_STATE BIT(5)
87 #define RSB_LCR_SDA_STATE BIT(4)
88 #define RSB_LCR_SCL_CTL BIT(3)
89 #define RSB_LCR_SCL_CTL_EN BIT(2)
90 #define RSB_LCR_SDA_CTL BIT(1)
91 #define RSB_LCR_SDA_CTL_EN BIT(0)
93 /* DEVICE MODE CTRL field values */
94 #define RSB_DMCR_DEVICE_START BIT(31)
95 #define RSB_DMCR_MODE_DATA (0x7c << 16)
96 #define RSB_DMCR_MODE_REG (0x3e << 8)
97 #define RSB_DMCR_DEV_ADDR 0x00
100 #define RSB_CMD_RD8 0x8b
101 #define RSB_CMD_RD16 0x9c
102 #define RSB_CMD_RD32 0xa6
103 #define RSB_CMD_WR8 0x4e
104 #define RSB_CMD_WR16 0x59
105 #define RSB_CMD_WR32 0x63
106 #define RSB_CMD_STRA 0xe8
109 #define RSB_DAR_RTA(v) (((v) & 0xff) << 16)
110 #define RSB_DAR_DA(v) ((v) & 0xffff)
112 #define RSB_MAX_FREQ 20000000
114 #define RSB_CTRL_NAME "sunxi-rsb"
116 struct sunxi_rsb_addr_map
{
125 struct reset_control
*rstc
;
126 struct completion complete
;
131 /* bus / slave device related functions */
132 static struct bus_type sunxi_rsb_bus
;
134 static int sunxi_rsb_device_match(struct device
*dev
, struct device_driver
*drv
)
136 return of_driver_match_device(dev
, drv
);
139 static int sunxi_rsb_device_probe(struct device
*dev
)
141 const struct sunxi_rsb_driver
*drv
= to_sunxi_rsb_driver(dev
->driver
);
142 struct sunxi_rsb_device
*rdev
= to_sunxi_rsb_device(dev
);
152 irq
= of_irq_get(dev
->of_node
, 0);
154 if (irq
== -EPROBE_DEFER
)
162 ret
= of_clk_set_defaults(dev
->of_node
, false);
166 return drv
->probe(rdev
);
169 static int sunxi_rsb_device_remove(struct device
*dev
)
171 const struct sunxi_rsb_driver
*drv
= to_sunxi_rsb_driver(dev
->driver
);
173 return drv
->remove(to_sunxi_rsb_device(dev
));
176 static struct bus_type sunxi_rsb_bus
= {
177 .name
= RSB_CTRL_NAME
,
178 .match
= sunxi_rsb_device_match
,
179 .probe
= sunxi_rsb_device_probe
,
180 .remove
= sunxi_rsb_device_remove
,
183 static void sunxi_rsb_dev_release(struct device
*dev
)
185 struct sunxi_rsb_device
*rdev
= to_sunxi_rsb_device(dev
);
191 * sunxi_rsb_device_create() - allocate and add an RSB device
192 * @rsb: RSB controller
193 * @node: RSB slave device node
194 * @hwaddr: RSB slave hardware address
195 * @rtaddr: RSB slave runtime address
197 static struct sunxi_rsb_device
*sunxi_rsb_device_create(struct sunxi_rsb
*rsb
,
198 struct device_node
*node
, u16 hwaddr
, u8 rtaddr
)
201 struct sunxi_rsb_device
*rdev
;
203 rdev
= kzalloc(sizeof(*rdev
), GFP_KERNEL
);
205 return ERR_PTR(-ENOMEM
);
208 rdev
->hwaddr
= hwaddr
;
209 rdev
->rtaddr
= rtaddr
;
210 rdev
->dev
.bus
= &sunxi_rsb_bus
;
211 rdev
->dev
.parent
= rsb
->dev
;
212 rdev
->dev
.of_node
= node
;
213 rdev
->dev
.release
= sunxi_rsb_dev_release
;
215 dev_set_name(&rdev
->dev
, "%s-%x", RSB_CTRL_NAME
, hwaddr
);
217 err
= device_register(&rdev
->dev
);
219 dev_err(&rdev
->dev
, "Can't add %s, status %d\n",
220 dev_name(&rdev
->dev
), err
);
224 dev_dbg(&rdev
->dev
, "device %s registered\n", dev_name(&rdev
->dev
));
227 put_device(&rdev
->dev
);
233 * sunxi_rsb_device_unregister(): unregister an RSB device
234 * @rdev: rsb_device to be removed
236 static void sunxi_rsb_device_unregister(struct sunxi_rsb_device
*rdev
)
238 device_unregister(&rdev
->dev
);
241 static int sunxi_rsb_remove_devices(struct device
*dev
, void *data
)
243 struct sunxi_rsb_device
*rdev
= to_sunxi_rsb_device(dev
);
245 if (dev
->bus
== &sunxi_rsb_bus
)
246 sunxi_rsb_device_unregister(rdev
);
252 * sunxi_rsb_driver_register() - Register device driver with RSB core
253 * @rdrv: device driver to be associated with slave-device.
255 * This API will register the client driver with the RSB framework.
256 * It is typically called from the driver's module-init function.
258 int sunxi_rsb_driver_register(struct sunxi_rsb_driver
*rdrv
)
260 rdrv
->driver
.bus
= &sunxi_rsb_bus
;
261 return driver_register(&rdrv
->driver
);
263 EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register
);
265 /* common code that starts a transfer */
266 static int _sunxi_rsb_run_xfer(struct sunxi_rsb
*rsb
)
268 if (readl(rsb
->regs
+ RSB_CTRL
) & RSB_CTRL_START_TRANS
) {
269 dev_dbg(rsb
->dev
, "RSB transfer still in progress\n");
273 reinit_completion(&rsb
->complete
);
275 writel(RSB_INTS_LOAD_BSY
| RSB_INTS_TRANS_ERR
| RSB_INTS_TRANS_OVER
,
276 rsb
->regs
+ RSB_INTE
);
277 writel(RSB_CTRL_START_TRANS
| RSB_CTRL_GLOBAL_INT_ENB
,
278 rsb
->regs
+ RSB_CTRL
);
280 if (!wait_for_completion_io_timeout(&rsb
->complete
,
281 msecs_to_jiffies(100))) {
282 dev_dbg(rsb
->dev
, "RSB timeout\n");
284 /* abort the transfer */
285 writel(RSB_CTRL_ABORT_TRANS
, rsb
->regs
+ RSB_CTRL
);
287 /* clear any interrupt flags */
288 writel(readl(rsb
->regs
+ RSB_INTS
), rsb
->regs
+ RSB_INTS
);
293 if (rsb
->status
& RSB_INTS_LOAD_BSY
) {
294 dev_dbg(rsb
->dev
, "RSB busy\n");
298 if (rsb
->status
& RSB_INTS_TRANS_ERR
) {
299 if (rsb
->status
& RSB_INTS_TRANS_ERR_ACK
) {
300 dev_dbg(rsb
->dev
, "RSB slave nack\n");
304 if (rsb
->status
& RSB_INTS_TRANS_ERR_DATA
) {
305 dev_dbg(rsb
->dev
, "RSB transfer data error\n");
313 static int sunxi_rsb_read(struct sunxi_rsb
*rsb
, u8 rtaddr
, u8 addr
,
314 u32
*buf
, size_t len
)
333 dev_err(rsb
->dev
, "Invalid access width: %d\n", len
);
337 mutex_lock(&rsb
->lock
);
339 writel(addr
, rsb
->regs
+ RSB_ADDR
);
340 writel(RSB_DAR_RTA(rtaddr
), rsb
->regs
+ RSB_DAR
);
341 writel(cmd
, rsb
->regs
+ RSB_CMD
);
343 ret
= _sunxi_rsb_run_xfer(rsb
);
347 *buf
= readl(rsb
->regs
+ RSB_DATA
);
350 mutex_unlock(&rsb
->lock
);
355 static int sunxi_rsb_write(struct sunxi_rsb
*rsb
, u8 rtaddr
, u8 addr
,
356 const u32
*buf
, size_t len
)
375 dev_err(rsb
->dev
, "Invalid access width: %d\n", len
);
379 mutex_lock(&rsb
->lock
);
381 writel(addr
, rsb
->regs
+ RSB_ADDR
);
382 writel(RSB_DAR_RTA(rtaddr
), rsb
->regs
+ RSB_DAR
);
383 writel(*buf
, rsb
->regs
+ RSB_DATA
);
384 writel(cmd
, rsb
->regs
+ RSB_CMD
);
385 ret
= _sunxi_rsb_run_xfer(rsb
);
387 mutex_unlock(&rsb
->lock
);
392 /* RSB regmap functions */
393 struct sunxi_rsb_ctx
{
394 struct sunxi_rsb_device
*rdev
;
398 static int regmap_sunxi_rsb_reg_read(void *context
, unsigned int reg
,
401 struct sunxi_rsb_ctx
*ctx
= context
;
402 struct sunxi_rsb_device
*rdev
= ctx
->rdev
;
407 return sunxi_rsb_read(rdev
->rsb
, rdev
->rtaddr
, reg
, val
, ctx
->size
);
410 static int regmap_sunxi_rsb_reg_write(void *context
, unsigned int reg
,
413 struct sunxi_rsb_ctx
*ctx
= context
;
414 struct sunxi_rsb_device
*rdev
= ctx
->rdev
;
416 return sunxi_rsb_write(rdev
->rsb
, rdev
->rtaddr
, reg
, &val
, ctx
->size
);
419 static void regmap_sunxi_rsb_free_ctx(void *context
)
421 struct sunxi_rsb_ctx
*ctx
= context
;
426 static struct regmap_bus regmap_sunxi_rsb
= {
427 .reg_write
= regmap_sunxi_rsb_reg_write
,
428 .reg_read
= regmap_sunxi_rsb_reg_read
,
429 .free_context
= regmap_sunxi_rsb_free_ctx
,
430 .reg_format_endian_default
= REGMAP_ENDIAN_NATIVE
,
431 .val_format_endian_default
= REGMAP_ENDIAN_NATIVE
,
434 static struct sunxi_rsb_ctx
*regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device
*rdev
,
435 const struct regmap_config
*config
)
437 struct sunxi_rsb_ctx
*ctx
;
439 switch (config
->val_bits
) {
445 return ERR_PTR(-EINVAL
);
448 ctx
= kzalloc(sizeof(*ctx
), GFP_KERNEL
);
450 return ERR_PTR(-ENOMEM
);
453 ctx
->size
= config
->val_bits
/ 8;
458 struct regmap
*__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device
*rdev
,
459 const struct regmap_config
*config
,
460 struct lock_class_key
*lock_key
,
461 const char *lock_name
)
463 struct sunxi_rsb_ctx
*ctx
= regmap_sunxi_rsb_init_ctx(rdev
, config
);
466 return ERR_CAST(ctx
);
468 return __devm_regmap_init(&rdev
->dev
, ®map_sunxi_rsb
, ctx
, config
,
469 lock_key
, lock_name
);
471 EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb
);
473 /* RSB controller driver functions */
474 static irqreturn_t
sunxi_rsb_irq(int irq
, void *dev_id
)
476 struct sunxi_rsb
*rsb
= dev_id
;
479 status
= readl(rsb
->regs
+ RSB_INTS
);
480 rsb
->status
= status
;
482 /* Clear interrupts */
483 status
&= (RSB_INTS_LOAD_BSY
| RSB_INTS_TRANS_ERR
|
484 RSB_INTS_TRANS_OVER
);
485 writel(status
, rsb
->regs
+ RSB_INTS
);
487 complete(&rsb
->complete
);
492 static int sunxi_rsb_init_device_mode(struct sunxi_rsb
*rsb
)
497 /* send init sequence */
498 writel(RSB_DMCR_DEVICE_START
| RSB_DMCR_MODE_DATA
|
499 RSB_DMCR_MODE_REG
| RSB_DMCR_DEV_ADDR
, rsb
->regs
+ RSB_DMCR
);
501 readl_poll_timeout(rsb
->regs
+ RSB_DMCR
, reg
,
502 !(reg
& RSB_DMCR_DEVICE_START
), 100, 250000);
503 if (reg
& RSB_DMCR_DEVICE_START
)
506 /* clear interrupt status bits */
507 writel(readl(rsb
->regs
+ RSB_INTS
), rsb
->regs
+ RSB_INTS
);
513 * There are 15 valid runtime addresses, though Allwinner typically
514 * skips the first, for unknown reasons, and uses the following three.
516 * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
517 * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
519 * No designs with 2 RSB slave devices sharing identical hardware
520 * addresses on the same bus have been seen in the wild. All designs
521 * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
522 * there is one, and 0x45 for peripheral ICs.
524 * The hardware does not seem to support re-setting runtime addresses.
525 * Attempts to do so result in the slave devices returning a NACK.
526 * Hence we just hardcode the mapping here, like Allwinner does.
529 static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps
[] = {
530 { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
531 { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
532 { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
535 static u8
sunxi_rsb_get_rtaddr(u16 hwaddr
)
539 for (i
= 0; i
< ARRAY_SIZE(sunxi_rsb_addr_maps
); i
++)
540 if (hwaddr
== sunxi_rsb_addr_maps
[i
].hwaddr
)
541 return sunxi_rsb_addr_maps
[i
].rtaddr
;
543 return 0; /* 0 is an invalid runtime address */
546 static int of_rsb_register_devices(struct sunxi_rsb
*rsb
)
548 struct device
*dev
= rsb
->dev
;
549 struct device_node
*child
, *np
= dev
->of_node
;
557 /* Runtime addresses for all slaves should be set first */
558 for_each_available_child_of_node(np
, child
) {
559 dev_dbg(dev
, "setting child %s runtime address\n",
562 ret
= of_property_read_u32(child
, "reg", &hwaddr
);
564 dev_err(dev
, "%s: invalid 'reg' property: %d\n",
565 child
->full_name
, ret
);
569 rtaddr
= sunxi_rsb_get_rtaddr(hwaddr
);
571 dev_err(dev
, "%s: unknown hardware device address\n",
577 * Since no devices have been registered yet, we are the
578 * only ones using the bus, we can skip locking the bus.
581 /* setup command parameters */
582 writel(RSB_CMD_STRA
, rsb
->regs
+ RSB_CMD
);
583 writel(RSB_DAR_RTA(rtaddr
) | RSB_DAR_DA(hwaddr
),
584 rsb
->regs
+ RSB_DAR
);
587 ret
= _sunxi_rsb_run_xfer(rsb
);
589 dev_warn(dev
, "%s: set runtime address failed: %d\n",
590 child
->full_name
, ret
);
593 /* Then we start adding devices and probing them */
594 for_each_available_child_of_node(np
, child
) {
595 struct sunxi_rsb_device
*rdev
;
597 dev_dbg(dev
, "adding child %s\n", child
->full_name
);
599 ret
= of_property_read_u32(child
, "reg", &hwaddr
);
603 rtaddr
= sunxi_rsb_get_rtaddr(hwaddr
);
607 rdev
= sunxi_rsb_device_create(rsb
, child
, hwaddr
, rtaddr
);
609 dev_err(dev
, "failed to add child device %s: %ld\n",
610 child
->full_name
, PTR_ERR(rdev
));
616 static const struct of_device_id sunxi_rsb_of_match_table
[] = {
617 { .compatible
= "allwinner,sun8i-a23-rsb" },
620 MODULE_DEVICE_TABLE(of
, sunxi_rsb_of_match_table
);
622 static int sunxi_rsb_probe(struct platform_device
*pdev
)
624 struct device
*dev
= &pdev
->dev
;
625 struct device_node
*np
= dev
->of_node
;
627 struct sunxi_rsb
*rsb
;
628 unsigned long p_clk_freq
;
629 u32 clk_delay
, clk_freq
= 3000000;
630 int clk_div
, irq
, ret
;
633 of_property_read_u32(np
, "clock-frequency", &clk_freq
);
634 if (clk_freq
> RSB_MAX_FREQ
) {
636 "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
641 rsb
= devm_kzalloc(dev
, sizeof(*rsb
), GFP_KERNEL
);
646 platform_set_drvdata(pdev
, rsb
);
647 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
648 rsb
->regs
= devm_ioremap_resource(dev
, r
);
649 if (IS_ERR(rsb
->regs
))
650 return PTR_ERR(rsb
->regs
);
652 irq
= platform_get_irq(pdev
, 0);
654 dev_err(dev
, "failed to retrieve irq: %d\n", irq
);
658 rsb
->clk
= devm_clk_get(dev
, NULL
);
659 if (IS_ERR(rsb
->clk
)) {
660 ret
= PTR_ERR(rsb
->clk
);
661 dev_err(dev
, "failed to retrieve clk: %d\n", ret
);
665 ret
= clk_prepare_enable(rsb
->clk
);
667 dev_err(dev
, "failed to enable clk: %d\n", ret
);
671 p_clk_freq
= clk_get_rate(rsb
->clk
);
673 rsb
->rstc
= devm_reset_control_get(dev
, NULL
);
674 if (IS_ERR(rsb
->rstc
)) {
675 ret
= PTR_ERR(rsb
->rstc
);
676 dev_err(dev
, "failed to retrieve reset controller: %d\n", ret
);
677 goto err_clk_disable
;
680 ret
= reset_control_deassert(rsb
->rstc
);
682 dev_err(dev
, "failed to deassert reset line: %d\n", ret
);
683 goto err_clk_disable
;
686 init_completion(&rsb
->complete
);
687 mutex_init(&rsb
->lock
);
689 /* reset the controller */
690 writel(RSB_CTRL_SOFT_RST
, rsb
->regs
+ RSB_CTRL
);
691 readl_poll_timeout(rsb
->regs
+ RSB_CTRL
, reg
,
692 !(reg
& RSB_CTRL_SOFT_RST
), 1000, 100000);
695 * Clock frequency and delay calculation code is from
696 * Allwinner U-boot sources.
698 * From A83 user manual:
699 * bus clock frequency = parent clock frequency / (2 * (divider + 1))
701 clk_div
= p_clk_freq
/ clk_freq
/ 2;
704 else if (clk_div
> RSB_CCR_MAX_CLK_DIV
+ 1)
705 clk_div
= RSB_CCR_MAX_CLK_DIV
+ 1;
707 clk_delay
= clk_div
>> 1;
711 dev_info(dev
, "RSB running at %lu Hz\n", p_clk_freq
/ clk_div
/ 2);
712 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay
) | RSB_CCR_CLK_DIV(clk_div
- 1),
713 rsb
->regs
+ RSB_CCR
);
715 ret
= devm_request_irq(dev
, irq
, sunxi_rsb_irq
, 0, RSB_CTRL_NAME
, rsb
);
717 dev_err(dev
, "can't register interrupt handler irq %d: %d\n",
719 goto err_reset_assert
;
722 /* initialize all devices on the bus into RSB mode */
723 ret
= sunxi_rsb_init_device_mode(rsb
);
725 dev_warn(dev
, "Initialize device mode failed: %d\n", ret
);
727 of_rsb_register_devices(rsb
);
732 reset_control_assert(rsb
->rstc
);
735 clk_disable_unprepare(rsb
->clk
);
740 static int sunxi_rsb_remove(struct platform_device
*pdev
)
742 struct sunxi_rsb
*rsb
= platform_get_drvdata(pdev
);
744 device_for_each_child(rsb
->dev
, NULL
, sunxi_rsb_remove_devices
);
745 reset_control_assert(rsb
->rstc
);
746 clk_disable_unprepare(rsb
->clk
);
751 static struct platform_driver sunxi_rsb_driver
= {
752 .probe
= sunxi_rsb_probe
,
753 .remove
= sunxi_rsb_remove
,
755 .name
= RSB_CTRL_NAME
,
756 .of_match_table
= sunxi_rsb_of_match_table
,
760 static int __init
sunxi_rsb_init(void)
764 ret
= bus_register(&sunxi_rsb_bus
);
766 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret
);
770 return platform_driver_register(&sunxi_rsb_driver
);
772 module_init(sunxi_rsb_init
);
774 static void __exit
sunxi_rsb_exit(void)
776 platform_driver_unregister(&sunxi_rsb_driver
);
777 bus_unregister(&sunxi_rsb_bus
);
779 module_exit(sunxi_rsb_exit
);
781 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
782 MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
783 MODULE_LICENSE("GPL v2");