2 * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
4 * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
6 * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation version 2
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/usb.h>
27 #include <linux/i2c.h>
29 #include "tm6000-regs.h"
30 #include <media/v4l2-common.h>
31 #include <media/tuner.h>
33 #define USB_TIMEOUT (5 * HZ) /* ms */
35 int tm6000_read_write_usb(struct tm6000_core
*dev
, u8 req_type
, u8 req
,
36 u16 value
, u16 index
, u8
*buf
, u16 len
)
44 data
= kzalloc(len
, GFP_KERNEL
);
49 mutex_lock(&dev
->usb_lock
);
51 if (req_type
& USB_DIR_IN
)
52 pipe
= usb_rcvctrlpipe(dev
->udev
, 0);
54 pipe
= usb_sndctrlpipe(dev
->udev
, 0);
55 memcpy(data
, buf
, len
);
58 if (tm6000_debug
& V4L2_DEBUG_I2C
) {
59 printk(KERN_DEBUG
"(dev %p, pipe %08x): ", dev
->udev
, pipe
);
61 printk(KERN_CONT
"%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
62 (req_type
& USB_DIR_IN
) ? " IN" : "OUT",
63 req_type
, req
, value
&0xff, value
>>8, index
&0xff,
64 index
>>8, len
&0xff, len
>>8);
66 if (!(req_type
& USB_DIR_IN
)) {
67 printk(KERN_CONT
">>> ");
68 for (i
= 0; i
< len
; i
++)
69 printk(KERN_CONT
" %02x", buf
[i
]);
70 printk(KERN_CONT
"\n");
74 ret
= usb_control_msg(dev
->udev
, pipe
, req
, req_type
, value
, index
,
75 data
, len
, USB_TIMEOUT
);
77 if (req_type
& USB_DIR_IN
)
78 memcpy(buf
, data
, len
);
80 if (tm6000_debug
& V4L2_DEBUG_I2C
) {
82 if (req_type
& USB_DIR_IN
)
83 printk(KERN_DEBUG
"<<< (len=%d)\n", len
);
85 printk(KERN_CONT
"%s: Error #%d\n", __func__
, ret
);
86 } else if (req_type
& USB_DIR_IN
) {
87 printk(KERN_CONT
"<<< ");
88 for (i
= 0; i
< len
; i
++)
89 printk(KERN_CONT
" %02x", buf
[i
]);
90 printk(KERN_CONT
"\n");
96 if (dev
->quirks
& TM6000_QUIRK_NO_USB_DELAY
)
99 if (req
== REQ_16_SET_GET_I2C_WR1_RDN
&& !(req_type
& USB_DIR_IN
)) {
101 /* Calculate delay time, 14000us for 64 bytes */
102 tsleep
= (len
* 200) + 200;
105 usleep_range(tsleep
, tsleep
+ 1000);
108 usleep_range(delay
, delay
+ 1000);
110 mutex_unlock(&dev
->usb_lock
);
114 int tm6000_set_reg(struct tm6000_core
*dev
, u8 req
, u16 value
, u16 index
)
117 tm6000_read_write_usb(dev
, USB_DIR_OUT
| USB_TYPE_VENDOR
,
118 req
, value
, index
, NULL
, 0);
120 EXPORT_SYMBOL_GPL(tm6000_set_reg
);
122 int tm6000_get_reg(struct tm6000_core
*dev
, u8 req
, u16 value
, u16 index
)
127 rc
= tm6000_read_write_usb(dev
, USB_DIR_IN
| USB_TYPE_VENDOR
, req
,
128 value
, index
, buf
, 1);
135 EXPORT_SYMBOL_GPL(tm6000_get_reg
);
137 int tm6000_set_reg_mask(struct tm6000_core
*dev
, u8 req
, u16 value
,
144 rc
= tm6000_read_write_usb(dev
, USB_DIR_IN
| USB_TYPE_VENDOR
, req
,
150 new_index
= (buf
[0] & ~mask
) | (index
& mask
);
152 if (new_index
== buf
[0])
155 return tm6000_read_write_usb(dev
, USB_DIR_OUT
| USB_TYPE_VENDOR
,
156 req
, value
, new_index
, NULL
, 0);
158 EXPORT_SYMBOL_GPL(tm6000_set_reg_mask
);
160 int tm6000_get_reg16(struct tm6000_core
*dev
, u8 req
, u16 value
, u16 index
)
165 rc
= tm6000_read_write_usb(dev
, USB_DIR_IN
| USB_TYPE_VENDOR
, req
,
166 value
, index
, buf
, 2);
171 return buf
[1]|buf
[0]<<8;
174 int tm6000_get_reg32(struct tm6000_core
*dev
, u8 req
, u16 value
, u16 index
)
179 rc
= tm6000_read_write_usb(dev
, USB_DIR_IN
| USB_TYPE_VENDOR
, req
,
180 value
, index
, buf
, 4);
185 return buf
[3] | buf
[2] << 8 | buf
[1] << 16 | buf
[0] << 24;
188 int tm6000_i2c_reset(struct tm6000_core
*dev
, u16 tsleep
)
192 rc
= tm6000_set_reg(dev
, REQ_03_SET_GET_MCU_PIN
, TM6000_GPIO_CLK
, 0);
198 rc
= tm6000_set_reg(dev
, REQ_03_SET_GET_MCU_PIN
, TM6000_GPIO_CLK
, 1);
204 void tm6000_set_fourcc_format(struct tm6000_core
*dev
)
206 if (dev
->dev_type
== TM6010
) {
209 val
= tm6000_get_reg(dev
, TM6010_REQ07_RCC_ACTIVE_IF
, 0) & 0xfc;
210 if (dev
->fourcc
== V4L2_PIX_FMT_UYVY
)
211 tm6000_set_reg(dev
, TM6010_REQ07_RCC_ACTIVE_IF
, val
);
213 tm6000_set_reg(dev
, TM6010_REQ07_RCC_ACTIVE_IF
, val
| 1);
215 if (dev
->fourcc
== V4L2_PIX_FMT_UYVY
)
216 tm6000_set_reg(dev
, TM6010_REQ07_RC1_TRESHOLD
, 0xd0);
218 tm6000_set_reg(dev
, TM6010_REQ07_RC1_TRESHOLD
, 0x90);
222 static void tm6000_set_vbi(struct tm6000_core
*dev
)
226 * VBI lines and start/end are different between 60Hz and 50Hz
227 * So, it is very likely that we need to change the config to
228 * something that takes it into account, doing something different
229 * if (dev->norm & V4L2_STD_525_60)
232 if (dev
->dev_type
== TM6010
) {
233 tm6000_set_reg(dev
, TM6010_REQ07_R3F_RESET
, 0x01);
234 tm6000_set_reg(dev
, TM6010_REQ07_R41_TELETEXT_VBI_CODE1
, 0x27);
235 tm6000_set_reg(dev
, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL
, 0x55);
236 tm6000_set_reg(dev
, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7
, 0x66);
237 tm6000_set_reg(dev
, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8
, 0x66);
238 tm6000_set_reg(dev
, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9
, 0x66);
240 TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10
, 0x66);
242 TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11
, 0x66);
244 TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12
, 0x66);
246 TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13
, 0x66);
248 TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14
, 0x66);
250 TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15
, 0x66);
252 TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16
, 0x66);
254 TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17
, 0x66);
256 TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18
, 0x66);
258 TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19
, 0x66);
260 TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20
, 0x66);
262 TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21
, 0x66);
264 TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22
, 0x66);
266 TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23
, 0x00);
268 TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES
, 0x00);
270 TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN
, 0x01);
272 TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN
, 0x00);
274 TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN
, 0x02);
275 tm6000_set_reg(dev
, TM6010_REQ07_R58_VBI_CAPTION_DTO1
, 0x35);
276 tm6000_set_reg(dev
, TM6010_REQ07_R59_VBI_CAPTION_DTO0
, 0xa0);
277 tm6000_set_reg(dev
, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1
, 0x11);
278 tm6000_set_reg(dev
, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0
, 0x4c);
279 tm6000_set_reg(dev
, TM6010_REQ07_R40_TELETEXT_VBI_CODE0
, 0x01);
280 tm6000_set_reg(dev
, TM6010_REQ07_R3F_RESET
, 0x00);
284 int tm6000_init_analog_mode(struct tm6000_core
*dev
)
286 struct v4l2_frequency f
;
288 if (dev
->dev_type
== TM6010
) {
289 u8 active
= TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE
;
292 active
|= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE
;
294 /* Enable video and audio */
295 tm6000_set_reg_mask(dev
, TM6010_REQ07_RCC_ACTIVE_IF
,
297 /* Disable TS input */
298 tm6000_set_reg_mask(dev
, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE
,
301 /* Enables soft reset */
302 tm6000_set_reg(dev
, TM6010_REQ07_R3F_RESET
, 0x01);
305 /* Disable Hfilter and Enable TS Drop err */
306 tm6000_set_reg(dev
, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE
, 0x20);
307 else /* Enable Hfilter and disable TS Drop err */
308 tm6000_set_reg(dev
, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE
, 0x80);
310 tm6000_set_reg(dev
, TM6010_REQ07_RC3_HSTART1
, 0x88);
311 tm6000_set_reg(dev
, TM6000_REQ07_RDA_CLK_SEL
, 0x23);
312 tm6000_set_reg(dev
, TM6010_REQ07_RD1_ADDR_FOR_REQ1
, 0xc0);
313 tm6000_set_reg(dev
, TM6010_REQ07_RD2_ADDR_FOR_REQ2
, 0xd8);
314 tm6000_set_reg(dev
, TM6010_REQ07_RD6_ENDP_REQ1_REQ2
, 0x06);
315 tm6000_set_reg(dev
, TM6000_REQ07_RDF_PWDOWN_ACLK
, 0x1f);
317 /* AP Software reset */
318 tm6000_set_reg(dev
, TM6010_REQ07_RFF_SOFT_RESET
, 0x08);
319 tm6000_set_reg(dev
, TM6010_REQ07_RFF_SOFT_RESET
, 0x00);
321 tm6000_set_fourcc_format(dev
);
323 /* Disables soft reset */
324 tm6000_set_reg(dev
, TM6010_REQ07_R3F_RESET
, 0x00);
328 /* Tuner firmware can now be loaded */
331 * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
332 * for more than a few seconds. Not sure why, as this behavior does
333 * not happen on other devices with xc3028. So, I suspect that it
334 * is yet another bug at tm6000. After start sleeping, decoding
335 * doesn't start automatically. Instead, it requires some
336 * I2C commands to wake it up. As we want to have image at the
337 * beginning, we needed to add this hack. The better would be to
338 * discover some way to make tm6000 to wake up without this hack.
340 f
.frequency
= dev
->freq
;
341 v4l2_device_call_all(&dev
->v4l2_dev
, 0, tuner
, s_frequency
, &f
);
344 tm6000_set_standard(dev
);
346 tm6000_set_audio_bitrate(dev
, 48000);
348 /* switch dvb led off */
349 if (dev
->gpio
.dvb_led
) {
350 tm6000_set_reg(dev
, REQ_03_SET_GET_MCU_PIN
,
351 dev
->gpio
.dvb_led
, 0x01);
357 int tm6000_init_digital_mode(struct tm6000_core
*dev
)
359 if (dev
->dev_type
== TM6010
) {
360 /* Disable video and audio */
361 tm6000_set_reg_mask(dev
, TM6010_REQ07_RCC_ACTIVE_IF
,
363 /* Enable TS input */
364 tm6000_set_reg_mask(dev
, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE
,
366 /* all power down, but not the digital data port */
367 tm6000_set_reg(dev
, TM6010_REQ07_RFE_POWER_DOWN
, 0x28);
368 tm6000_set_reg(dev
, TM6010_REQ08_RE2_POWER_DOWN_CTRL1
, 0xfc);
369 tm6000_set_reg(dev
, TM6010_REQ08_RE6_POWER_DOWN_CTRL2
, 0xff);
371 tm6000_set_reg(dev
, TM6010_REQ07_RFF_SOFT_RESET
, 0x08);
372 tm6000_set_reg(dev
, TM6010_REQ07_RFF_SOFT_RESET
, 0x00);
373 tm6000_set_reg(dev
, TM6010_REQ07_R3F_RESET
, 0x01);
374 tm6000_set_reg(dev
, TM6000_REQ07_RDF_PWDOWN_ACLK
, 0x08);
375 tm6000_set_reg(dev
, TM6000_REQ07_RE2_VADC_STATUS_CTL
, 0x0c);
376 tm6000_set_reg(dev
, TM6000_REQ07_RE8_VADC_PWDOWN_CTL
, 0xff);
377 tm6000_set_reg(dev
, TM6000_REQ07_REB_VADC_AADC_MODE
, 0xd8);
378 tm6000_set_reg(dev
, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE
, 0x40);
379 tm6000_set_reg(dev
, TM6010_REQ07_RC1_TRESHOLD
, 0xd0);
380 tm6000_set_reg(dev
, TM6010_REQ07_RC3_HSTART1
, 0x09);
381 tm6000_set_reg(dev
, TM6000_REQ07_RDA_CLK_SEL
, 0x37);
382 tm6000_set_reg(dev
, TM6010_REQ07_RD1_ADDR_FOR_REQ1
, 0xd8);
383 tm6000_set_reg(dev
, TM6010_REQ07_RD2_ADDR_FOR_REQ2
, 0xc0);
384 tm6000_set_reg(dev
, TM6010_REQ07_RD6_ENDP_REQ1_REQ2
, 0x60);
386 tm6000_set_reg(dev
, TM6000_REQ07_RE2_VADC_STATUS_CTL
, 0x0c);
387 tm6000_set_reg(dev
, TM6000_REQ07_RE8_VADC_PWDOWN_CTL
, 0xff);
388 tm6000_set_reg(dev
, TM6000_REQ07_REB_VADC_AADC_MODE
, 0x08);
391 tm6000_set_reg(dev
, REQ_04_EN_DISABLE_MCU_INT
, 0x0020, 0x00);
393 tm6000_set_reg(dev
, REQ_04_EN_DISABLE_MCU_INT
, 0x0020, 0x01);
395 tm6000_set_reg(dev
, REQ_04_EN_DISABLE_MCU_INT
, 0x0020, 0x00);
399 /* switch dvb led on */
400 if (dev
->gpio
.dvb_led
) {
401 tm6000_set_reg(dev
, REQ_03_SET_GET_MCU_PIN
,
402 dev
->gpio
.dvb_led
, 0x00);
407 EXPORT_SYMBOL(tm6000_init_digital_mode
);
415 /* The meaning of those initializations are unknown */
416 static struct reg_init tm6000_init_tab
[] = {
418 { TM6000_REQ07_RDF_PWDOWN_ACLK
, 0x1f },
419 { TM6010_REQ07_RFF_SOFT_RESET
, 0x08 },
420 { TM6010_REQ07_RFF_SOFT_RESET
, 0x00 },
421 { TM6010_REQ07_RD5_POWERSAVE
, 0x4f },
422 { TM6000_REQ07_RDA_CLK_SEL
, 0x23 },
423 { TM6000_REQ07_RDB_OUT_SEL
, 0x08 },
424 { TM6000_REQ07_RE2_VADC_STATUS_CTL
, 0x00 },
425 { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1
, 0x10 },
426 { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2
, 0x00 },
427 { TM6000_REQ07_RE8_VADC_PWDOWN_CTL
, 0x00 },
428 { TM6000_REQ07_REB_VADC_AADC_MODE
, 0x64 }, /* 48000 bits/sample, external input */
429 { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL
, 0xc2 },
431 { TM6010_REQ07_R3F_RESET
, 0x01 }, /* Start of soft reset */
432 { TM6010_REQ07_R00_VIDEO_CONTROL0
, 0x00 },
433 { TM6010_REQ07_R01_VIDEO_CONTROL1
, 0x07 },
434 { TM6010_REQ07_R02_VIDEO_CONTROL2
, 0x5f },
435 { TM6010_REQ07_R03_YC_SEP_CONTROL
, 0x00 },
436 { TM6010_REQ07_R05_NOISE_THRESHOLD
, 0x64 },
437 { TM6010_REQ07_R07_OUTPUT_CONTROL
, 0x01 },
438 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ
, 0x82 },
439 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ
, 0x36 },
440 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ
, 0x50 },
441 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL
, 0x6a },
442 { TM6010_REQ07_R11_AGC_PEAK_CONTROL
, 0xc9 },
443 { TM6010_REQ07_R12_AGC_GATE_STARTH
, 0x07 },
444 { TM6010_REQ07_R13_AGC_GATE_STARTL
, 0x3b },
445 { TM6010_REQ07_R14_AGC_GATE_WIDTH
, 0x47 },
446 { TM6010_REQ07_R15_AGC_BP_DELAY
, 0x6f },
447 { TM6010_REQ07_R17_HLOOP_MAXSTATE
, 0xcd },
448 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3
, 0x1e },
449 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2
, 0x8b },
450 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1
, 0xa2 },
451 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0
, 0xe9 },
452 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3
, 0x1c },
453 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2
, 0xcc },
454 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1
, 0xcc },
455 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0
, 0xcd },
456 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME
, 0x3c },
457 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET
, 0x3c },
458 { TM6010_REQ07_R2D_CHROMA_BURST_END
, 0x48 },
459 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART
, 0x88 },
460 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART
, 0x22 },
461 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT
, 0x61 },
462 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN
, 0x74 },
463 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX
, 0x1c },
464 { TM6010_REQ07_R34_VSYNC_AGC_MIN
, 0x74 },
465 { TM6010_REQ07_R35_VSYNC_AGC_MAX
, 0x1c },
466 { TM6010_REQ07_R36_VSYNC_VBI_MIN
, 0x7a },
467 { TM6010_REQ07_R37_VSYNC_VBI_MAX
, 0x26 },
468 { TM6010_REQ07_R38_VSYNC_THRESHOLD
, 0x40 },
469 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT
, 0x0a },
470 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL
, 0x55 },
471 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21
, 0x11 },
472 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN
, 0x01 },
473 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN
, 0x02 },
474 { TM6010_REQ07_R58_VBI_CAPTION_DTO1
, 0x35 },
475 { TM6010_REQ07_R59_VBI_CAPTION_DTO0
, 0xa0 },
476 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD
, 0x15 },
477 { TM6010_REQ07_R82_COMB_FILTER_CONFIG
, 0x42 },
478 { TM6010_REQ07_RC1_TRESHOLD
, 0xd0 },
479 { TM6010_REQ07_RC3_HSTART1
, 0x88 },
480 { TM6010_REQ07_R3F_RESET
, 0x00 }, /* End of the soft reset */
481 { TM6010_REQ05_R18_IMASK7
, 0x00 },
484 static struct reg_init tm6010_init_tab
[] = {
485 { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE
, 0x00 },
486 { TM6010_REQ07_RC4_HSTART0
, 0xa0 },
487 { TM6010_REQ07_RC6_HEND0
, 0x40 },
488 { TM6010_REQ07_RCA_VEND0
, 0x31 },
489 { TM6010_REQ07_RCC_ACTIVE_IF
, 0xe1 },
490 { TM6010_REQ07_RE0_DVIDEO_SOURCE
, 0x03 },
491 { TM6010_REQ07_RFE_POWER_DOWN
, 0x7f },
493 { TM6010_REQ08_RE2_POWER_DOWN_CTRL1
, 0xf0 },
494 { TM6010_REQ08_RE3_ADC_IN1_SEL
, 0xf4 },
495 { TM6010_REQ08_RE4_ADC_IN2_SEL
, 0xf8 },
496 { TM6010_REQ08_RE6_POWER_DOWN_CTRL2
, 0x00 },
497 { TM6010_REQ08_REA_BUFF_DRV_CTRL
, 0xf2 },
498 { TM6010_REQ08_REB_SIF_GAIN_CTRL
, 0xf0 },
499 { TM6010_REQ08_REC_REVERSE_YC_CTRL
, 0xc2 },
500 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG
, 0x60 },
501 { TM6010_REQ08_RF1_AADC_POWER_DOWN
, 0xfc },
503 { TM6010_REQ07_R3F_RESET
, 0x01 },
504 { TM6010_REQ07_R00_VIDEO_CONTROL0
, 0x00 },
505 { TM6010_REQ07_R01_VIDEO_CONTROL1
, 0x07 },
506 { TM6010_REQ07_R02_VIDEO_CONTROL2
, 0x5f },
507 { TM6010_REQ07_R03_YC_SEP_CONTROL
, 0x00 },
508 { TM6010_REQ07_R05_NOISE_THRESHOLD
, 0x64 },
509 { TM6010_REQ07_R07_OUTPUT_CONTROL
, 0x01 },
510 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ
, 0x82 },
511 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ
, 0x36 },
512 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ
, 0x50 },
513 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL
, 0x6a },
514 { TM6010_REQ07_R11_AGC_PEAK_CONTROL
, 0xc9 },
515 { TM6010_REQ07_R12_AGC_GATE_STARTH
, 0x07 },
516 { TM6010_REQ07_R13_AGC_GATE_STARTL
, 0x3b },
517 { TM6010_REQ07_R14_AGC_GATE_WIDTH
, 0x47 },
518 { TM6010_REQ07_R15_AGC_BP_DELAY
, 0x6f },
519 { TM6010_REQ07_R17_HLOOP_MAXSTATE
, 0xcd },
520 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3
, 0x1e },
521 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2
, 0x8b },
522 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1
, 0xa2 },
523 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0
, 0xe9 },
524 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3
, 0x1c },
525 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2
, 0xcc },
526 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1
, 0xcc },
527 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0
, 0xcd },
528 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME
, 0x3c },
529 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET
, 0x3c },
530 { TM6010_REQ07_R2D_CHROMA_BURST_END
, 0x48 },
531 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART
, 0x88 },
532 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART
, 0x22 },
533 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT
, 0x61 },
534 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN
, 0x74 },
535 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX
, 0x1c },
536 { TM6010_REQ07_R34_VSYNC_AGC_MIN
, 0x74 },
537 { TM6010_REQ07_R35_VSYNC_AGC_MAX
, 0x1c },
538 { TM6010_REQ07_R36_VSYNC_VBI_MIN
, 0x7a },
539 { TM6010_REQ07_R37_VSYNC_VBI_MAX
, 0x26 },
540 { TM6010_REQ07_R38_VSYNC_THRESHOLD
, 0x40 },
541 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT
, 0x0a },
542 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL
, 0x55 },
543 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21
, 0x11 },
544 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN
, 0x01 },
545 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN
, 0x02 },
546 { TM6010_REQ07_R58_VBI_CAPTION_DTO1
, 0x35 },
547 { TM6010_REQ07_R59_VBI_CAPTION_DTO0
, 0xa0 },
548 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD
, 0x15 },
549 { TM6010_REQ07_R82_COMB_FILTER_CONFIG
, 0x42 },
550 { TM6010_REQ07_RC1_TRESHOLD
, 0xd0 },
551 { TM6010_REQ07_RC3_HSTART1
, 0x88 },
552 { TM6010_REQ07_R3F_RESET
, 0x00 },
554 { TM6010_REQ05_R18_IMASK7
, 0x00 },
556 { TM6010_REQ07_RDC_IR_LEADER1
, 0xaa },
557 { TM6010_REQ07_RDD_IR_LEADER0
, 0x30 },
558 { TM6010_REQ07_RDE_IR_PULSE_CNT1
, 0x20 },
559 { TM6010_REQ07_RDF_IR_PULSE_CNT0
, 0xd0 },
560 { REQ_04_EN_DISABLE_MCU_INT
, 0x02, 0x00 },
561 { TM6010_REQ07_RD8_IR
, 0x0f },
563 /* set remote wakeup key:any key wakeup */
564 { TM6010_REQ07_RE5_REMOTE_WAKEUP
, 0xfe },
565 { TM6010_REQ07_RDA_IR_WAKEUP_SEL
, 0xff },
568 int tm6000_init(struct tm6000_core
*dev
)
570 int board
, rc
= 0, i
, size
;
571 struct reg_init
*tab
;
573 /* Check board revision */
574 board
= tm6000_get_reg32(dev
, REQ_40_GET_VERSION
, 0, 0);
576 switch (board
& 0xff) {
578 printk(KERN_INFO
"Found tm6000\n");
579 if (dev
->dev_type
!= TM6000
)
580 dev
->dev_type
= TM6000
;
583 printk(KERN_INFO
"Found tm6010\n");
584 if (dev
->dev_type
!= TM6010
)
585 dev
->dev_type
= TM6010
;
588 printk(KERN_INFO
"Unknown board version = 0x%08x\n", board
);
591 printk(KERN_ERR
"Error %i while retrieving board version\n", board
);
593 if (dev
->dev_type
== TM6010
) {
594 tab
= tm6010_init_tab
;
595 size
= ARRAY_SIZE(tm6010_init_tab
);
597 tab
= tm6000_init_tab
;
598 size
= ARRAY_SIZE(tm6000_init_tab
);
601 /* Load board's initialization table */
602 for (i
= 0; i
< size
; i
++) {
603 rc
= tm6000_set_reg(dev
, tab
[i
].req
, tab
[i
].reg
, tab
[i
].val
);
605 printk(KERN_ERR
"Error %i while setting req %d, "
606 "reg %d to value %d\n", rc
,
607 tab
[i
].req
, tab
[i
].reg
, tab
[i
].val
);
612 msleep(5); /* Just to be conservative */
614 rc
= tm6000_cards_setup(dev
);
620 int tm6000_set_audio_bitrate(struct tm6000_core
*dev
, int bitrate
)
623 u8 areg_f0
= 0x60; /* ADC MCLK = 250 Fs */
624 u8 areg_0a
= 0x91; /* SIF 48KHz */
628 areg_f0
= 0x60; /* ADC MCLK = 250 Fs */
629 areg_0a
= 0x91; /* SIF 48KHz */
630 dev
->audio_bitrate
= bitrate
;
633 areg_f0
= 0x00; /* ADC MCLK = 375 Fs */
634 areg_0a
= 0x90; /* SIF 32KHz */
635 dev
->audio_bitrate
= bitrate
;
642 /* enable I2S, if we use sif or external I2S device */
643 if (dev
->dev_type
== TM6010
) {
644 val
= tm6000_set_reg(dev
, TM6010_REQ08_R0A_A_I2S_MOD
, areg_0a
);
648 val
= tm6000_set_reg_mask(dev
, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG
,
653 val
= tm6000_set_reg_mask(dev
, TM6000_REQ07_REB_VADC_AADC_MODE
,
660 EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate
);
662 int tm6000_set_audio_rinput(struct tm6000_core
*dev
)
664 if (dev
->dev_type
== TM6010
) {
665 /* Audio crossbar setting, default SIF1 */
669 switch (dev
->rinput
.amux
) {
670 case TM6000_AMUX_SIF1
:
671 case TM6000_AMUX_SIF2
:
675 case TM6000_AMUX_ADC1
:
678 case TM6000_AMUX_ADC2
:
681 case TM6000_AMUX_I2S
:
685 printk(KERN_INFO
"%s: audio input dosn't support\n",
690 /* Set audio input crossbar */
691 tm6000_set_reg_mask(dev
, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG
,
693 /* Mux overflow workaround */
694 tm6000_set_reg_mask(dev
, TM6010_REQ07_R07_OUTPUT_CONTROL
,
698 /* Audio setting, default LINE1 */
699 switch (dev
->rinput
.amux
) {
700 case TM6000_AMUX_ADC1
:
703 case TM6000_AMUX_ADC2
:
707 printk(KERN_INFO
"%s: audio input dosn't support\n",
712 /* Set audio input */
713 tm6000_set_reg_mask(dev
, TM6000_REQ07_REB_VADC_AADC_MODE
,
719 static void tm6010_set_mute_sif(struct tm6000_core
*dev
, u8 mute
)
726 tm6000_set_reg_mask(dev
, TM6010_REQ08_R0A_A_I2S_MOD
, mute_reg
, 0x08);
729 static void tm6010_set_mute_adc(struct tm6000_core
*dev
, u8 mute
)
736 if (dev
->dev_type
== TM6010
) {
737 tm6000_set_reg_mask(dev
, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL
,
739 tm6000_set_reg_mask(dev
, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL
,
742 tm6000_set_reg_mask(dev
, TM6000_REQ07_REC_VADC_AADC_LVOL
,
744 tm6000_set_reg_mask(dev
, TM6000_REQ07_RED_VADC_AADC_RVOL
,
749 int tm6000_tvaudio_set_mute(struct tm6000_core
*dev
, u8 mute
)
754 mux
= dev
->rinput
.amux
;
756 mux
= dev
->vinput
[dev
->input
].amux
;
759 case TM6000_AMUX_SIF1
:
760 case TM6000_AMUX_SIF2
:
761 if (dev
->dev_type
== TM6010
)
762 tm6010_set_mute_sif(dev
, mute
);
764 printk(KERN_INFO
"ERROR: TM5600 and TM6000 don't has"
765 " SIF audio inputs. Please check the %s"
766 " configuration.\n", dev
->name
);
770 case TM6000_AMUX_ADC1
:
771 case TM6000_AMUX_ADC2
:
772 tm6010_set_mute_adc(dev
, mute
);
781 static void tm6010_set_volume_sif(struct tm6000_core
*dev
, int vol
)
785 vol_reg
= vol
& 0x0F;
790 tm6000_set_reg(dev
, TM6010_REQ08_R07_A_LEFT_VOL
, vol_reg
);
791 tm6000_set_reg(dev
, TM6010_REQ08_R08_A_RIGHT_VOL
, vol_reg
);
794 static void tm6010_set_volume_adc(struct tm6000_core
*dev
, int vol
)
798 vol_reg
= (vol
+ 0x10) & 0x1f;
800 if (dev
->dev_type
== TM6010
) {
801 tm6000_set_reg(dev
, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL
, vol_reg
);
802 tm6000_set_reg(dev
, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL
, vol_reg
);
804 tm6000_set_reg(dev
, TM6000_REQ07_REC_VADC_AADC_LVOL
, vol_reg
);
805 tm6000_set_reg(dev
, TM6000_REQ07_RED_VADC_AADC_RVOL
, vol_reg
);
809 void tm6000_set_volume(struct tm6000_core
*dev
, int vol
)
814 mux
= dev
->rinput
.amux
;
815 vol
+= 8; /* Offset to 0 dB */
817 mux
= dev
->vinput
[dev
->input
].amux
;
820 case TM6000_AMUX_SIF1
:
821 case TM6000_AMUX_SIF2
:
822 if (dev
->dev_type
== TM6010
)
823 tm6010_set_volume_sif(dev
, vol
);
825 printk(KERN_INFO
"ERROR: TM5600 and TM6000 don't has"
826 " SIF audio inputs. Please check the %s"
827 " configuration.\n", dev
->name
);
829 case TM6000_AMUX_ADC1
:
830 case TM6000_AMUX_ADC2
:
831 tm6010_set_volume_adc(dev
, vol
);
838 static LIST_HEAD(tm6000_devlist
);
839 static DEFINE_MUTEX(tm6000_devlist_mutex
);
842 * tm6000_realease_resource()
845 void tm6000_remove_from_devlist(struct tm6000_core
*dev
)
847 mutex_lock(&tm6000_devlist_mutex
);
848 list_del(&dev
->devlist
);
849 mutex_unlock(&tm6000_devlist_mutex
);
852 void tm6000_add_into_devlist(struct tm6000_core
*dev
)
854 mutex_lock(&tm6000_devlist_mutex
);
855 list_add_tail(&dev
->devlist
, &tm6000_devlist
);
856 mutex_unlock(&tm6000_devlist_mutex
);
860 * Extension interface
863 static LIST_HEAD(tm6000_extension_devlist
);
865 int tm6000_call_fillbuf(struct tm6000_core
*dev
, enum tm6000_ops_type type
,
868 struct tm6000_ops
*ops
= NULL
;
870 /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
872 if (!list_empty(&tm6000_extension_devlist
)) {
873 list_for_each_entry(ops
, &tm6000_extension_devlist
, next
) {
874 if (ops
->fillbuf
&& ops
->type
== type
)
875 ops
->fillbuf(dev
, buf
, size
);
882 int tm6000_register_extension(struct tm6000_ops
*ops
)
884 struct tm6000_core
*dev
= NULL
;
886 mutex_lock(&tm6000_devlist_mutex
);
887 list_add_tail(&ops
->next
, &tm6000_extension_devlist
);
888 list_for_each_entry(dev
, &tm6000_devlist
, devlist
) {
890 printk(KERN_INFO
"%s: Initialized (%s) extension\n",
891 dev
->name
, ops
->name
);
893 mutex_unlock(&tm6000_devlist_mutex
);
896 EXPORT_SYMBOL(tm6000_register_extension
);
898 void tm6000_unregister_extension(struct tm6000_ops
*ops
)
900 struct tm6000_core
*dev
= NULL
;
902 mutex_lock(&tm6000_devlist_mutex
);
903 list_for_each_entry(dev
, &tm6000_devlist
, devlist
)
906 printk(KERN_INFO
"tm6000: Remove (%s) extension\n", ops
->name
);
907 list_del(&ops
->next
);
908 mutex_unlock(&tm6000_devlist_mutex
);
910 EXPORT_SYMBOL(tm6000_unregister_extension
);
912 void tm6000_init_extension(struct tm6000_core
*dev
)
914 struct tm6000_ops
*ops
= NULL
;
916 mutex_lock(&tm6000_devlist_mutex
);
917 if (!list_empty(&tm6000_extension_devlist
)) {
918 list_for_each_entry(ops
, &tm6000_extension_devlist
, next
) {
923 mutex_unlock(&tm6000_devlist_mutex
);
926 void tm6000_close_extension(struct tm6000_core
*dev
)
928 struct tm6000_ops
*ops
= NULL
;
930 mutex_lock(&tm6000_devlist_mutex
);
931 if (!list_empty(&tm6000_extension_devlist
)) {
932 list_for_each_entry(ops
, &tm6000_extension_devlist
, next
) {
937 mutex_unlock(&tm6000_devlist_mutex
);