drm/nv10/plane: some chipsets don't support NV12
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / dispnv04 / overlay.c
blob32e7064b819b6df4f9e5847beba7a826eaaed726
1 /*
2 * Copyright 2013 Ilia Mirkin
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
22 * Implementation based on the pre-KMS implementation in xf86-video-nouveau,
23 * written by Arthur Huillet.
26 #include <drm/drmP.h>
27 #include <drm/drm_crtc.h>
28 #include <drm/drm_fourcc.h>
30 #include "nouveau_drm.h"
32 #include "nouveau_bo.h"
33 #include "nouveau_connector.h"
34 #include "nouveau_display.h"
35 #include "nvreg.h"
38 struct nouveau_plane {
39 struct drm_plane base;
40 bool flip;
41 struct nouveau_bo *cur;
43 struct {
44 struct drm_property *colorkey;
45 struct drm_property *contrast;
46 struct drm_property *brightness;
47 struct drm_property *hue;
48 struct drm_property *saturation;
49 struct drm_property *iturbt_709;
50 } props;
52 int colorkey;
53 int contrast;
54 int brightness;
55 int hue;
56 int saturation;
57 int iturbt_709;
60 static uint32_t formats[] = {
61 DRM_FORMAT_UYVY,
62 DRM_FORMAT_NV12,
65 /* Sine can be approximated with
66 * http://en.wikipedia.org/wiki/Bhaskara_I's_sine_approximation_formula
67 * sin(x degrees) ~= 4 x (180 - x) / (40500 - x (180 - x) )
68 * Note that this only works for the range [0, 180].
69 * Also note that sin(x) == -sin(x - 180)
71 static inline int
72 sin_mul(int degrees, int factor)
74 if (degrees > 180) {
75 degrees -= 180;
76 factor *= -1;
78 return factor * 4 * degrees * (180 - degrees) /
79 (40500 - degrees * (180 - degrees));
82 /* cos(x) = sin(x + 90) */
83 static inline int
84 cos_mul(int degrees, int factor)
86 return sin_mul((degrees + 90) % 360, factor);
89 static int
90 nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
91 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
92 unsigned int crtc_w, unsigned int crtc_h,
93 uint32_t src_x, uint32_t src_y,
94 uint32_t src_w, uint32_t src_h)
96 struct nouveau_device *dev = nouveau_dev(plane->dev);
97 struct nouveau_plane *nv_plane = (struct nouveau_plane *)plane;
98 struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb);
99 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
100 struct nouveau_bo *cur = nv_plane->cur;
101 bool flip = nv_plane->flip;
102 int soff = NV_PCRTC0_SIZE * nv_crtc->index;
103 int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index;
104 int format, ret;
106 /* Source parameters given in 16.16 fixed point, ignore fractional. */
107 src_x >>= 16;
108 src_y >>= 16;
109 src_w >>= 16;
110 src_h >>= 16;
112 format = ALIGN(src_w * 4, 0x100);
114 if (format > 0xffff)
115 return -ERANGE;
117 if (dev->chipset >= 0x30) {
118 if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1))
119 return -ERANGE;
120 } else {
121 if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3))
122 return -ERANGE;
125 ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM);
126 if (ret)
127 return ret;
129 nv_plane->cur = nv_fb->nvbo;
131 nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY);
132 nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0);
134 nv_wr32(dev, NV_PVIDEO_BASE(flip), 0);
135 nv_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset);
136 nv_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w);
137 nv_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y << 16 | src_x);
138 nv_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w);
139 nv_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h);
140 nv_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x);
141 nv_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w);
143 if (fb->pixel_format == DRM_FORMAT_NV12) {
144 format |= NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8;
145 format |= NV_PVIDEO_FORMAT_PLANAR;
147 if (nv_plane->iturbt_709)
148 format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709;
149 if (nv_plane->colorkey & (1 << 24))
150 format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY;
152 if (fb->pixel_format == DRM_FORMAT_NV12) {
153 nv_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0);
154 nv_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip),
155 nv_fb->nvbo->bo.offset + fb->offsets[1]);
157 nv_wr32(dev, NV_PVIDEO_FORMAT(flip), format);
158 nv_wr32(dev, NV_PVIDEO_STOP, 0);
159 /* TODO: wait for vblank? */
160 nv_wr32(dev, NV_PVIDEO_BUFFER, flip ? 0x10 : 0x1);
161 nv_plane->flip = !flip;
163 if (cur)
164 nouveau_bo_unpin(cur);
166 return 0;
169 static int
170 nv10_disable_plane(struct drm_plane *plane)
172 struct nouveau_device *dev = nouveau_dev(plane->dev);
173 struct nouveau_plane *nv_plane = (struct nouveau_plane *)plane;
175 nv_wr32(dev, NV_PVIDEO_STOP, 1);
176 if (nv_plane->cur) {
177 nouveau_bo_unpin(nv_plane->cur);
178 nv_plane->cur = NULL;
181 return 0;
184 static void
185 nv10_destroy_plane(struct drm_plane *plane)
187 nv10_disable_plane(plane);
188 drm_plane_cleanup(plane);
189 kfree(plane);
192 static void
193 nv10_set_params(struct nouveau_plane *plane)
195 struct nouveau_device *dev = nouveau_dev(plane->base.dev);
196 u32 luma = (plane->brightness - 512) << 16 | plane->contrast;
197 u32 chroma = ((sin_mul(plane->hue, plane->saturation) & 0xffff) << 16) |
198 (cos_mul(plane->hue, plane->saturation) & 0xffff);
199 u32 format = 0;
201 nv_wr32(dev, NV_PVIDEO_LUMINANCE(0), luma);
202 nv_wr32(dev, NV_PVIDEO_LUMINANCE(1), luma);
203 nv_wr32(dev, NV_PVIDEO_CHROMINANCE(0), chroma);
204 nv_wr32(dev, NV_PVIDEO_CHROMINANCE(1), chroma);
205 nv_wr32(dev, NV_PVIDEO_COLOR_KEY, plane->colorkey & 0xffffff);
207 if (plane->cur) {
208 if (plane->iturbt_709)
209 format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709;
210 if (plane->colorkey & (1 << 24))
211 format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY;
212 nv_mask(dev, NV_PVIDEO_FORMAT(plane->flip),
213 NV_PVIDEO_FORMAT_MATRIX_ITURBT709 |
214 NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY,
215 format);
219 static int
220 nv10_set_property(struct drm_plane *plane,
221 struct drm_property *property,
222 uint64_t value)
224 struct nouveau_plane *nv_plane = (struct nouveau_plane *)plane;
226 if (property == nv_plane->props.colorkey)
227 nv_plane->colorkey = value;
228 else if (property == nv_plane->props.contrast)
229 nv_plane->contrast = value;
230 else if (property == nv_plane->props.brightness)
231 nv_plane->brightness = value;
232 else if (property == nv_plane->props.hue)
233 nv_plane->hue = value;
234 else if (property == nv_plane->props.saturation)
235 nv_plane->saturation = value;
236 else if (property == nv_plane->props.iturbt_709)
237 nv_plane->iturbt_709 = value;
238 else
239 return -EINVAL;
241 nv10_set_params(nv_plane);
242 return 0;
245 static const struct drm_plane_funcs nv10_plane_funcs = {
246 .update_plane = nv10_update_plane,
247 .disable_plane = nv10_disable_plane,
248 .set_property = nv10_set_property,
249 .destroy = nv10_destroy_plane,
252 static void
253 nv10_overlay_init(struct drm_device *device)
255 struct nouveau_device *dev = nouveau_dev(device);
256 struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL);
257 int num_formats = ARRAY_SIZE(formats);
258 int ret;
260 if (!plane)
261 return;
263 switch (dev->chipset) {
264 case 0x10:
265 case 0x11:
266 case 0x15:
267 case 0x1a:
268 case 0x20:
269 num_formats = 1;
270 break;
273 ret = drm_plane_init(device, &plane->base, 3 /* both crtc's */,
274 &nv10_plane_funcs,
275 formats, num_formats, false);
276 if (ret)
277 goto err;
279 /* Set up the plane properties */
280 plane->props.colorkey = drm_property_create_range(
281 device, 0, "colorkey", 0, 0x01ffffff);
282 plane->props.contrast = drm_property_create_range(
283 device, 0, "contrast", 0, 8192 - 1);
284 plane->props.brightness = drm_property_create_range(
285 device, 0, "brightness", 0, 1024);
286 plane->props.hue = drm_property_create_range(
287 device, 0, "hue", 0, 359);
288 plane->props.saturation = drm_property_create_range(
289 device, 0, "saturation", 0, 8192 - 1);
290 plane->props.iturbt_709 = drm_property_create_range(
291 device, 0, "iturbt_709", 0, 1);
292 if (!plane->props.colorkey ||
293 !plane->props.contrast ||
294 !plane->props.brightness ||
295 !plane->props.hue ||
296 !plane->props.saturation ||
297 !plane->props.iturbt_709)
298 goto cleanup;
300 plane->colorkey = 0;
301 drm_object_attach_property(&plane->base.base,
302 plane->props.colorkey, plane->colorkey);
304 plane->contrast = 0x1000;
305 drm_object_attach_property(&plane->base.base,
306 plane->props.contrast, plane->contrast);
308 plane->brightness = 512;
309 drm_object_attach_property(&plane->base.base,
310 plane->props.brightness, plane->brightness);
312 plane->hue = 0;
313 drm_object_attach_property(&plane->base.base,
314 plane->props.hue, plane->hue);
316 plane->saturation = 0x1000;
317 drm_object_attach_property(&plane->base.base,
318 plane->props.saturation, plane->saturation);
320 plane->iturbt_709 = 0;
321 drm_object_attach_property(&plane->base.base,
322 plane->props.iturbt_709, plane->iturbt_709);
324 nv10_set_params(plane);
325 nv_wr32(dev, NV_PVIDEO_STOP, 1);
326 return;
327 cleanup:
328 drm_plane_cleanup(&plane->base);
329 err:
330 kfree(plane);
331 nv_error(dev, "Failed to create plane\n");
334 void
335 nouveau_overlay_init(struct drm_device *device)
337 struct nouveau_device *dev = nouveau_dev(device);
338 if (dev->chipset >= 0x10 && dev->chipset <= 0x40)
339 nv10_overlay_init(device);