iommu/arm-smmu: Ensure IAS is set correctly for AArch32-capable SMMUs
[linux/fpc-iii.git] / include / video / pxa168fb.h
blob84cbb1f69ea66952cdfe4ed69bb39db9b48e4624
1 /*
2 * Copyright (C) 2009 Marvell International Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #ifndef __ASM_MACH_PXA168FB_H
10 #define __ASM_MACH_PXA168FB_H
12 #include <linux/fb.h>
13 #include <linux/interrupt.h>
15 /* Dumb interface */
16 #define PIN_MODE_DUMB_24 0
17 #define PIN_MODE_DUMB_18_SPI 1
18 #define PIN_MODE_DUMB_18_GPIO 2
19 #define PIN_MODE_DUMB_16_SPI 3
20 #define PIN_MODE_DUMB_16_GPIO 4
21 #define PIN_MODE_DUMB_12_SPI_GPIO 5
22 #define PIN_MODE_SMART_18_SPI 6
23 #define PIN_MODE_SMART_16_SPI 7
24 #define PIN_MODE_SMART_8_SPI_GPIO 8
26 /* Dumb interface pin allocation */
27 #define DUMB_MODE_RGB565 0
28 #define DUMB_MODE_RGB565_UPPER 1
29 #define DUMB_MODE_RGB666 2
30 #define DUMB_MODE_RGB666_UPPER 3
31 #define DUMB_MODE_RGB444 4
32 #define DUMB_MODE_RGB444_UPPER 5
33 #define DUMB_MODE_RGB888 6
35 /* default fb buffer size WVGA-32bits */
36 #define DEFAULT_FB_SIZE (800 * 480 * 4)
39 * Buffer pixel format
40 * bit0 is for rb swap.
41 * bit12 is for Y UorV swap
43 #define PIX_FMT_RGB565 0
44 #define PIX_FMT_BGR565 1
45 #define PIX_FMT_RGB1555 2
46 #define PIX_FMT_BGR1555 3
47 #define PIX_FMT_RGB888PACK 4
48 #define PIX_FMT_BGR888PACK 5
49 #define PIX_FMT_RGB888UNPACK 6
50 #define PIX_FMT_BGR888UNPACK 7
51 #define PIX_FMT_RGBA888 8
52 #define PIX_FMT_BGRA888 9
53 #define PIX_FMT_YUV422PACK 10
54 #define PIX_FMT_YVU422PACK 11
55 #define PIX_FMT_YUV422PLANAR 12
56 #define PIX_FMT_YVU422PLANAR 13
57 #define PIX_FMT_YUV420PLANAR 14
58 #define PIX_FMT_YVU420PLANAR 15
59 #define PIX_FMT_PSEUDOCOLOR 20
60 #define PIX_FMT_UYVY422PACK (0x1000|PIX_FMT_YUV422PACK)
63 * PXA LCD controller private state.
65 struct pxa168fb_info {
66 struct device *dev;
67 struct clk *clk;
68 struct fb_info *info;
70 void __iomem *reg_base;
71 dma_addr_t fb_start_dma;
72 u32 pseudo_palette[16];
74 int pix_fmt;
75 unsigned is_blanked:1;
76 unsigned panel_rbswap:1;
77 unsigned active:1;
81 * PXA fb machine information
83 struct pxa168fb_mach_info {
84 char id[16];
86 int num_modes;
87 struct fb_videomode *modes;
90 * Pix_fmt
92 unsigned pix_fmt;
95 * I/O pin allocation.
97 unsigned io_pin_allocation_mode:4;
100 * Dumb panel -- assignment of R/G/B component info to the 24
101 * available external data lanes.
103 unsigned dumb_mode:4;
104 unsigned panel_rgb_reverse_lanes:1;
107 * Dumb panel -- GPIO output data.
109 unsigned gpio_output_mask:8;
110 unsigned gpio_output_data:8;
113 * Dumb panel -- configurable output signal polarity.
115 unsigned invert_composite_blank:1;
116 unsigned invert_pix_val_ena:1;
117 unsigned invert_pixclock:1;
118 unsigned panel_rbswap:1;
119 unsigned active:1;
120 unsigned enable_lcd:1;
123 #endif /* __ASM_MACH_PXA168FB_H */