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[linux/fpc-iii.git] / drivers / block / mtip32xx / mtip32xx.h
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1 /*
2 * mtip32xx.h - Header file for the P320 SSD Block Driver
3 * Copyright (C) 2011 Micron Technology, Inc.
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 #ifndef __MTIP32XX_H__
22 #define __MTIP32XX_H__
24 #include <linux/spinlock.h>
25 #include <linux/rwsem.h>
26 #include <linux/ata.h>
27 #include <linux/interrupt.h>
28 #include <linux/genhd.h>
30 /* Offset of Subsystem Device ID in pci confoguration space */
31 #define PCI_SUBSYSTEM_DEVICEID 0x2E
33 /* offset of Device Control register in PCIe extended capabilites space */
34 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
36 /* check for erase mode support during secure erase */
37 #define MTIP_SEC_ERASE_MODE 0x2
39 /* # of times to retry timed out/failed IOs */
40 #define MTIP_MAX_RETRIES 2
42 /* Various timeout values in ms */
43 #define MTIP_NCQ_CMD_TIMEOUT_MS 15000
44 #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000
45 #define MTIP_INT_CMD_TIMEOUT_MS 5000
46 #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \
47 (MTIP_MAX_RETRIES + 1))
49 /* check for timeouts every 500ms */
50 #define MTIP_TIMEOUT_CHECK_PERIOD 500
52 /* ftl rebuild */
53 #define MTIP_FTL_REBUILD_OFFSET 142
54 #define MTIP_FTL_REBUILD_MAGIC 0xED51
55 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
57 /* unaligned IO handling */
58 #define MTIP_MAX_UNALIGNED_SLOTS 2
60 /* Macro to extract the tag bit number from a tag value. */
61 #define MTIP_TAG_BIT(tag) (tag & 0x1F)
64 * Macro to extract the tag index from a tag value. The index
65 * is used to access the correct s_active/Command Issue register based
66 * on the tag value.
68 #define MTIP_TAG_INDEX(tag) (tag >> 5)
71 * Maximum number of scatter gather entries
72 * a single command may have.
74 #define MTIP_MAX_SG 504
77 * Maximum number of slot groups (Command Issue & s_active registers)
78 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
80 #define MTIP_MAX_SLOT_GROUPS 8
82 /* Internal command tag. */
83 #define MTIP_TAG_INTERNAL 0
85 /* Micron Vendor ID & P320x SSD Device ID */
86 #define PCI_VENDOR_ID_MICRON 0x1344
87 #define P320H_DEVICE_ID 0x5150
88 #define P320M_DEVICE_ID 0x5151
89 #define P320S_DEVICE_ID 0x5152
90 #define P325M_DEVICE_ID 0x5153
91 #define P420H_DEVICE_ID 0x5160
92 #define P420M_DEVICE_ID 0x5161
93 #define P425M_DEVICE_ID 0x5163
95 /* Driver name and version strings */
96 #define MTIP_DRV_NAME "mtip32xx"
97 #define MTIP_DRV_VERSION "1.3.1"
99 /* Maximum number of minor device numbers per device. */
100 #define MTIP_MAX_MINORS 16
102 /* Maximum number of supported command slots. */
103 #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
106 * Per-tag bitfield size in longs.
107 * Linux bit manipulation functions
108 * (i.e. test_and_set_bit, find_next_zero_bit)
109 * manipulate memory in longs, so we try to make the math work.
110 * take the slot groups and find the number of longs, rounding up.
111 * Careful! i386 and x86_64 use different size longs!
113 #define U32_PER_LONG (sizeof(long) / sizeof(u32))
114 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
115 (U32_PER_LONG-1))/U32_PER_LONG)
117 /* BAR number used to access the HBA registers. */
118 #define MTIP_ABAR 5
120 #ifdef DEBUG
121 #define dbg_printk(format, arg...) \
122 printk(pr_fmt(format), ##arg);
123 #else
124 #define dbg_printk(format, arg...)
125 #endif
127 #define MTIP_DFS_MAX_BUF_SIZE 1024
129 enum {
130 /* below are bit numbers in 'flags' defined in mtip_port */
131 MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
132 MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
133 MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
134 MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
135 MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */
136 MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
137 (1 << MTIP_PF_EH_ACTIVE_BIT) |
138 (1 << MTIP_PF_SE_ACTIVE_BIT) |
139 (1 << MTIP_PF_DM_ACTIVE_BIT) |
140 (1 << MTIP_PF_TO_ACTIVE_BIT)),
141 MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */
143 MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
144 MTIP_PF_ISSUE_CMDS_BIT = 5,
145 MTIP_PF_REBUILD_BIT = 6,
146 MTIP_PF_SVC_THD_STOP_BIT = 8,
148 MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
149 (1 << MTIP_PF_ISSUE_CMDS_BIT) |
150 (1 << MTIP_PF_REBUILD_BIT) |
151 (1 << MTIP_PF_SVC_THD_STOP_BIT) |
152 (1 << MTIP_PF_TO_ACTIVE_BIT)),
154 /* below are bit numbers in 'dd_flag' defined in driver_data */
155 MTIP_DDF_SEC_LOCK_BIT = 0,
156 MTIP_DDF_REMOVE_PENDING_BIT = 1,
157 MTIP_DDF_OVER_TEMP_BIT = 2,
158 MTIP_DDF_WRITE_PROTECT_BIT = 3,
159 MTIP_DDF_CLEANUP_BIT = 5,
160 MTIP_DDF_RESUME_BIT = 6,
161 MTIP_DDF_INIT_DONE_BIT = 7,
162 MTIP_DDF_REBUILD_FAILED_BIT = 8,
163 MTIP_DDF_REMOVAL_BIT = 9,
165 MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
166 (1 << MTIP_DDF_SEC_LOCK_BIT) |
167 (1 << MTIP_DDF_OVER_TEMP_BIT) |
168 (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
169 (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
173 struct smart_attr {
174 u8 attr_id;
175 __le16 flags;
176 u8 cur;
177 u8 worst;
178 __le32 data;
179 u8 res[3];
180 } __packed;
182 struct mtip_work {
183 struct work_struct work;
184 void *port;
185 int cpu_binding;
186 u32 completed;
187 } ____cacheline_aligned_in_smp;
189 #define DEFINE_HANDLER(group) \
190 void mtip_workq_sdbf##group(struct work_struct *work) \
192 struct mtip_work *w = (struct mtip_work *) work; \
193 mtip_workq_sdbfx(w->port, group, w->completed); \
196 #define MTIP_TRIM_TIMEOUT_MS 240000
197 #define MTIP_MAX_TRIM_ENTRIES 8
198 #define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
200 struct mtip_trim_entry {
201 __le32 lba; /* starting lba of region */
202 __le16 rsvd; /* unused */
203 __le16 range; /* # of 512b blocks to trim */
204 } __packed;
206 struct mtip_trim {
207 /* Array of regions to trim */
208 struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
209 } __packed;
211 /* Register Frame Information Structure (FIS), host to device. */
212 struct host_to_dev_fis {
214 * FIS type.
215 * - 27h Register FIS, host to device.
216 * - 34h Register FIS, device to host.
217 * - 39h DMA Activate FIS, device to host.
218 * - 41h DMA Setup FIS, bi-directional.
219 * - 46h Data FIS, bi-directional.
220 * - 58h BIST Activate FIS, bi-directional.
221 * - 5Fh PIO Setup FIS, device to host.
222 * - A1h Set Device Bits FIS, device to host.
224 unsigned char type;
225 unsigned char opts;
226 unsigned char command;
227 unsigned char features;
229 union {
230 unsigned char lba_low;
231 unsigned char sector;
233 union {
234 unsigned char lba_mid;
235 unsigned char cyl_low;
237 union {
238 unsigned char lba_hi;
239 unsigned char cyl_hi;
241 union {
242 unsigned char device;
243 unsigned char head;
246 union {
247 unsigned char lba_low_ex;
248 unsigned char sector_ex;
250 union {
251 unsigned char lba_mid_ex;
252 unsigned char cyl_low_ex;
254 union {
255 unsigned char lba_hi_ex;
256 unsigned char cyl_hi_ex;
258 unsigned char features_ex;
260 unsigned char sect_count;
261 unsigned char sect_cnt_ex;
262 unsigned char res2;
263 unsigned char control;
265 unsigned int res3;
268 /* Command header structure. */
269 struct mtip_cmd_hdr {
271 * Command options.
272 * - Bits 31:16 Number of PRD entries.
273 * - Bits 15:8 Unused in this implementation.
274 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
275 * - Bit 6 Write bit, should be set when writing data to the device.
276 * - Bit 5 Unused in this implementation.
277 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
279 __le32 opts;
280 /* This field is unsed when using NCQ. */
281 union {
282 __le32 byte_count;
283 __le32 status;
286 * Lower 32 bits of the command table address associated with this
287 * header. The command table addresses must be 128 byte aligned.
289 __le32 ctba;
291 * If 64 bit addressing is used this field is the upper 32 bits
292 * of the command table address associated with this command.
294 __le32 ctbau;
295 /* Reserved and unused. */
296 u32 res[4];
299 /* Command scatter gather structure (PRD). */
300 struct mtip_cmd_sg {
302 * Low 32 bits of the data buffer address. For P320 this
303 * address must be 8 byte aligned signified by bits 2:0 being
304 * set to 0.
306 __le32 dba;
308 * When 64 bit addressing is used this field is the upper
309 * 32 bits of the data buffer address.
311 __le32 dba_upper;
312 /* Unused. */
313 __le32 reserved;
315 * Bit 31: interrupt when this data block has been transferred.
316 * Bits 30..22: reserved
317 * Bits 21..0: byte count (minus 1). For P320 the byte count must be
318 * 8 byte aligned signified by bits 2:0 being set to 1.
320 __le32 info;
322 struct mtip_port;
324 struct mtip_int_cmd;
326 /* Structure used to describe a command. */
327 struct mtip_cmd {
328 void *command; /* ptr to command table entry */
330 dma_addr_t command_dma; /* corresponding physical address */
332 int scatter_ents; /* Number of scatter list entries used */
334 int unaligned; /* command is unaligned on 4k boundary */
336 union {
337 struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
338 struct mtip_int_cmd *icmd;
341 int retries; /* The number of retries left for this command. */
343 int direction; /* Data transfer direction */
344 blk_status_t status;
347 /* Structure used to describe a port. */
348 struct mtip_port {
349 /* Pointer back to the driver data for this port. */
350 struct driver_data *dd;
352 * Used to determine if the data pointed to by the
353 * identify field is valid.
355 unsigned long identify_valid;
356 /* Base address of the memory mapped IO for the port. */
357 void __iomem *mmio;
358 /* Array of pointers to the memory mapped s_active registers. */
359 void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
360 /* Array of pointers to the memory mapped completed registers. */
361 void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
362 /* Array of pointers to the memory mapped Command Issue registers. */
363 void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
365 * Pointer to the beginning of the command header memory as used
366 * by the driver.
368 void *command_list;
370 * Pointer to the beginning of the command header memory as used
371 * by the DMA.
373 dma_addr_t command_list_dma;
375 * Pointer to the beginning of the RX FIS memory as used
376 * by the driver.
378 void *rxfis;
380 * Pointer to the beginning of the RX FIS memory as used
381 * by the DMA.
383 dma_addr_t rxfis_dma;
385 * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
387 void *block1;
389 * DMA address of region for RX Fis, Identify, RLE10, and SMART
391 dma_addr_t block1_dma;
393 * Pointer to the beginning of the identify data memory as used
394 * by the driver.
396 u16 *identify;
398 * Pointer to the beginning of the identify data memory as used
399 * by the DMA.
401 dma_addr_t identify_dma;
403 * Pointer to the beginning of a sector buffer that is used
404 * by the driver when issuing internal commands.
406 u16 *sector_buffer;
408 * Pointer to the beginning of a sector buffer that is used
409 * by the DMA when the driver issues internal commands.
411 dma_addr_t sector_buffer_dma;
413 u16 *log_buf;
414 dma_addr_t log_buf_dma;
416 u8 *smart_buf;
417 dma_addr_t smart_buf_dma;
420 * used to queue commands when an internal command is in progress
421 * or error handling is active
423 unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
424 /* Used by mtip_service_thread to wait for an event */
425 wait_queue_head_t svc_wait;
427 * indicates the state of the port. Also, helps the service thread
428 * to determine its action on wake up.
430 unsigned long flags;
432 * Timer used to complete commands that have been active for too long.
434 unsigned long ic_pause_timer;
436 /* Counter to control queue depth of unaligned IOs */
437 atomic_t cmd_slot_unal;
439 /* Spinlock for working around command-issue bug. */
440 spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
444 * Driver private data structure.
446 * One structure is allocated per probed device.
448 struct driver_data {
449 void __iomem *mmio; /* Base address of the HBA registers. */
451 int major; /* Major device number. */
453 int instance; /* Instance number. First device probed is 0, ... */
455 struct gendisk *disk; /* Pointer to our gendisk structure. */
457 struct pci_dev *pdev; /* Pointer to the PCI device structure. */
459 struct request_queue *queue; /* Our request queue. */
461 struct blk_mq_tag_set tags; /* blk_mq tags */
463 struct mtip_port *port; /* Pointer to the port data structure. */
465 unsigned product_type; /* magic value declaring the product type */
467 unsigned slot_groups; /* number of slot groups the product supports */
469 unsigned long index; /* Index to determine the disk name */
471 unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
473 struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
475 struct dentry *dfs_node;
477 bool trim_supp; /* flag indicating trim support */
479 bool sr;
481 int numa_node; /* NUMA support */
483 char workq_name[32];
485 struct workqueue_struct *isr_workq;
487 atomic_t irq_workers_active;
489 struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
491 int isr_binding;
493 struct block_device *bdev;
495 struct list_head online_list; /* linkage for online list */
497 struct list_head remove_list; /* linkage for removing list */
499 int unal_qdepth; /* qdepth of unaligned IO queue */
502 #endif