Linux 5.1.15
[linux/fpc-iii.git] / drivers / block / umem.c
blobaa035cf8a51d316523ecfac421eb6fb633806d85
1 /*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
37 #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
38 #include <linux/fs.h>
39 #include <linux/bio.h>
40 #include <linux/kernel.h>
41 #include <linux/mm.h>
42 #include <linux/mman.h>
43 #include <linux/gfp.h>
44 #include <linux/ioctl.h>
45 #include <linux/module.h>
46 #include <linux/init.h>
47 #include <linux/interrupt.h>
48 #include <linux/timer.h>
49 #include <linux/pci.h>
50 #include <linux/dma-mapping.h>
52 #include <linux/fcntl.h> /* O_ACCMODE */
53 #include <linux/hdreg.h> /* HDIO_GETGEO */
55 #include "umem.h"
57 #include <linux/uaccess.h>
58 #include <asm/io.h>
60 #define MM_MAXCARDS 4
61 #define MM_RAHEAD 2 /* two sectors */
62 #define MM_BLKSIZE 1024 /* 1k blocks */
63 #define MM_HARDSECT 512 /* 512-byte hardware sectors */
64 #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
67 * Version Information
70 #define DRIVER_NAME "umem"
71 #define DRIVER_VERSION "v2.3"
72 #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73 #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
75 static int debug;
76 /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77 #define HW_TRACE(x)
79 #define DEBUG_LED_ON_TRANSFER 0x01
80 #define DEBUG_BATTERY_POLLING 0x02
82 module_param(debug, int, 0644);
83 MODULE_PARM_DESC(debug, "Debug bitmask");
85 static int pci_read_cmd = 0x0C; /* Read Multiple */
86 module_param(pci_read_cmd, int, 0);
87 MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
89 static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90 module_param(pci_write_cmd, int, 0);
91 MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
93 static int pci_cmds;
95 static int major_nr;
97 #include <linux/blkdev.h>
98 #include <linux/blkpg.h>
100 struct cardinfo {
101 struct pci_dev *dev;
103 unsigned char __iomem *csr_remap;
104 unsigned int mm_size; /* size in kbytes */
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
110 struct bio *bio, *currentbio, **biotail;
111 struct bvec_iter current_iter;
113 struct request_queue *queue;
115 struct mm_page {
116 dma_addr_t page_dma;
117 struct mm_dma_desc *desc;
118 int cnt, headcnt;
119 struct bio *bio, **biotail;
120 struct bvec_iter iter;
121 } mm_pages[2];
122 #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
124 int Active, Ready;
126 struct tasklet_struct tasklet;
127 unsigned int dma_status;
129 struct {
130 int good;
131 int warned;
132 unsigned long last_change;
133 } battery[2];
135 spinlock_t lock;
136 int check_batteries;
138 int flags;
141 static struct cardinfo cards[MM_MAXCARDS];
142 static struct timer_list battery_timer;
144 static int num_cards;
146 static struct gendisk *mm_gendisk[MM_MAXCARDS];
148 static void check_batteries(struct cardinfo *card);
150 static int get_userbit(struct cardinfo *card, int bit)
152 unsigned char led;
154 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
155 return led & bit;
158 static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
160 unsigned char led;
162 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
163 if (state)
164 led |= bit;
165 else
166 led &= ~bit;
167 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
169 return 0;
173 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
175 static void set_led(struct cardinfo *card, int shift, unsigned char state)
177 unsigned char led;
179 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
180 if (state == LED_FLIP)
181 led ^= (1<<shift);
182 else {
183 led &= ~(0x03 << shift);
184 led |= (state << shift);
186 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
190 #ifdef MM_DIAG
191 static void dump_regs(struct cardinfo *card)
193 unsigned char *p;
194 int i, i1;
196 p = card->csr_remap;
197 for (i = 0; i < 8; i++) {
198 printk(KERN_DEBUG "%p ", p);
200 for (i1 = 0; i1 < 16; i1++)
201 printk("%02x ", *p++);
203 printk("\n");
206 #endif
208 static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
210 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
211 if (dmastat & DMASCR_ANY_ERR)
212 printk(KERN_CONT "ANY_ERR ");
213 if (dmastat & DMASCR_MBE_ERR)
214 printk(KERN_CONT "MBE_ERR ");
215 if (dmastat & DMASCR_PARITY_ERR_REP)
216 printk(KERN_CONT "PARITY_ERR_REP ");
217 if (dmastat & DMASCR_PARITY_ERR_DET)
218 printk(KERN_CONT "PARITY_ERR_DET ");
219 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
220 printk(KERN_CONT "SYSTEM_ERR_SIG ");
221 if (dmastat & DMASCR_TARGET_ABT)
222 printk(KERN_CONT "TARGET_ABT ");
223 if (dmastat & DMASCR_MASTER_ABT)
224 printk(KERN_CONT "MASTER_ABT ");
225 if (dmastat & DMASCR_CHAIN_COMPLETE)
226 printk(KERN_CONT "CHAIN_COMPLETE ");
227 if (dmastat & DMASCR_DMA_COMPLETE)
228 printk(KERN_CONT "DMA_COMPLETE ");
229 printk("\n");
233 * Theory of request handling
235 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
236 * We have two pages of mm_dma_desc, holding about 64 descriptors
237 * each. These are allocated at init time.
238 * One page is "Ready" and is either full, or can have request added.
239 * The other page might be "Active", which DMA is happening on it.
241 * Whenever IO on the active page completes, the Ready page is activated
242 * and the ex-Active page is clean out and made Ready.
243 * Otherwise the Ready page is only activated when it becomes full.
245 * If a request arrives while both pages a full, it is queued, and b_rdev is
246 * overloaded to record whether it was a read or a write.
248 * The interrupt handler only polls the device to clear the interrupt.
249 * The processing of the result is done in a tasklet.
252 static void mm_start_io(struct cardinfo *card)
254 /* we have the lock, we know there is
255 * no IO active, and we know that card->Active
256 * is set
258 struct mm_dma_desc *desc;
259 struct mm_page *page;
260 int offset;
262 /* make the last descriptor end the chain */
263 page = &card->mm_pages[card->Active];
264 pr_debug("start_io: %d %d->%d\n",
265 card->Active, page->headcnt, page->cnt - 1);
266 desc = &page->desc[page->cnt-1];
268 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
269 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
270 desc->sem_control_bits = desc->control_bits;
273 if (debug & DEBUG_LED_ON_TRANSFER)
274 set_led(card, LED_REMOVE, LED_ON);
276 desc = &page->desc[page->headcnt];
277 writel(0, card->csr_remap + DMA_PCI_ADDR);
278 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
280 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
281 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
283 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
284 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
286 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
287 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
289 offset = ((char *)desc) - ((char *)page->desc);
290 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
291 card->csr_remap + DMA_DESCRIPTOR_ADDR);
292 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
293 * and on some ports will do nothing ! */
294 writel(cpu_to_le32(((u64)page->page_dma)>>32),
295 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
297 /* Go, go, go */
298 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
299 card->csr_remap + DMA_STATUS_CTRL);
302 static int add_bio(struct cardinfo *card);
304 static void activate(struct cardinfo *card)
306 /* if No page is Active, and Ready is
307 * not empty, then switch Ready page
308 * to active and start IO.
309 * Then add any bh's that are available to Ready
312 do {
313 while (add_bio(card))
316 if (card->Active == -1 &&
317 card->mm_pages[card->Ready].cnt > 0) {
318 card->Active = card->Ready;
319 card->Ready = 1-card->Ready;
320 mm_start_io(card);
323 } while (card->Active == -1 && add_bio(card));
326 static inline void reset_page(struct mm_page *page)
328 page->cnt = 0;
329 page->headcnt = 0;
330 page->bio = NULL;
331 page->biotail = &page->bio;
335 * If there is room on Ready page, take
336 * one bh off list and add it.
337 * return 1 if there was room, else 0.
339 static int add_bio(struct cardinfo *card)
341 struct mm_page *p;
342 struct mm_dma_desc *desc;
343 dma_addr_t dma_handle;
344 int offset;
345 struct bio *bio;
346 struct bio_vec vec;
348 bio = card->currentbio;
349 if (!bio && card->bio) {
350 card->currentbio = card->bio;
351 card->current_iter = card->bio->bi_iter;
352 card->bio = card->bio->bi_next;
353 if (card->bio == NULL)
354 card->biotail = &card->bio;
355 card->currentbio->bi_next = NULL;
356 return 1;
358 if (!bio)
359 return 0;
361 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
362 return 0;
364 vec = bio_iter_iovec(bio, card->current_iter);
366 dma_handle = dma_map_page(&card->dev->dev,
367 vec.bv_page,
368 vec.bv_offset,
369 vec.bv_len,
370 bio_op(bio) == REQ_OP_READ ?
371 DMA_FROM_DEVICE : DMA_TO_DEVICE);
373 p = &card->mm_pages[card->Ready];
374 desc = &p->desc[p->cnt];
375 p->cnt++;
376 if (p->bio == NULL)
377 p->iter = card->current_iter;
378 if ((p->biotail) != &bio->bi_next) {
379 *(p->biotail) = bio;
380 p->biotail = &(bio->bi_next);
381 bio->bi_next = NULL;
384 desc->data_dma_handle = dma_handle;
386 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
387 desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9);
388 desc->transfer_size = cpu_to_le32(vec.bv_len);
389 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
390 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
391 desc->zero1 = desc->zero2 = 0;
392 offset = (((char *)(desc+1)) - ((char *)p->desc));
393 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
394 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
395 DMASCR_PARITY_INT_EN|
396 DMASCR_CHAIN_EN |
397 DMASCR_SEM_EN |
398 pci_cmds);
399 if (bio_op(bio) == REQ_OP_WRITE)
400 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
401 desc->sem_control_bits = desc->control_bits;
404 bio_advance_iter(bio, &card->current_iter, vec.bv_len);
405 if (!card->current_iter.bi_size)
406 card->currentbio = NULL;
408 return 1;
411 static void process_page(unsigned long data)
413 /* check if any of the requests in the page are DMA_COMPLETE,
414 * and deal with them appropriately.
415 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
416 * dma must have hit an error on that descriptor, so use dma_status
417 * instead and assume that all following descriptors must be re-tried.
419 struct mm_page *page;
420 struct bio *return_bio = NULL;
421 struct cardinfo *card = (struct cardinfo *)data;
422 unsigned int dma_status = card->dma_status;
424 spin_lock(&card->lock);
425 if (card->Active < 0)
426 goto out_unlock;
427 page = &card->mm_pages[card->Active];
429 while (page->headcnt < page->cnt) {
430 struct bio *bio = page->bio;
431 struct mm_dma_desc *desc = &page->desc[page->headcnt];
432 int control = le32_to_cpu(desc->sem_control_bits);
433 int last = 0;
434 struct bio_vec vec;
436 if (!(control & DMASCR_DMA_COMPLETE)) {
437 control = dma_status;
438 last = 1;
441 page->headcnt++;
442 vec = bio_iter_iovec(bio, page->iter);
443 bio_advance_iter(bio, &page->iter, vec.bv_len);
445 if (!page->iter.bi_size) {
446 page->bio = bio->bi_next;
447 if (page->bio)
448 page->iter = page->bio->bi_iter;
451 dma_unmap_page(&card->dev->dev, desc->data_dma_handle,
452 vec.bv_len,
453 (control & DMASCR_TRANSFER_READ) ?
454 DMA_TO_DEVICE : DMA_FROM_DEVICE);
455 if (control & DMASCR_HARD_ERROR) {
456 /* error */
457 bio->bi_status = BLK_STS_IOERR;
458 dev_printk(KERN_WARNING, &card->dev->dev,
459 "I/O error on sector %d/%d\n",
460 le32_to_cpu(desc->local_addr)>>9,
461 le32_to_cpu(desc->transfer_size));
462 dump_dmastat(card, control);
463 } else if (op_is_write(bio_op(bio)) &&
464 le32_to_cpu(desc->local_addr) >> 9 ==
465 card->init_size) {
466 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
467 if (card->init_size >> 1 >= card->mm_size) {
468 dev_printk(KERN_INFO, &card->dev->dev,
469 "memory now initialised\n");
470 set_userbit(card, MEMORY_INITIALIZED, 1);
473 if (bio != page->bio) {
474 bio->bi_next = return_bio;
475 return_bio = bio;
478 if (last)
479 break;
482 if (debug & DEBUG_LED_ON_TRANSFER)
483 set_led(card, LED_REMOVE, LED_OFF);
485 if (card->check_batteries) {
486 card->check_batteries = 0;
487 check_batteries(card);
489 if (page->headcnt >= page->cnt) {
490 reset_page(page);
491 card->Active = -1;
492 activate(card);
493 } else {
494 /* haven't finished with this one yet */
495 pr_debug("do some more\n");
496 mm_start_io(card);
498 out_unlock:
499 spin_unlock(&card->lock);
501 while (return_bio) {
502 struct bio *bio = return_bio;
504 return_bio = bio->bi_next;
505 bio->bi_next = NULL;
506 bio_endio(bio);
510 static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
512 struct cardinfo *card = cb->data;
514 spin_lock_irq(&card->lock);
515 activate(card);
516 spin_unlock_irq(&card->lock);
517 kfree(cb);
520 static int mm_check_plugged(struct cardinfo *card)
522 return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
525 static blk_qc_t mm_make_request(struct request_queue *q, struct bio *bio)
527 struct cardinfo *card = q->queuedata;
528 pr_debug("mm_make_request %llu %u\n",
529 (unsigned long long)bio->bi_iter.bi_sector,
530 bio->bi_iter.bi_size);
532 blk_queue_split(q, &bio);
534 spin_lock_irq(&card->lock);
535 *card->biotail = bio;
536 bio->bi_next = NULL;
537 card->biotail = &bio->bi_next;
538 if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card))
539 activate(card);
540 spin_unlock_irq(&card->lock);
542 return BLK_QC_T_NONE;
545 static irqreturn_t mm_interrupt(int irq, void *__card)
547 struct cardinfo *card = (struct cardinfo *) __card;
548 unsigned int dma_status;
549 unsigned short cfg_status;
551 HW_TRACE(0x30);
553 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
555 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
556 /* interrupt wasn't for me ... */
557 return IRQ_NONE;
560 /* clear COMPLETION interrupts */
561 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
562 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
563 card->csr_remap + DMA_STATUS_CTRL);
564 else
565 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
566 card->csr_remap + DMA_STATUS_CTRL + 2);
568 /* log errors and clear interrupt status */
569 if (dma_status & DMASCR_ANY_ERR) {
570 unsigned int data_log1, data_log2;
571 unsigned int addr_log1, addr_log2;
572 unsigned char stat, count, syndrome, check;
574 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
576 data_log1 = le32_to_cpu(readl(card->csr_remap +
577 ERROR_DATA_LOG));
578 data_log2 = le32_to_cpu(readl(card->csr_remap +
579 ERROR_DATA_LOG + 4));
580 addr_log1 = le32_to_cpu(readl(card->csr_remap +
581 ERROR_ADDR_LOG));
582 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
584 count = readb(card->csr_remap + ERROR_COUNT);
585 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
586 check = readb(card->csr_remap + ERROR_CHECK);
588 dump_dmastat(card, dma_status);
590 if (stat & 0x01)
591 dev_printk(KERN_ERR, &card->dev->dev,
592 "Memory access error detected (err count %d)\n",
593 count);
594 if (stat & 0x02)
595 dev_printk(KERN_ERR, &card->dev->dev,
596 "Multi-bit EDC error\n");
598 dev_printk(KERN_ERR, &card->dev->dev,
599 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
600 addr_log2, addr_log1, data_log2, data_log1);
601 dev_printk(KERN_ERR, &card->dev->dev,
602 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
603 check, syndrome);
605 writeb(0, card->csr_remap + ERROR_COUNT);
608 if (dma_status & DMASCR_PARITY_ERR_REP) {
609 dev_printk(KERN_ERR, &card->dev->dev,
610 "PARITY ERROR REPORTED\n");
611 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
612 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
615 if (dma_status & DMASCR_PARITY_ERR_DET) {
616 dev_printk(KERN_ERR, &card->dev->dev,
617 "PARITY ERROR DETECTED\n");
618 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
619 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
622 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
623 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
624 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
625 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
628 if (dma_status & DMASCR_TARGET_ABT) {
629 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
630 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
631 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
634 if (dma_status & DMASCR_MASTER_ABT) {
635 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
636 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
637 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
640 /* and process the DMA descriptors */
641 card->dma_status = dma_status;
642 tasklet_schedule(&card->tasklet);
644 HW_TRACE(0x36);
646 return IRQ_HANDLED;
650 * If both batteries are good, no LED
651 * If either battery has been warned, solid LED
652 * If both batteries are bad, flash the LED quickly
653 * If either battery is bad, flash the LED semi quickly
655 static void set_fault_to_battery_status(struct cardinfo *card)
657 if (card->battery[0].good && card->battery[1].good)
658 set_led(card, LED_FAULT, LED_OFF);
659 else if (card->battery[0].warned || card->battery[1].warned)
660 set_led(card, LED_FAULT, LED_ON);
661 else if (!card->battery[0].good && !card->battery[1].good)
662 set_led(card, LED_FAULT, LED_FLASH_7_0);
663 else
664 set_led(card, LED_FAULT, LED_FLASH_3_5);
667 static void init_battery_timer(void);
669 static int check_battery(struct cardinfo *card, int battery, int status)
671 if (status != card->battery[battery].good) {
672 card->battery[battery].good = !card->battery[battery].good;
673 card->battery[battery].last_change = jiffies;
675 if (card->battery[battery].good) {
676 dev_printk(KERN_ERR, &card->dev->dev,
677 "Battery %d now good\n", battery + 1);
678 card->battery[battery].warned = 0;
679 } else
680 dev_printk(KERN_ERR, &card->dev->dev,
681 "Battery %d now FAILED\n", battery + 1);
683 return 1;
684 } else if (!card->battery[battery].good &&
685 !card->battery[battery].warned &&
686 time_after_eq(jiffies, card->battery[battery].last_change +
687 (HZ * 60 * 60 * 5))) {
688 dev_printk(KERN_ERR, &card->dev->dev,
689 "Battery %d still FAILED after 5 hours\n", battery + 1);
690 card->battery[battery].warned = 1;
692 return 1;
695 return 0;
698 static void check_batteries(struct cardinfo *card)
700 /* NOTE: this must *never* be called while the card
701 * is doing (bus-to-card) DMA, or you will need the
702 * reset switch
704 unsigned char status;
705 int ret1, ret2;
707 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
708 if (debug & DEBUG_BATTERY_POLLING)
709 dev_printk(KERN_DEBUG, &card->dev->dev,
710 "checking battery status, 1 = %s, 2 = %s\n",
711 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
712 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
714 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
715 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
717 if (ret1 || ret2)
718 set_fault_to_battery_status(card);
721 static void check_all_batteries(struct timer_list *unused)
723 int i;
725 for (i = 0; i < num_cards; i++)
726 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
727 struct cardinfo *card = &cards[i];
728 spin_lock_bh(&card->lock);
729 if (card->Active >= 0)
730 card->check_batteries = 1;
731 else
732 check_batteries(card);
733 spin_unlock_bh(&card->lock);
736 init_battery_timer();
739 static void init_battery_timer(void)
741 timer_setup(&battery_timer, check_all_batteries, 0);
742 battery_timer.expires = jiffies + (HZ * 60);
743 add_timer(&battery_timer);
746 static void del_battery_timer(void)
748 del_timer(&battery_timer);
752 * Note no locks taken out here. In a worst case scenario, we could drop
753 * a chunk of system memory. But that should never happen, since validation
754 * happens at open or mount time, when locks are held.
756 * That's crap, since doing that while some partitions are opened
757 * or mounted will give you really nasty results.
759 static int mm_revalidate(struct gendisk *disk)
761 struct cardinfo *card = disk->private_data;
762 set_capacity(disk, card->mm_size << 1);
763 return 0;
766 static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
768 struct cardinfo *card = bdev->bd_disk->private_data;
769 int size = card->mm_size * (1024 / MM_HARDSECT);
772 * get geometry: we have to fake one... trim the size to a
773 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
774 * whatever cylinders.
776 geo->heads = 64;
777 geo->sectors = 32;
778 geo->cylinders = size / (geo->heads * geo->sectors);
779 return 0;
782 static const struct block_device_operations mm_fops = {
783 .owner = THIS_MODULE,
784 .getgeo = mm_getgeo,
785 .revalidate_disk = mm_revalidate,
788 static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
790 int ret = -ENODEV;
791 struct cardinfo *card = &cards[num_cards];
792 unsigned char mem_present;
793 unsigned char batt_status;
794 unsigned int saved_bar, data;
795 unsigned long csr_base;
796 unsigned long csr_len;
797 int magic_number;
798 static int printed_version;
800 if (!printed_version++)
801 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
803 ret = pci_enable_device(dev);
804 if (ret)
805 return ret;
807 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
808 pci_set_master(dev);
810 card->dev = dev;
812 csr_base = pci_resource_start(dev, 0);
813 csr_len = pci_resource_len(dev, 0);
814 if (!csr_base || !csr_len)
815 return -ENODEV;
817 dev_printk(KERN_INFO, &dev->dev,
818 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
820 if (dma_set_mask(&dev->dev, DMA_BIT_MASK(64)) &&
821 dma_set_mask(&dev->dev, DMA_BIT_MASK(32))) {
822 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
823 return -ENOMEM;
826 ret = pci_request_regions(dev, DRIVER_NAME);
827 if (ret) {
828 dev_printk(KERN_ERR, &card->dev->dev,
829 "Unable to request memory region\n");
830 goto failed_req_csr;
833 card->csr_remap = ioremap_nocache(csr_base, csr_len);
834 if (!card->csr_remap) {
835 dev_printk(KERN_ERR, &card->dev->dev,
836 "Unable to remap memory region\n");
837 ret = -ENOMEM;
839 goto failed_remap_csr;
842 dev_printk(KERN_INFO, &card->dev->dev,
843 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
844 csr_base, card->csr_remap, csr_len);
846 switch (card->dev->device) {
847 case 0x5415:
848 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
849 magic_number = 0x59;
850 break;
852 case 0x5425:
853 card->flags |= UM_FLAG_NO_BYTE_STATUS;
854 magic_number = 0x5C;
855 break;
857 case 0x6155:
858 card->flags |= UM_FLAG_NO_BYTE_STATUS |
859 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
860 magic_number = 0x99;
861 break;
863 default:
864 magic_number = 0x100;
865 break;
868 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
869 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
870 ret = -ENOMEM;
871 goto failed_magic;
874 card->mm_pages[0].desc = dma_alloc_coherent(&card->dev->dev,
875 PAGE_SIZE * 2, &card->mm_pages[0].page_dma, GFP_KERNEL);
876 card->mm_pages[1].desc = dma_alloc_coherent(&card->dev->dev,
877 PAGE_SIZE * 2, &card->mm_pages[1].page_dma, GFP_KERNEL);
878 if (card->mm_pages[0].desc == NULL ||
879 card->mm_pages[1].desc == NULL) {
880 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
881 goto failed_alloc;
883 reset_page(&card->mm_pages[0]);
884 reset_page(&card->mm_pages[1]);
885 card->Ready = 0; /* page 0 is ready */
886 card->Active = -1; /* no page is active */
887 card->bio = NULL;
888 card->biotail = &card->bio;
889 spin_lock_init(&card->lock);
891 card->queue = blk_alloc_queue_node(GFP_KERNEL, NUMA_NO_NODE);
892 if (!card->queue)
893 goto failed_alloc;
895 blk_queue_make_request(card->queue, mm_make_request);
896 card->queue->queuedata = card;
898 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
900 card->check_batteries = 0;
902 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
903 switch (mem_present) {
904 case MEM_128_MB:
905 card->mm_size = 1024 * 128;
906 break;
907 case MEM_256_MB:
908 card->mm_size = 1024 * 256;
909 break;
910 case MEM_512_MB:
911 card->mm_size = 1024 * 512;
912 break;
913 case MEM_1_GB:
914 card->mm_size = 1024 * 1024;
915 break;
916 case MEM_2_GB:
917 card->mm_size = 1024 * 2048;
918 break;
919 default:
920 card->mm_size = 0;
921 break;
924 /* Clear the LED's we control */
925 set_led(card, LED_REMOVE, LED_OFF);
926 set_led(card, LED_FAULT, LED_OFF);
928 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
930 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
931 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
932 card->battery[0].last_change = card->battery[1].last_change = jiffies;
934 if (card->flags & UM_FLAG_NO_BATT)
935 dev_printk(KERN_INFO, &card->dev->dev,
936 "Size %d KB\n", card->mm_size);
937 else {
938 dev_printk(KERN_INFO, &card->dev->dev,
939 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
940 card->mm_size,
941 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
942 card->battery[0].good ? "OK" : "FAILURE",
943 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
944 card->battery[1].good ? "OK" : "FAILURE");
946 set_fault_to_battery_status(card);
949 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
950 data = 0xffffffff;
951 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
952 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
953 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
954 data &= 0xfffffff0;
955 data = ~data;
956 data += 1;
958 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
959 card)) {
960 dev_printk(KERN_ERR, &card->dev->dev,
961 "Unable to allocate IRQ\n");
962 ret = -ENODEV;
963 goto failed_req_irq;
966 dev_printk(KERN_INFO, &card->dev->dev,
967 "Window size %d bytes, IRQ %d\n", data, dev->irq);
969 pci_set_drvdata(dev, card);
971 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
972 pci_write_cmd = 0x07; /* then Memory Write command */
974 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
975 unsigned short cfg_command;
976 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
977 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
978 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
980 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
982 num_cards++;
984 if (!get_userbit(card, MEMORY_INITIALIZED)) {
985 dev_printk(KERN_INFO, &card->dev->dev,
986 "memory NOT initialized. Consider over-writing whole device.\n");
987 card->init_size = 0;
988 } else {
989 dev_printk(KERN_INFO, &card->dev->dev,
990 "memory already initialized\n");
991 card->init_size = card->mm_size;
994 /* Enable ECC */
995 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
997 return 0;
999 failed_req_irq:
1000 failed_alloc:
1001 if (card->mm_pages[0].desc)
1002 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1003 card->mm_pages[0].desc,
1004 card->mm_pages[0].page_dma);
1005 if (card->mm_pages[1].desc)
1006 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1007 card->mm_pages[1].desc,
1008 card->mm_pages[1].page_dma);
1009 failed_magic:
1010 iounmap(card->csr_remap);
1011 failed_remap_csr:
1012 pci_release_regions(dev);
1013 failed_req_csr:
1015 return ret;
1018 static void mm_pci_remove(struct pci_dev *dev)
1020 struct cardinfo *card = pci_get_drvdata(dev);
1022 tasklet_kill(&card->tasklet);
1023 free_irq(dev->irq, card);
1024 iounmap(card->csr_remap);
1026 if (card->mm_pages[0].desc)
1027 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1028 card->mm_pages[0].desc,
1029 card->mm_pages[0].page_dma);
1030 if (card->mm_pages[1].desc)
1031 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1032 card->mm_pages[1].desc,
1033 card->mm_pages[1].page_dma);
1034 blk_cleanup_queue(card->queue);
1036 pci_release_regions(dev);
1037 pci_disable_device(dev);
1040 static const struct pci_device_id mm_pci_ids[] = {
1041 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1042 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1043 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
1045 .vendor = 0x8086,
1046 .device = 0xB555,
1047 .subvendor = 0x1332,
1048 .subdevice = 0x5460,
1049 .class = 0x050000,
1050 .class_mask = 0,
1051 }, { /* end: all zeroes */ }
1054 MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1056 static struct pci_driver mm_pci_driver = {
1057 .name = DRIVER_NAME,
1058 .id_table = mm_pci_ids,
1059 .probe = mm_pci_probe,
1060 .remove = mm_pci_remove,
1063 static int __init mm_init(void)
1065 int retval, i;
1066 int err;
1068 retval = pci_register_driver(&mm_pci_driver);
1069 if (retval)
1070 return -ENOMEM;
1072 err = major_nr = register_blkdev(0, DRIVER_NAME);
1073 if (err < 0) {
1074 pci_unregister_driver(&mm_pci_driver);
1075 return -EIO;
1078 for (i = 0; i < num_cards; i++) {
1079 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1080 if (!mm_gendisk[i])
1081 goto out;
1084 for (i = 0; i < num_cards; i++) {
1085 struct gendisk *disk = mm_gendisk[i];
1086 sprintf(disk->disk_name, "umem%c", 'a'+i);
1087 spin_lock_init(&cards[i].lock);
1088 disk->major = major_nr;
1089 disk->first_minor = i << MM_SHIFT;
1090 disk->fops = &mm_fops;
1091 disk->private_data = &cards[i];
1092 disk->queue = cards[i].queue;
1093 set_capacity(disk, cards[i].mm_size << 1);
1094 add_disk(disk);
1097 init_battery_timer();
1098 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1099 /* printk("mm_init: Done. 10-19-01 9:00\n"); */
1100 return 0;
1102 out:
1103 pci_unregister_driver(&mm_pci_driver);
1104 unregister_blkdev(major_nr, DRIVER_NAME);
1105 while (i--)
1106 put_disk(mm_gendisk[i]);
1107 return -ENOMEM;
1110 static void __exit mm_cleanup(void)
1112 int i;
1114 del_battery_timer();
1116 for (i = 0; i < num_cards ; i++) {
1117 del_gendisk(mm_gendisk[i]);
1118 put_disk(mm_gendisk[i]);
1121 pci_unregister_driver(&mm_pci_driver);
1123 unregister_blkdev(major_nr, DRIVER_NAME);
1126 module_init(mm_init);
1127 module_exit(mm_cleanup);
1129 MODULE_AUTHOR(DRIVER_AUTHOR);
1130 MODULE_DESCRIPTION(DRIVER_DESC);
1131 MODULE_LICENSE("GPL");