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Linux 5.1.15
[linux/fpc-iii.git] / drivers / i3c / master.c
blob5f4bd52121fe93c5843767ce4614a97965cddd2d
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19
20 #include "internals.h"
21
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24
25 /**
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
28 *
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
32 * - re-triggering DAA
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
35 * - ...
36 *
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
39 * back.
40 */
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42 {
43 down_write(&bus->lock);
44 }
45
46 /**
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48 * operation
49 * @bus: I3C bus to release the lock on
50 *
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
53 * operations are.
54 */
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56 {
57 up_write(&bus->lock);
58 }
59
60 /**
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
63 *
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
69 *
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
75 */
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77 {
78 down_read(&bus->lock);
79 }
80
81 /**
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
84 *
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
87 * are.
88 */
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90 {
91 up_read(&bus->lock);
92 }
93
94 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
95 {
96 return container_of(dev, struct i3c_master_controller, dev);
97 }
98
99 static const struct device_type i3c_device_type;
100
101 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
102 {
103 struct i3c_master_controller *master;
104
105 if (dev->type == &i3c_device_type)
106 return dev_to_i3cdev(dev)->bus;
107
108 master = dev_to_i3cmaster(dev);
109
110 return &master->bus;
111 }
112
113 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
114 {
115 struct i3c_master_controller *master;
116
117 if (dev->type == &i3c_device_type)
118 return dev_to_i3cdev(dev)->desc;
119
120 master = container_of(dev, struct i3c_master_controller, dev);
121
122 return master->this;
123 }
124
125 static ssize_t bcr_show(struct device *dev,
126 struct device_attribute *da,
127 char *buf)
128 {
129 struct i3c_bus *bus = dev_to_i3cbus(dev);
130 struct i3c_dev_desc *desc;
131 ssize_t ret;
132
133 i3c_bus_normaluse_lock(bus);
134 desc = dev_to_i3cdesc(dev);
135 ret = sprintf(buf, "%x\n", desc->info.bcr);
136 i3c_bus_normaluse_unlock(bus);
137
138 return ret;
139 }
140 static DEVICE_ATTR_RO(bcr);
141
142 static ssize_t dcr_show(struct device *dev,
143 struct device_attribute *da,
144 char *buf)
145 {
146 struct i3c_bus *bus = dev_to_i3cbus(dev);
147 struct i3c_dev_desc *desc;
148 ssize_t ret;
149
150 i3c_bus_normaluse_lock(bus);
151 desc = dev_to_i3cdesc(dev);
152 ret = sprintf(buf, "%x\n", desc->info.dcr);
153 i3c_bus_normaluse_unlock(bus);
154
155 return ret;
156 }
157 static DEVICE_ATTR_RO(dcr);
158
159 static ssize_t pid_show(struct device *dev,
160 struct device_attribute *da,
161 char *buf)
162 {
163 struct i3c_bus *bus = dev_to_i3cbus(dev);
164 struct i3c_dev_desc *desc;
165 ssize_t ret;
166
167 i3c_bus_normaluse_lock(bus);
168 desc = dev_to_i3cdesc(dev);
169 ret = sprintf(buf, "%llx\n", desc->info.pid);
170 i3c_bus_normaluse_unlock(bus);
171
172 return ret;
173 }
174 static DEVICE_ATTR_RO(pid);
175
176 static ssize_t dynamic_address_show(struct device *dev,
177 struct device_attribute *da,
178 char *buf)
179 {
180 struct i3c_bus *bus = dev_to_i3cbus(dev);
181 struct i3c_dev_desc *desc;
182 ssize_t ret;
183
184 i3c_bus_normaluse_lock(bus);
185 desc = dev_to_i3cdesc(dev);
186 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
187 i3c_bus_normaluse_unlock(bus);
188
189 return ret;
190 }
191 static DEVICE_ATTR_RO(dynamic_address);
192
193 static const char * const hdrcap_strings[] = {
194 "hdr-ddr", "hdr-tsp", "hdr-tsl",
195 };
196
197 static ssize_t hdrcap_show(struct device *dev,
198 struct device_attribute *da,
199 char *buf)
200 {
201 struct i3c_bus *bus = dev_to_i3cbus(dev);
202 struct i3c_dev_desc *desc;
203 ssize_t offset = 0, ret;
204 unsigned long caps;
205 int mode;
206
207 i3c_bus_normaluse_lock(bus);
208 desc = dev_to_i3cdesc(dev);
209 caps = desc->info.hdr_cap;
210 for_each_set_bit(mode, &caps, 8) {
211 if (mode >= ARRAY_SIZE(hdrcap_strings))
212 break;
213
214 if (!hdrcap_strings[mode])
215 continue;
216
217 ret = sprintf(buf + offset, offset ? " %s" : "%s",
218 hdrcap_strings[mode]);
219 if (ret < 0)
220 goto out;
221
222 offset += ret;
223 }
224
225 ret = sprintf(buf + offset, "\n");
226 if (ret < 0)
227 goto out;
228
229 ret = offset + ret;
230
231 out:
232 i3c_bus_normaluse_unlock(bus);
233
234 return ret;
235 }
236 static DEVICE_ATTR_RO(hdrcap);
237
238 static struct attribute *i3c_device_attrs[] = {
239 &dev_attr_bcr.attr,
240 &dev_attr_dcr.attr,
241 &dev_attr_pid.attr,
242 &dev_attr_dynamic_address.attr,
243 &dev_attr_hdrcap.attr,
244 NULL,
245 };
246 ATTRIBUTE_GROUPS(i3c_device);
247
248 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
249 {
250 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
251 struct i3c_device_info devinfo;
252 u16 manuf, part, ext;
253
254 i3c_device_get_info(i3cdev, &devinfo);
255 manuf = I3C_PID_MANUF_ID(devinfo.pid);
256 part = I3C_PID_PART_ID(devinfo.pid);
257 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
258
259 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
260 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
261 devinfo.dcr, manuf);
262
263 return add_uevent_var(env,
264 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04xext%04x",
265 devinfo.dcr, manuf, part, ext);
266 }
267
268 static const struct device_type i3c_device_type = {
269 .groups = i3c_device_groups,
270 .uevent = i3c_device_uevent,
271 };
272
273 static const struct i3c_device_id *
274 i3c_device_match_id(struct i3c_device *i3cdev,
275 const struct i3c_device_id *id_table)
276 {
277 struct i3c_device_info devinfo;
278 const struct i3c_device_id *id;
279
280 i3c_device_get_info(i3cdev, &devinfo);
281
282 /*
283 * The lower 32bits of the provisional ID is just filled with a random
284 * value, try to match using DCR info.
285 */
286 if (!I3C_PID_RND_LOWER_32BITS(devinfo.pid)) {
287 u16 manuf = I3C_PID_MANUF_ID(devinfo.pid);
288 u16 part = I3C_PID_PART_ID(devinfo.pid);
289 u16 ext_info = I3C_PID_EXTRA_INFO(devinfo.pid);
290
291 /* First try to match by manufacturer/part ID. */
292 for (id = id_table; id->match_flags != 0; id++) {
293 if ((id->match_flags & I3C_MATCH_MANUF_AND_PART) !=
294 I3C_MATCH_MANUF_AND_PART)
295 continue;
296
297 if (manuf != id->manuf_id || part != id->part_id)
298 continue;
299
300 if ((id->match_flags & I3C_MATCH_EXTRA_INFO) &&
301 ext_info != id->extra_info)
302 continue;
303
304 return id;
305 }
306 }
307
308 /* Fallback to DCR match. */
309 for (id = id_table; id->match_flags != 0; id++) {
310 if ((id->match_flags & I3C_MATCH_DCR) &&
311 id->dcr == devinfo.dcr)
312 return id;
313 }
314
315 return NULL;
316 }
317
318 static int i3c_device_match(struct device *dev, struct device_driver *drv)
319 {
320 struct i3c_device *i3cdev;
321 struct i3c_driver *i3cdrv;
322
323 if (dev->type != &i3c_device_type)
324 return 0;
325
326 i3cdev = dev_to_i3cdev(dev);
327 i3cdrv = drv_to_i3cdrv(drv);
328 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
329 return 1;
330
331 return 0;
332 }
333
334 static int i3c_device_probe(struct device *dev)
335 {
336 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
337 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
338
339 return driver->probe(i3cdev);
340 }
341
342 static int i3c_device_remove(struct device *dev)
343 {
344 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
345 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
346 int ret;
347
348 ret = driver->remove(i3cdev);
349 if (ret)
350 return ret;
351
352 i3c_device_free_ibi(i3cdev);
353
354 return ret;
355 }
356
357 struct bus_type i3c_bus_type = {
358 .name = "i3c",
359 .match = i3c_device_match,
360 .probe = i3c_device_probe,
361 .remove = i3c_device_remove,
362 };
363
364 static enum i3c_addr_slot_status
365 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
366 {
367 int status, bitpos = addr * 2;
368
369 if (addr > I2C_MAX_ADDR)
370 return I3C_ADDR_SLOT_RSVD;
371
372 status = bus->addrslots[bitpos / BITS_PER_LONG];
373 status >>= bitpos % BITS_PER_LONG;
374
375 return status & I3C_ADDR_SLOT_STATUS_MASK;
376 }
377
378 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
379 enum i3c_addr_slot_status status)
380 {
381 int bitpos = addr * 2;
382 unsigned long *ptr;
383
384 if (addr > I2C_MAX_ADDR)
385 return;
386
387 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
388 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
389 (bitpos % BITS_PER_LONG));
390 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
391 }
392
393 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
394 {
395 enum i3c_addr_slot_status status;
396
397 status = i3c_bus_get_addr_slot_status(bus, addr);
398
399 return status == I3C_ADDR_SLOT_FREE;
400 }
401
402 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
403 {
404 enum i3c_addr_slot_status status;
405 u8 addr;
406
407 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
408 status = i3c_bus_get_addr_slot_status(bus, addr);
409 if (status == I3C_ADDR_SLOT_FREE)
410 return addr;
411 }
412
413 return -ENOMEM;
414 }
415
416 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
417 {
418 int i;
419
420 /* Addresses 0 to 7 are reserved. */
421 for (i = 0; i < 8; i++)
422 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
423
424 /*
425 * Reserve broadcast address and all addresses that might collide
426 * with the broadcast address when facing a single bit error.
427 */
428 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
429 I3C_ADDR_SLOT_RSVD);
430 for (i = 0; i < 7; i++)
431 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
432 I3C_ADDR_SLOT_RSVD);
433 }
434
435 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
436 {
437 mutex_lock(&i3c_core_lock);
438 idr_remove(&i3c_bus_idr, i3cbus->id);
439 mutex_unlock(&i3c_core_lock);
440 }
441
442 static int i3c_bus_init(struct i3c_bus *i3cbus)
443 {
444 int ret;
445
446 init_rwsem(&i3cbus->lock);
447 INIT_LIST_HEAD(&i3cbus->devs.i2c);
448 INIT_LIST_HEAD(&i3cbus->devs.i3c);
449 i3c_bus_init_addrslots(i3cbus);
450 i3cbus->mode = I3C_BUS_MODE_PURE;
451
452 mutex_lock(&i3c_core_lock);
453 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
454 mutex_unlock(&i3c_core_lock);
455
456 if (ret < 0)
457 return ret;
458
459 i3cbus->id = ret;
460
461 return 0;
462 }
463
464 static const char * const i3c_bus_mode_strings[] = {
465 [I3C_BUS_MODE_PURE] = "pure",
466 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
467 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
468 };
469
470 static ssize_t mode_show(struct device *dev,
471 struct device_attribute *da,
472 char *buf)
473 {
474 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
475 ssize_t ret;
476
477 i3c_bus_normaluse_lock(i3cbus);
478 if (i3cbus->mode < 0 ||
479 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
480 !i3c_bus_mode_strings[i3cbus->mode])
481 ret = sprintf(buf, "unknown\n");
482 else
483 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
484 i3c_bus_normaluse_unlock(i3cbus);
485
486 return ret;
487 }
488 static DEVICE_ATTR_RO(mode);
489
490 static ssize_t current_master_show(struct device *dev,
491 struct device_attribute *da,
492 char *buf)
493 {
494 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
495 ssize_t ret;
496
497 i3c_bus_normaluse_lock(i3cbus);
498 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
499 i3cbus->cur_master->info.pid);
500 i3c_bus_normaluse_unlock(i3cbus);
501
502 return ret;
503 }
504 static DEVICE_ATTR_RO(current_master);
505
506 static ssize_t i3c_scl_frequency_show(struct device *dev,
507 struct device_attribute *da,
508 char *buf)
509 {
510 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
511 ssize_t ret;
512
513 i3c_bus_normaluse_lock(i3cbus);
514 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
515 i3c_bus_normaluse_unlock(i3cbus);
516
517 return ret;
518 }
519 static DEVICE_ATTR_RO(i3c_scl_frequency);
520
521 static ssize_t i2c_scl_frequency_show(struct device *dev,
522 struct device_attribute *da,
523 char *buf)
524 {
525 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
526 ssize_t ret;
527
528 i3c_bus_normaluse_lock(i3cbus);
529 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
530 i3c_bus_normaluse_unlock(i3cbus);
531
532 return ret;
533 }
534 static DEVICE_ATTR_RO(i2c_scl_frequency);
535
536 static struct attribute *i3c_masterdev_attrs[] = {
537 &dev_attr_mode.attr,
538 &dev_attr_current_master.attr,
539 &dev_attr_i3c_scl_frequency.attr,
540 &dev_attr_i2c_scl_frequency.attr,
541 &dev_attr_bcr.attr,
542 &dev_attr_dcr.attr,
543 &dev_attr_pid.attr,
544 &dev_attr_dynamic_address.attr,
545 &dev_attr_hdrcap.attr,
546 NULL,
547 };
548 ATTRIBUTE_GROUPS(i3c_masterdev);
549
550 static void i3c_masterdev_release(struct device *dev)
551 {
552 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
553 struct i3c_bus *bus = dev_to_i3cbus(dev);
554
555 if (master->wq)
556 destroy_workqueue(master->wq);
557
558 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
559 i3c_bus_cleanup(bus);
560
561 of_node_put(dev->of_node);
562 }
563
564 static const struct device_type i3c_masterdev_type = {
565 .groups = i3c_masterdev_groups,
566 };
567
568 int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode)
569 {
570 i3cbus->mode = mode;
571
572 if (!i3cbus->scl_rate.i3c)
573 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
574
575 if (!i3cbus->scl_rate.i2c) {
576 if (i3cbus->mode == I3C_BUS_MODE_MIXED_SLOW)
577 i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE;
578 else
579 i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
580 }
581
582 /*
583 * I3C/I2C frequency may have been overridden, check that user-provided
584 * values are not exceeding max possible frequency.
585 */
586 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
587 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
588 return -EINVAL;
589
590 return 0;
591 }
592
593 static struct i3c_master_controller *
594 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
595 {
596 return container_of(adap, struct i3c_master_controller, i2c);
597 }
598
599 static struct i2c_adapter *
600 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
601 {
602 return &master->i2c;
603 }
604
605 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
606 {
607 kfree(dev);
608 }
609
610 static struct i2c_dev_desc *
611 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
612 const struct i2c_dev_boardinfo *boardinfo)
613 {
614 struct i2c_dev_desc *dev;
615
616 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
617 if (!dev)
618 return ERR_PTR(-ENOMEM);
619
620 dev->common.master = master;
621 dev->boardinfo = boardinfo;
622
623 return dev;
624 }
625
626 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
627 u16 payloadlen)
628 {
629 dest->addr = addr;
630 dest->payload.len = payloadlen;
631 if (payloadlen)
632 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
633 else
634 dest->payload.data = NULL;
635
636 return dest->payload.data;
637 }
638
639 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
640 {
641 kfree(dest->payload.data);
642 }
643
644 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
645 struct i3c_ccc_cmd_dest *dests,
646 unsigned int ndests)
647 {
648 cmd->rnw = rnw ? 1 : 0;
649 cmd->id = id;
650 cmd->dests = dests;
651 cmd->ndests = ndests;
652 cmd->err = I3C_ERROR_UNKNOWN;
653 }
654
655 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
656 struct i3c_ccc_cmd *cmd)
657 {
658 int ret;
659
660 if (!cmd || !master)
661 return -EINVAL;
662
663 if (WARN_ON(master->init_done &&
664 !rwsem_is_locked(&master->bus.lock)))
665 return -EINVAL;
666
667 if (!master->ops->send_ccc_cmd)
668 return -ENOTSUPP;
669
670 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
671 return -EINVAL;
672
673 if (master->ops->supports_ccc_cmd &&
674 !master->ops->supports_ccc_cmd(master, cmd))
675 return -ENOTSUPP;
676
677 ret = master->ops->send_ccc_cmd(master, cmd);
678 if (ret) {
679 if (cmd->err != I3C_ERROR_UNKNOWN)
680 return cmd->err;
681
682 return ret;
683 }
684
685 return 0;
686 }
687
688 static struct i2c_dev_desc *
689 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
690 u16 addr)
691 {
692 struct i2c_dev_desc *dev;
693
694 i3c_bus_for_each_i2cdev(&master->bus, dev) {
695 if (dev->boardinfo->base.addr == addr)
696 return dev;
697 }
698
699 return NULL;
700 }
701
702 /**
703 * i3c_master_get_free_addr() - get a free address on the bus
704 * @master: I3C master object
705 * @start_addr: where to start searching
706 *
707 * This function must be called with the bus lock held in write mode.
708 *
709 * Return: the first free address starting at @start_addr (included) or -ENOMEM
710 * if there's no more address available.
711 */
712 int i3c_master_get_free_addr(struct i3c_master_controller *master,
713 u8 start_addr)
714 {
715 return i3c_bus_get_free_addr(&master->bus, start_addr);
716 }
717 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
718
719 static void i3c_device_release(struct device *dev)
720 {
721 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
722
723 WARN_ON(i3cdev->desc);
724
725 of_node_put(i3cdev->dev.of_node);
726 kfree(i3cdev);
727 }
728
729 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
730 {
731 kfree(dev);
732 }
733
734 static struct i3c_dev_desc *
735 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
736 const struct i3c_device_info *info)
737 {
738 struct i3c_dev_desc *dev;
739
740 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
741 if (!dev)
742 return ERR_PTR(-ENOMEM);
743
744 dev->common.master = master;
745 dev->info = *info;
746 mutex_init(&dev->ibi_lock);
747
748 return dev;
749 }
750
751 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
752 u8 addr)
753 {
754 enum i3c_addr_slot_status addrstat;
755 struct i3c_ccc_cmd_dest dest;
756 struct i3c_ccc_cmd cmd;
757 int ret;
758
759 if (!master)
760 return -EINVAL;
761
762 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
763 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
764 return -EINVAL;
765
766 i3c_ccc_cmd_dest_init(&dest, addr, 0);
767 i3c_ccc_cmd_init(&cmd, false,
768 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
769 &dest, 1);
770 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
771 i3c_ccc_cmd_dest_cleanup(&dest);
772
773 return ret;
774 }
775
776 /**
777 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
778 * procedure
779 * @master: master used to send frames on the bus
780 *
781 * Send a ENTDAA CCC command to start a DAA procedure.
782 *
783 * Note that this function only sends the ENTDAA CCC command, all the logic
784 * behind dynamic address assignment has to be handled in the I3C master
785 * driver.
786 *
787 * This function must be called with the bus lock held in write mode.
788 *
789 * Return: 0 in case of success, a positive I3C error code if the error is
790 * one of the official Mx error codes, and a negative error code otherwise.
791 */
792 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
793 {
794 struct i3c_ccc_cmd_dest dest;
795 struct i3c_ccc_cmd cmd;
796 int ret;
797
798 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
799 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
800 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
801 i3c_ccc_cmd_dest_cleanup(&dest);
802
803 return ret;
804 }
805 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
806
807 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
808 u8 addr, bool enable, u8 evts)
809 {
810 struct i3c_ccc_events *events;
811 struct i3c_ccc_cmd_dest dest;
812 struct i3c_ccc_cmd cmd;
813 int ret;
814
815 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
816 if (!events)
817 return -ENOMEM;
818
819 events->events = evts;
820 i3c_ccc_cmd_init(&cmd, false,
821 enable ?
822 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
823 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
824 &dest, 1);
825 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
826 i3c_ccc_cmd_dest_cleanup(&dest);
827
828 return ret;
829 }
830
831 /**
832 * i3c_master_disec_locked() - send a DISEC CCC command
833 * @master: master used to send frames on the bus
834 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
835 * @evts: events to disable
836 *
837 * Send a DISEC CCC command to disable some or all events coming from a
838 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
839 *
840 * This function must be called with the bus lock held in write mode.
841 *
842 * Return: 0 in case of success, a positive I3C error code if the error is
843 * one of the official Mx error codes, and a negative error code otherwise.
844 */
845 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
846 u8 evts)
847 {
848 return i3c_master_enec_disec_locked(master, addr, false, evts);
849 }
850 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
851
852 /**
853 * i3c_master_enec_locked() - send an ENEC CCC command
854 * @master: master used to send frames on the bus
855 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
856 * @evts: events to disable
857 *
858 * Sends an ENEC CCC command to enable some or all events coming from a
859 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
860 *
861 * This function must be called with the bus lock held in write mode.
862 *
863 * Return: 0 in case of success, a positive I3C error code if the error is
864 * one of the official Mx error codes, and a negative error code otherwise.
865 */
866 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
867 u8 evts)
868 {
869 return i3c_master_enec_disec_locked(master, addr, true, evts);
870 }
871 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
872
873 /**
874 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
875 * @master: master used to send frames on the bus
876 *
877 * Send a DEFSLVS CCC command containing all the devices known to the @master.
878 * This is useful when you have secondary masters on the bus to propagate
879 * device information.
880 *
881 * This should be called after all I3C devices have been discovered (in other
882 * words, after the DAA procedure has finished) and instantiated in
883 * &i3c_master_controller_ops->bus_init().
884 * It should also be called if a master ACKed an Hot-Join request and assigned
885 * a dynamic address to the device joining the bus.
886 *
887 * This function must be called with the bus lock held in write mode.
888 *
889 * Return: 0 in case of success, a positive I3C error code if the error is
890 * one of the official Mx error codes, and a negative error code otherwise.
891 */
892 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
893 {
894 struct i3c_ccc_defslvs *defslvs;
895 struct i3c_ccc_dev_desc *desc;
896 struct i3c_ccc_cmd_dest dest;
897 struct i3c_dev_desc *i3cdev;
898 struct i2c_dev_desc *i2cdev;
899 struct i3c_ccc_cmd cmd;
900 struct i3c_bus *bus;
901 bool send = false;
902 int ndevs = 0, ret;
903
904 if (!master)
905 return -EINVAL;
906
907 bus = i3c_master_get_bus(master);
908 i3c_bus_for_each_i3cdev(bus, i3cdev) {
909 ndevs++;
910
911 if (i3cdev == master->this)
912 continue;
913
914 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
915 I3C_BCR_I3C_MASTER)
916 send = true;
917 }
918
919 /* No other master on the bus, skip DEFSLVS. */
920 if (!send)
921 return 0;
922
923 i3c_bus_for_each_i2cdev(bus, i2cdev)
924 ndevs++;
925
926 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
927 sizeof(*defslvs) +
928 ((ndevs - 1) *
929 sizeof(struct i3c_ccc_dev_desc)));
930 if (!defslvs)
931 return -ENOMEM;
932
933 defslvs->count = ndevs;
934 defslvs->master.bcr = master->this->info.bcr;
935 defslvs->master.dcr = master->this->info.dcr;
936 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
937 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
938
939 desc = defslvs->slaves;
940 i3c_bus_for_each_i2cdev(bus, i2cdev) {
941 desc->lvr = i2cdev->boardinfo->lvr;
942 desc->static_addr = i2cdev->boardinfo->base.addr << 1;
943 desc++;
944 }
945
946 i3c_bus_for_each_i3cdev(bus, i3cdev) {
947 /* Skip the I3C dev representing this master. */
948 if (i3cdev == master->this)
949 continue;
950
951 desc->bcr = i3cdev->info.bcr;
952 desc->dcr = i3cdev->info.dcr;
953 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
954 desc->static_addr = i3cdev->info.static_addr << 1;
955 desc++;
956 }
957
958 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
959 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
960 i3c_ccc_cmd_dest_cleanup(&dest);
961
962 return ret;
963 }
964 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
965
966 static int i3c_master_setda_locked(struct i3c_master_controller *master,
967 u8 oldaddr, u8 newaddr, bool setdasa)
968 {
969 struct i3c_ccc_cmd_dest dest;
970 struct i3c_ccc_setda *setda;
971 struct i3c_ccc_cmd cmd;
972 int ret;
973
974 if (!oldaddr || !newaddr)
975 return -EINVAL;
976
977 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
978 if (!setda)
979 return -ENOMEM;
980
981 setda->addr = newaddr << 1;
982 i3c_ccc_cmd_init(&cmd, false,
983 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
984 &dest, 1);
985 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
986 i3c_ccc_cmd_dest_cleanup(&dest);
987
988 return ret;
989 }
990
991 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
992 u8 static_addr, u8 dyn_addr)
993 {
994 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
995 }
996
997 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
998 u8 oldaddr, u8 newaddr)
999 {
1000 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1001 }
1002
1003 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1004 struct i3c_device_info *info)
1005 {
1006 struct i3c_ccc_cmd_dest dest;
1007 unsigned int expected_len;
1008 struct i3c_ccc_mrl *mrl;
1009 struct i3c_ccc_cmd cmd;
1010 int ret;
1011
1012 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1013 if (!mrl)
1014 return -ENOMEM;
1015
1016 /*
1017 * When the device does not have IBI payload GETMRL only returns 2
1018 * bytes of data.
1019 */
1020 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1021 dest.payload.len -= 1;
1022
1023 expected_len = dest.payload.len;
1024 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1025 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1026 if (ret)
1027 goto out;
1028
1029 if (dest.payload.len != expected_len) {
1030 ret = -EIO;
1031 goto out;
1032 }
1033
1034 info->max_read_len = be16_to_cpu(mrl->read_len);
1035
1036 if (info->bcr & I3C_BCR_IBI_PAYLOAD)
1037 info->max_ibi_len = mrl->ibi_len;
1038
1039 out:
1040 i3c_ccc_cmd_dest_cleanup(&dest);
1041
1042 return ret;
1043 }
1044
1045 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1046 struct i3c_device_info *info)
1047 {
1048 struct i3c_ccc_cmd_dest dest;
1049 struct i3c_ccc_mwl *mwl;
1050 struct i3c_ccc_cmd cmd;
1051 int ret;
1052
1053 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1054 if (!mwl)
1055 return -ENOMEM;
1056
1057 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1058 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1059 if (ret)
1060 goto out;
1061
1062 if (dest.payload.len != sizeof(*mwl))
1063 return -EIO;
1064
1065 info->max_write_len = be16_to_cpu(mwl->len);
1066
1067 out:
1068 i3c_ccc_cmd_dest_cleanup(&dest);
1069
1070 return ret;
1071 }
1072
1073 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1074 struct i3c_device_info *info)
1075 {
1076 struct i3c_ccc_getmxds *getmaxds;
1077 struct i3c_ccc_cmd_dest dest;
1078 struct i3c_ccc_cmd cmd;
1079 int ret;
1080
1081 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1082 sizeof(*getmaxds));
1083 if (!getmaxds)
1084 return -ENOMEM;
1085
1086 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1087 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1088 if (ret)
1089 goto out;
1090
1091 if (dest.payload.len != 2 && dest.payload.len != 5) {
1092 ret = -EIO;
1093 goto out;
1094 }
1095
1096 info->max_read_ds = getmaxds->maxrd;
1097 info->max_write_ds = getmaxds->maxwr;
1098 if (dest.payload.len == 5)
1099 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1100 ((u32)getmaxds->maxrdturn[1] << 8) |
1101 ((u32)getmaxds->maxrdturn[2] << 16);
1102
1103 out:
1104 i3c_ccc_cmd_dest_cleanup(&dest);
1105
1106 return ret;
1107 }
1108
1109 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1110 struct i3c_device_info *info)
1111 {
1112 struct i3c_ccc_gethdrcap *gethdrcap;
1113 struct i3c_ccc_cmd_dest dest;
1114 struct i3c_ccc_cmd cmd;
1115 int ret;
1116
1117 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1118 sizeof(*gethdrcap));
1119 if (!gethdrcap)
1120 return -ENOMEM;
1121
1122 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1123 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1124 if (ret)
1125 goto out;
1126
1127 if (dest.payload.len != 1) {
1128 ret = -EIO;
1129 goto out;
1130 }
1131
1132 info->hdr_cap = gethdrcap->modes;
1133
1134 out:
1135 i3c_ccc_cmd_dest_cleanup(&dest);
1136
1137 return ret;
1138 }
1139
1140 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1141 struct i3c_device_info *info)
1142 {
1143 struct i3c_ccc_getpid *getpid;
1144 struct i3c_ccc_cmd_dest dest;
1145 struct i3c_ccc_cmd cmd;
1146 int ret, i;
1147
1148 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1149 if (!getpid)
1150 return -ENOMEM;
1151
1152 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1153 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1154 if (ret)
1155 goto out;
1156
1157 info->pid = 0;
1158 for (i = 0; i < sizeof(getpid->pid); i++) {
1159 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1160
1161 info->pid |= (u64)getpid->pid[i] << sft;
1162 }
1163
1164 out:
1165 i3c_ccc_cmd_dest_cleanup(&dest);
1166
1167 return ret;
1168 }
1169
1170 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1171 struct i3c_device_info *info)
1172 {
1173 struct i3c_ccc_getbcr *getbcr;
1174 struct i3c_ccc_cmd_dest dest;
1175 struct i3c_ccc_cmd cmd;
1176 int ret;
1177
1178 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1179 if (!getbcr)
1180 return -ENOMEM;
1181
1182 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1183 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1184 if (ret)
1185 goto out;
1186
1187 info->bcr = getbcr->bcr;
1188
1189 out:
1190 i3c_ccc_cmd_dest_cleanup(&dest);
1191
1192 return ret;
1193 }
1194
1195 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1196 struct i3c_device_info *info)
1197 {
1198 struct i3c_ccc_getdcr *getdcr;
1199 struct i3c_ccc_cmd_dest dest;
1200 struct i3c_ccc_cmd cmd;
1201 int ret;
1202
1203 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1204 if (!getdcr)
1205 return -ENOMEM;
1206
1207 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1208 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1209 if (ret)
1210 goto out;
1211
1212 info->dcr = getdcr->dcr;
1213
1214 out:
1215 i3c_ccc_cmd_dest_cleanup(&dest);
1216
1217 return ret;
1218 }
1219
1220 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1221 {
1222 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1223 enum i3c_addr_slot_status slot_status;
1224 int ret;
1225
1226 if (!dev->info.dyn_addr)
1227 return -EINVAL;
1228
1229 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1230 dev->info.dyn_addr);
1231 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1232 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1233 return -EINVAL;
1234
1235 ret = i3c_master_getpid_locked(master, &dev->info);
1236 if (ret)
1237 return ret;
1238
1239 ret = i3c_master_getbcr_locked(master, &dev->info);
1240 if (ret)
1241 return ret;
1242
1243 ret = i3c_master_getdcr_locked(master, &dev->info);
1244 if (ret)
1245 return ret;
1246
1247 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1248 ret = i3c_master_getmxds_locked(master, &dev->info);
1249 if (ret)
1250 return ret;
1251 }
1252
1253 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1254 dev->info.max_ibi_len = 1;
1255
1256 i3c_master_getmrl_locked(master, &dev->info);
1257 i3c_master_getmwl_locked(master, &dev->info);
1258
1259 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1260 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1261 if (ret)
1262 return ret;
1263 }
1264
1265 return 0;
1266 }
1267
1268 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1269 {
1270 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1271
1272 if (dev->info.static_addr)
1273 i3c_bus_set_addr_slot_status(&master->bus,
1274 dev->info.static_addr,
1275 I3C_ADDR_SLOT_FREE);
1276
1277 if (dev->info.dyn_addr)
1278 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1279 I3C_ADDR_SLOT_FREE);
1280
1281 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1282 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1283 I3C_ADDR_SLOT_FREE);
1284 }
1285
1286 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1287 {
1288 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1289 enum i3c_addr_slot_status status;
1290
1291 if (!dev->info.static_addr && !dev->info.dyn_addr)
1292 return 0;
1293
1294 if (dev->info.static_addr) {
1295 status = i3c_bus_get_addr_slot_status(&master->bus,
1296 dev->info.static_addr);
1297 if (status != I3C_ADDR_SLOT_FREE)
1298 return -EBUSY;
1299
1300 i3c_bus_set_addr_slot_status(&master->bus,
1301 dev->info.static_addr,
1302 I3C_ADDR_SLOT_I3C_DEV);
1303 }
1304
1305 /*
1306 * ->init_dyn_addr should have been reserved before that, so, if we're
1307 * trying to apply a pre-reserved dynamic address, we should not try
1308 * to reserve the address slot a second time.
1309 */
1310 if (dev->info.dyn_addr &&
1311 (!dev->boardinfo ||
1312 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1313 status = i3c_bus_get_addr_slot_status(&master->bus,
1314 dev->info.dyn_addr);
1315 if (status != I3C_ADDR_SLOT_FREE)
1316 goto err_release_static_addr;
1317
1318 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1319 I3C_ADDR_SLOT_I3C_DEV);
1320 }
1321
1322 return 0;
1323
1324 err_release_static_addr:
1325 if (dev->info.static_addr)
1326 i3c_bus_set_addr_slot_status(&master->bus,
1327 dev->info.static_addr,
1328 I3C_ADDR_SLOT_FREE);
1329
1330 return -EBUSY;
1331 }
1332
1333 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1334 struct i3c_dev_desc *dev)
1335 {
1336 int ret;
1337
1338 /*
1339 * We don't attach devices to the controller until they are
1340 * addressable on the bus.
1341 */
1342 if (!dev->info.static_addr && !dev->info.dyn_addr)
1343 return 0;
1344
1345 ret = i3c_master_get_i3c_addrs(dev);
1346 if (ret)
1347 return ret;
1348
1349 /* Do not attach the master device itself. */
1350 if (master->this != dev && master->ops->attach_i3c_dev) {
1351 ret = master->ops->attach_i3c_dev(dev);
1352 if (ret) {
1353 i3c_master_put_i3c_addrs(dev);
1354 return ret;
1355 }
1356 }
1357
1358 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1359
1360 return 0;
1361 }
1362
1363 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1364 u8 old_dyn_addr)
1365 {
1366 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1367 enum i3c_addr_slot_status status;
1368 int ret;
1369
1370 if (dev->info.dyn_addr != old_dyn_addr) {
1371 status = i3c_bus_get_addr_slot_status(&master->bus,
1372 dev->info.dyn_addr);
1373 if (status != I3C_ADDR_SLOT_FREE)
1374 return -EBUSY;
1375 i3c_bus_set_addr_slot_status(&master->bus,
1376 dev->info.dyn_addr,
1377 I3C_ADDR_SLOT_I3C_DEV);
1378 }
1379
1380 if (master->ops->reattach_i3c_dev) {
1381 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1382 if (ret) {
1383 i3c_master_put_i3c_addrs(dev);
1384 return ret;
1385 }
1386 }
1387
1388 return 0;
1389 }
1390
1391 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1392 {
1393 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1394
1395 /* Do not detach the master device itself. */
1396 if (master->this != dev && master->ops->detach_i3c_dev)
1397 master->ops->detach_i3c_dev(dev);
1398
1399 i3c_master_put_i3c_addrs(dev);
1400 list_del(&dev->common.node);
1401 }
1402
1403 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1404 struct i2c_dev_desc *dev)
1405 {
1406 int ret;
1407
1408 if (master->ops->attach_i2c_dev) {
1409 ret = master->ops->attach_i2c_dev(dev);
1410 if (ret)
1411 return ret;
1412 }
1413
1414 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1415
1416 return 0;
1417 }
1418
1419 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1420 {
1421 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1422
1423 list_del(&dev->common.node);
1424
1425 if (master->ops->detach_i2c_dev)
1426 master->ops->detach_i2c_dev(dev);
1427 }
1428
1429 static void i3c_master_pre_assign_dyn_addr(struct i3c_dev_desc *dev)
1430 {
1431 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1432 int ret;
1433
1434 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
1435 !dev->boardinfo->static_addr)
1436 return;
1437
1438 ret = i3c_master_setdasa_locked(master, dev->info.static_addr,
1439 dev->boardinfo->init_dyn_addr);
1440 if (ret)
1441 return;
1442
1443 dev->info.dyn_addr = dev->boardinfo->init_dyn_addr;
1444 ret = i3c_master_reattach_i3c_dev(dev, 0);
1445 if (ret)
1446 goto err_rstdaa;
1447
1448 ret = i3c_master_retrieve_dev_info(dev);
1449 if (ret)
1450 goto err_rstdaa;
1451
1452 return;
1453
1454 err_rstdaa:
1455 i3c_master_rstdaa_locked(master, dev->boardinfo->init_dyn_addr);
1456 }
1457
1458 static void
1459 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1460 {
1461 struct i3c_dev_desc *desc;
1462 int ret;
1463
1464 if (!master->init_done)
1465 return;
1466
1467 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1468 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1469 continue;
1470
1471 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1472 if (!desc->dev)
1473 continue;
1474
1475 desc->dev->bus = &master->bus;
1476 desc->dev->desc = desc;
1477 desc->dev->dev.parent = &master->dev;
1478 desc->dev->dev.type = &i3c_device_type;
1479 desc->dev->dev.bus = &i3c_bus_type;
1480 desc->dev->dev.release = i3c_device_release;
1481 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1482 desc->info.pid);
1483
1484 if (desc->boardinfo)
1485 desc->dev->dev.of_node = desc->boardinfo->of_node;
1486
1487 ret = device_register(&desc->dev->dev);
1488 if (ret)
1489 dev_err(&master->dev,
1490 "Failed to add I3C device (err = %d)\n", ret);
1491 }
1492 }
1493
1494 /**
1495 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1496 * @master: master doing the DAA
1497 *
1498 * This function is instantiating an I3C device object and adding it to the
1499 * I3C device list. All device information are automatically retrieved using
1500 * standard CCC commands.
1501 *
1502 * The I3C device object is returned in case the master wants to attach
1503 * private data to it using i3c_dev_set_master_data().
1504 *
1505 * This function must be called with the bus lock held in write mode.
1506 *
1507 * Return: a 0 in case of success, an negative error code otherwise.
1508 */
1509 int i3c_master_do_daa(struct i3c_master_controller *master)
1510 {
1511 int ret;
1512
1513 i3c_bus_maintenance_lock(&master->bus);
1514 ret = master->ops->do_daa(master);
1515 i3c_bus_maintenance_unlock(&master->bus);
1516
1517 if (ret)
1518 return ret;
1519
1520 i3c_bus_normaluse_lock(&master->bus);
1521 i3c_master_register_new_i3c_devs(master);
1522 i3c_bus_normaluse_unlock(&master->bus);
1523
1524 return 0;
1525 }
1526 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1527
1528 /**
1529 * i3c_master_set_info() - set master device information
1530 * @master: master used to send frames on the bus
1531 * @info: I3C device information
1532 *
1533 * Set master device info. This should be called from
1534 * &i3c_master_controller_ops->bus_init().
1535 *
1536 * Not all &i3c_device_info fields are meaningful for a master device.
1537 * Here is a list of fields that should be properly filled:
1538 *
1539 * - &i3c_device_info->dyn_addr
1540 * - &i3c_device_info->bcr
1541 * - &i3c_device_info->dcr
1542 * - &i3c_device_info->pid
1543 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1544 * &i3c_device_info->bcr
1545 *
1546 * This function must be called with the bus lock held in maintenance mode.
1547 *
1548 * Return: 0 if @info contains valid information (not every piece of
1549 * information can be checked, but we can at least make sure @info->dyn_addr
1550 * and @info->bcr are correct), -EINVAL otherwise.
1551 */
1552 int i3c_master_set_info(struct i3c_master_controller *master,
1553 const struct i3c_device_info *info)
1554 {
1555 struct i3c_dev_desc *i3cdev;
1556 int ret;
1557
1558 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1559 return -EINVAL;
1560
1561 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1562 master->secondary)
1563 return -EINVAL;
1564
1565 if (master->this)
1566 return -EINVAL;
1567
1568 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1569 if (IS_ERR(i3cdev))
1570 return PTR_ERR(i3cdev);
1571
1572 master->this = i3cdev;
1573 master->bus.cur_master = master->this;
1574
1575 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1576 if (ret)
1577 goto err_free_dev;
1578
1579 return 0;
1580
1581 err_free_dev:
1582 i3c_master_free_i3c_dev(i3cdev);
1583
1584 return ret;
1585 }
1586 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1587
1588 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1589 {
1590 struct i3c_dev_desc *i3cdev, *i3ctmp;
1591 struct i2c_dev_desc *i2cdev, *i2ctmp;
1592
1593 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1594 common.node) {
1595 i3c_master_detach_i3c_dev(i3cdev);
1596
1597 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1598 i3c_bus_set_addr_slot_status(&master->bus,
1599 i3cdev->boardinfo->init_dyn_addr,
1600 I3C_ADDR_SLOT_FREE);
1601
1602 i3c_master_free_i3c_dev(i3cdev);
1603 }
1604
1605 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1606 common.node) {
1607 i3c_master_detach_i2c_dev(i2cdev);
1608 i3c_bus_set_addr_slot_status(&master->bus,
1609 i2cdev->boardinfo->base.addr,
1610 I3C_ADDR_SLOT_FREE);
1611 i3c_master_free_i2c_dev(i2cdev);
1612 }
1613 }
1614
1615 /**
1616 * i3c_master_bus_init() - initialize an I3C bus
1617 * @master: main master initializing the bus
1618 *
1619 * This function is following all initialisation steps described in the I3C
1620 * specification:
1621 *
1622 * 1. Attach I2C and statically defined I3C devs to the master so that the
1623 * master can fill its internal device table appropriately
1624 *
1625 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1626 * the master controller. That's usually where the bus mode is selected
1627 * (pure bus or mixed fast/slow bus)
1628 *
1629 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1630 * particularly important when the bus was previously configured by someone
1631 * else (for example the bootloader)
1632 *
1633 * 4. Disable all slave events.
1634 *
1635 * 5. Pre-assign dynamic addresses requested by the FW with SETDASA for I3C
1636 * devices that have a static address
1637 *
1638 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1639 * remaining I3C devices
1640 *
1641 * Once this is done, all I3C and I2C devices should be usable.
1642 *
1643 * Return: a 0 in case of success, an negative error code otherwise.
1644 */
1645 static int i3c_master_bus_init(struct i3c_master_controller *master)
1646 {
1647 enum i3c_addr_slot_status status;
1648 struct i2c_dev_boardinfo *i2cboardinfo;
1649 struct i3c_dev_boardinfo *i3cboardinfo;
1650 struct i3c_dev_desc *i3cdev;
1651 struct i2c_dev_desc *i2cdev;
1652 int ret;
1653
1654 /*
1655 * First attach all devices with static definitions provided by the
1656 * FW.
1657 */
1658 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1659 status = i3c_bus_get_addr_slot_status(&master->bus,
1660 i2cboardinfo->base.addr);
1661 if (status != I3C_ADDR_SLOT_FREE) {
1662 ret = -EBUSY;
1663 goto err_detach_devs;
1664 }
1665
1666 i3c_bus_set_addr_slot_status(&master->bus,
1667 i2cboardinfo->base.addr,
1668 I3C_ADDR_SLOT_I2C_DEV);
1669
1670 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1671 if (IS_ERR(i2cdev)) {
1672 ret = PTR_ERR(i2cdev);
1673 goto err_detach_devs;
1674 }
1675
1676 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1677 if (ret) {
1678 i3c_master_free_i2c_dev(i2cdev);
1679 goto err_detach_devs;
1680 }
1681 }
1682 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1683 struct i3c_device_info info = {
1684 .static_addr = i3cboardinfo->static_addr,
1685 };
1686
1687 if (i3cboardinfo->init_dyn_addr) {
1688 status = i3c_bus_get_addr_slot_status(&master->bus,
1689 i3cboardinfo->init_dyn_addr);
1690 if (status != I3C_ADDR_SLOT_FREE) {
1691 ret = -EBUSY;
1692 goto err_detach_devs;
1693 }
1694 }
1695
1696 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1697 if (IS_ERR(i3cdev)) {
1698 ret = PTR_ERR(i3cdev);
1699 goto err_detach_devs;
1700 }
1701
1702 i3cdev->boardinfo = i3cboardinfo;
1703
1704 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1705 if (ret) {
1706 i3c_master_free_i3c_dev(i3cdev);
1707 goto err_detach_devs;
1708 }
1709 }
1710
1711 /*
1712 * Now execute the controller specific ->bus_init() routine, which
1713 * might configure its internal logic to match the bus limitations.
1714 */
1715 ret = master->ops->bus_init(master);
1716 if (ret)
1717 goto err_detach_devs;
1718
1719 /*
1720 * The master device should have been instantiated in ->bus_init(),
1721 * complain if this was not the case.
1722 */
1723 if (!master->this) {
1724 dev_err(&master->dev,
1725 "master_set_info() was not called in ->bus_init()\n");
1726 ret = -EINVAL;
1727 goto err_bus_cleanup;
1728 }
1729
1730 /*
1731 * Reset all dynamic address that may have been assigned before
1732 * (assigned by the bootloader for example).
1733 */
1734 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1735 if (ret && ret != I3C_ERROR_M2)
1736 goto err_bus_cleanup;
1737
1738 /* Disable all slave events before starting DAA. */
1739 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1740 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1741 I3C_CCC_EVENT_HJ);
1742 if (ret && ret != I3C_ERROR_M2)
1743 goto err_bus_cleanup;
1744
1745 /*
1746 * Pre-assign dynamic address and retrieve device information if
1747 * needed.
1748 */
1749 i3c_bus_for_each_i3cdev(&master->bus, i3cdev)
1750 i3c_master_pre_assign_dyn_addr(i3cdev);
1751
1752 ret = i3c_master_do_daa(master);
1753 if (ret)
1754 goto err_rstdaa;
1755
1756 return 0;
1757
1758 err_rstdaa:
1759 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1760
1761 err_bus_cleanup:
1762 if (master->ops->bus_cleanup)
1763 master->ops->bus_cleanup(master);
1764
1765 err_detach_devs:
1766 i3c_master_detach_free_devs(master);
1767
1768 return ret;
1769 }
1770
1771 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1772 {
1773 if (master->ops->bus_cleanup)
1774 master->ops->bus_cleanup(master);
1775
1776 i3c_master_detach_free_devs(master);
1777 }
1778
1779 static struct i3c_dev_desc *
1780 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1781 {
1782 struct i3c_master_controller *master = refdev->common.master;
1783 struct i3c_dev_desc *i3cdev;
1784
1785 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1786 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1787 return i3cdev;
1788 }
1789
1790 return NULL;
1791 }
1792
1793 /**
1794 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1795 * @master: master used to send frames on the bus
1796 * @addr: I3C slave dynamic address assigned to the device
1797 *
1798 * This function is instantiating an I3C device object and adding it to the
1799 * I3C device list. All device information are automatically retrieved using
1800 * standard CCC commands.
1801 *
1802 * The I3C device object is returned in case the master wants to attach
1803 * private data to it using i3c_dev_set_master_data().
1804 *
1805 * This function must be called with the bus lock held in write mode.
1806 *
1807 * Return: a 0 in case of success, an negative error code otherwise.
1808 */
1809 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1810 u8 addr)
1811 {
1812 struct i3c_device_info info = { .dyn_addr = addr };
1813 struct i3c_dev_desc *newdev, *olddev;
1814 u8 old_dyn_addr = addr, expected_dyn_addr;
1815 struct i3c_ibi_setup ibireq = { };
1816 bool enable_ibi = false;
1817 int ret;
1818
1819 if (!master)
1820 return -EINVAL;
1821
1822 newdev = i3c_master_alloc_i3c_dev(master, &info);
1823 if (IS_ERR(newdev))
1824 return PTR_ERR(newdev);
1825
1826 ret = i3c_master_attach_i3c_dev(master, newdev);
1827 if (ret)
1828 goto err_free_dev;
1829
1830 ret = i3c_master_retrieve_dev_info(newdev);
1831 if (ret)
1832 goto err_detach_dev;
1833
1834 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1835 if (olddev) {
1836 newdev->boardinfo = olddev->boardinfo;
1837 newdev->info.static_addr = olddev->info.static_addr;
1838 newdev->dev = olddev->dev;
1839 if (newdev->dev)
1840 newdev->dev->desc = newdev;
1841
1842 /*
1843 * We need to restore the IBI state too, so let's save the
1844 * IBI information and try to restore them after olddev has
1845 * been detached+released and its IBI has been stopped and
1846 * the associated resources have been freed.
1847 */
1848 mutex_lock(&olddev->ibi_lock);
1849 if (olddev->ibi) {
1850 ibireq.handler = olddev->ibi->handler;
1851 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1852 ibireq.num_slots = olddev->ibi->num_slots;
1853
1854 if (olddev->ibi->enabled) {
1855 enable_ibi = true;
1856 i3c_dev_disable_ibi_locked(olddev);
1857 }
1858
1859 i3c_dev_free_ibi_locked(olddev);
1860 }
1861 mutex_unlock(&olddev->ibi_lock);
1862
1863 old_dyn_addr = olddev->info.dyn_addr;
1864
1865 i3c_master_detach_i3c_dev(olddev);
1866 i3c_master_free_i3c_dev(olddev);
1867 }
1868
1869 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1870 if (ret)
1871 goto err_detach_dev;
1872
1873 /*
1874 * Depending on our previous state, the expected dynamic address might
1875 * differ:
1876 * - if the device already had a dynamic address assigned, let's try to
1877 * re-apply this one
1878 * - if the device did not have a dynamic address and the firmware
1879 * requested a specific address, pick this one
1880 * - in any other case, keep the address automatically assigned by the
1881 * master
1882 */
1883 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1884 expected_dyn_addr = old_dyn_addr;
1885 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1886 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1887 else
1888 expected_dyn_addr = newdev->info.dyn_addr;
1889
1890 if (newdev->info.dyn_addr != expected_dyn_addr) {
1891 /*
1892 * Try to apply the expected dynamic address. If it fails, keep
1893 * the address assigned by the master.
1894 */
1895 ret = i3c_master_setnewda_locked(master,
1896 newdev->info.dyn_addr,
1897 expected_dyn_addr);
1898 if (!ret) {
1899 old_dyn_addr = newdev->info.dyn_addr;
1900 newdev->info.dyn_addr = expected_dyn_addr;
1901 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1902 } else {
1903 dev_err(&master->dev,
1904 "Failed to assign reserved/old address to device %d%llx",
1905 master->bus.id, newdev->info.pid);
1906 }
1907 }
1908
1909 /*
1910 * Now is time to try to restore the IBI setup. If we're lucky,
1911 * everything works as before, otherwise, all we can do is complain.
1912 * FIXME: maybe we should add callback to inform the driver that it
1913 * should request the IBI again instead of trying to hide that from
1914 * him.
1915 */
1916 if (ibireq.handler) {
1917 mutex_lock(&newdev->ibi_lock);
1918 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1919 if (ret) {
1920 dev_err(&master->dev,
1921 "Failed to request IBI on device %d-%llx",
1922 master->bus.id, newdev->info.pid);
1923 } else if (enable_ibi) {
1924 ret = i3c_dev_enable_ibi_locked(newdev);
1925 if (ret)
1926 dev_err(&master->dev,
1927 "Failed to re-enable IBI on device %d-%llx",
1928 master->bus.id, newdev->info.pid);
1929 }
1930 mutex_unlock(&newdev->ibi_lock);
1931 }
1932
1933 return 0;
1934
1935 err_detach_dev:
1936 if (newdev->dev && newdev->dev->desc)
1937 newdev->dev->desc = NULL;
1938
1939 i3c_master_detach_i3c_dev(newdev);
1940
1941 err_free_dev:
1942 i3c_master_free_i3c_dev(newdev);
1943
1944 return ret;
1945 }
1946 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1947
1948 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1949
1950 static int
1951 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1952 struct device_node *node, u32 *reg)
1953 {
1954 struct i2c_dev_boardinfo *boardinfo;
1955 struct device *dev = &master->dev;
1956 int ret;
1957
1958 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
1959 if (!boardinfo)
1960 return -ENOMEM;
1961
1962 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
1963 if (ret)
1964 return ret;
1965
1966 /* LVR is encoded in reg[2]. */
1967 boardinfo->lvr = reg[2];
1968
1969 if (boardinfo->lvr & I3C_LVR_I2C_FM_MODE)
1970 master->bus.scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE;
1971
1972 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
1973 of_node_get(node);
1974
1975 return 0;
1976 }
1977
1978 static int
1979 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
1980 struct device_node *node, u32 *reg)
1981 {
1982 struct i3c_dev_boardinfo *boardinfo;
1983 struct device *dev = &master->dev;
1984 enum i3c_addr_slot_status addrstatus;
1985 u32 init_dyn_addr = 0;
1986
1987 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
1988 if (!boardinfo)
1989 return -ENOMEM;
1990
1991 if (reg[0]) {
1992 if (reg[0] > I3C_MAX_ADDR)
1993 return -EINVAL;
1994
1995 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
1996 reg[0]);
1997 if (addrstatus != I3C_ADDR_SLOT_FREE)
1998 return -EINVAL;
1999 }
2000
2001 boardinfo->static_addr = reg[0];
2002
2003 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2004 if (init_dyn_addr > I3C_MAX_ADDR)
2005 return -EINVAL;
2006
2007 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2008 init_dyn_addr);
2009 if (addrstatus != I3C_ADDR_SLOT_FREE)
2010 return -EINVAL;
2011 }
2012
2013 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2014
2015 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2016 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2017 return -EINVAL;
2018
2019 boardinfo->init_dyn_addr = init_dyn_addr;
2020 boardinfo->of_node = of_node_get(node);
2021 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2022
2023 return 0;
2024 }
2025
2026 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2027 struct device_node *node)
2028 {
2029 u32 reg[3];
2030 int ret;
2031
2032 if (!master || !node)
2033 return -EINVAL;
2034
2035 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2036 if (ret)
2037 return ret;
2038
2039 /*
2040 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2041 * dealing with an I2C device.
2042 */
2043 if (!reg[1])
2044 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2045 else
2046 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2047
2048 return ret;
2049 }
2050
2051 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2052 {
2053 struct device *dev = &master->dev;
2054 struct device_node *i3cbus_np = dev->of_node;
2055 struct device_node *node;
2056 int ret;
2057 u32 val;
2058
2059 if (!i3cbus_np)
2060 return 0;
2061
2062 for_each_available_child_of_node(i3cbus_np, node) {
2063 ret = of_i3c_master_add_dev(master, node);
2064 if (ret)
2065 return ret;
2066 }
2067
2068 /*
2069 * The user might want to limit I2C and I3C speed in case some devices
2070 * on the bus are not supporting typical rates, or if the bus topology
2071 * prevents it from using max possible rate.
2072 */
2073 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2074 master->bus.scl_rate.i2c = val;
2075
2076 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2077 master->bus.scl_rate.i3c = val;
2078
2079 return 0;
2080 }
2081
2082 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2083 struct i2c_msg *xfers, int nxfers)
2084 {
2085 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2086 struct i2c_dev_desc *dev;
2087 int i, ret;
2088 u16 addr;
2089
2090 if (!xfers || !master || nxfers <= 0)
2091 return -EINVAL;
2092
2093 if (!master->ops->i2c_xfers)
2094 return -ENOTSUPP;
2095
2096 /* Doing transfers to different devices is not supported. */
2097 addr = xfers[0].addr;
2098 for (i = 1; i < nxfers; i++) {
2099 if (addr != xfers[i].addr)
2100 return -ENOTSUPP;
2101 }
2102
2103 i3c_bus_normaluse_lock(&master->bus);
2104 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2105 if (!dev)
2106 ret = -ENOENT;
2107 else
2108 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2109 i3c_bus_normaluse_unlock(&master->bus);
2110
2111 return ret ? ret : nxfers;
2112 }
2113
2114 static u32 i3c_master_i2c_functionalities(struct i2c_adapter *adap)
2115 {
2116 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2117
2118 return master->ops->i2c_funcs(master);
2119 }
2120
2121 static const struct i2c_algorithm i3c_master_i2c_algo = {
2122 .master_xfer = i3c_master_i2c_adapter_xfer,
2123 .functionality = i3c_master_i2c_functionalities,
2124 };
2125
2126 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2127 {
2128 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2129 struct i2c_dev_desc *i2cdev;
2130 int ret;
2131
2132 adap->dev.parent = master->dev.parent;
2133 adap->owner = master->dev.parent->driver->owner;
2134 adap->algo = &i3c_master_i2c_algo;
2135 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2136
2137 /* FIXME: Should we allow i3c masters to override these values? */
2138 adap->timeout = 1000;
2139 adap->retries = 3;
2140
2141 ret = i2c_add_adapter(adap);
2142 if (ret)
2143 return ret;
2144
2145 /*
2146 * We silently ignore failures here. The bus should keep working
2147 * correctly even if one or more i2c devices are not registered.
2148 */
2149 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2150 i2cdev->dev = i2c_new_device(adap, &i2cdev->boardinfo->base);
2151
2152 return 0;
2153 }
2154
2155 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2156 {
2157 struct i2c_dev_desc *i2cdev;
2158
2159 i2c_del_adapter(&master->i2c);
2160
2161 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2162 i2cdev->dev = NULL;
2163 }
2164
2165 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2166 {
2167 struct i3c_dev_desc *i3cdev;
2168
2169 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2170 if (!i3cdev->dev)
2171 continue;
2172
2173 i3cdev->dev->desc = NULL;
2174 if (device_is_registered(&i3cdev->dev->dev))
2175 device_unregister(&i3cdev->dev->dev);
2176 else
2177 put_device(&i3cdev->dev->dev);
2178 i3cdev->dev = NULL;
2179 }
2180 }
2181
2182 /**
2183 * i3c_master_queue_ibi() - Queue an IBI
2184 * @dev: the device this IBI is coming from
2185 * @slot: the IBI slot used to store the payload
2186 *
2187 * Queue an IBI to the controller workqueue. The IBI handler attached to
2188 * the dev will be called from a workqueue context.
2189 */
2190 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2191 {
2192 atomic_inc(&dev->ibi->pending_ibis);
2193 queue_work(dev->common.master->wq, &slot->work);
2194 }
2195 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2196
2197 static void i3c_master_handle_ibi(struct work_struct *work)
2198 {
2199 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2200 work);
2201 struct i3c_dev_desc *dev = slot->dev;
2202 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2203 struct i3c_ibi_payload payload;
2204
2205 payload.data = slot->data;
2206 payload.len = slot->len;
2207
2208 if (dev->dev)
2209 dev->ibi->handler(dev->dev, &payload);
2210
2211 master->ops->recycle_ibi_slot(dev, slot);
2212 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2213 complete(&dev->ibi->all_ibis_handled);
2214 }
2215
2216 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2217 struct i3c_ibi_slot *slot)
2218 {
2219 slot->dev = dev;
2220 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2221 }
2222
2223 struct i3c_generic_ibi_slot {
2224 struct list_head node;
2225 struct i3c_ibi_slot base;
2226 };
2227
2228 struct i3c_generic_ibi_pool {
2229 spinlock_t lock;
2230 unsigned int num_slots;
2231 struct i3c_generic_ibi_slot *slots;
2232 void *payload_buf;
2233 struct list_head free_slots;
2234 struct list_head pending;
2235 };
2236
2237 /**
2238 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2239 * @pool: the IBI pool to free
2240 *
2241 * Free all IBI slots allated by a generic IBI pool.
2242 */
2243 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2244 {
2245 struct i3c_generic_ibi_slot *slot;
2246 unsigned int nslots = 0;
2247
2248 while (!list_empty(&pool->free_slots)) {
2249 slot = list_first_entry(&pool->free_slots,
2250 struct i3c_generic_ibi_slot, node);
2251 list_del(&slot->node);
2252 nslots++;
2253 }
2254
2255 /*
2256 * If the number of freed slots is not equal to the number of allocated
2257 * slots we have a leak somewhere.
2258 */
2259 WARN_ON(nslots != pool->num_slots);
2260
2261 kfree(pool->payload_buf);
2262 kfree(pool->slots);
2263 kfree(pool);
2264 }
2265 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2266
2267 /**
2268 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2269 * @dev: the device this pool will be used for
2270 * @req: IBI setup request describing what the device driver expects
2271 *
2272 * Create a generic IBI pool based on the information provided in @req.
2273 *
2274 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2275 */
2276 struct i3c_generic_ibi_pool *
2277 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2278 const struct i3c_ibi_setup *req)
2279 {
2280 struct i3c_generic_ibi_pool *pool;
2281 struct i3c_generic_ibi_slot *slot;
2282 unsigned int i;
2283 int ret;
2284
2285 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2286 if (!pool)
2287 return ERR_PTR(-ENOMEM);
2288
2289 spin_lock_init(&pool->lock);
2290 INIT_LIST_HEAD(&pool->free_slots);
2291 INIT_LIST_HEAD(&pool->pending);
2292
2293 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2294 if (!pool->slots) {
2295 ret = -ENOMEM;
2296 goto err_free_pool;
2297 }
2298
2299 if (req->max_payload_len) {
2300 pool->payload_buf = kcalloc(req->num_slots,
2301 req->max_payload_len, GFP_KERNEL);
2302 if (!pool->payload_buf) {
2303 ret = -ENOMEM;
2304 goto err_free_pool;
2305 }
2306 }
2307
2308 for (i = 0; i < req->num_slots; i++) {
2309 slot = &pool->slots[i];
2310 i3c_master_init_ibi_slot(dev, &slot->base);
2311
2312 if (req->max_payload_len)
2313 slot->base.data = pool->payload_buf +
2314 (i * req->max_payload_len);
2315
2316 list_add_tail(&slot->node, &pool->free_slots);
2317 pool->num_slots++;
2318 }
2319
2320 return pool;
2321
2322 err_free_pool:
2323 i3c_generic_ibi_free_pool(pool);
2324 return ERR_PTR(ret);
2325 }
2326 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2327
2328 /**
2329 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2330 * @pool: the pool to query an IBI slot on
2331 *
2332 * Search for a free slot in a generic IBI pool.
2333 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2334 * when it's no longer needed.
2335 *
2336 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2337 */
2338 struct i3c_ibi_slot *
2339 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2340 {
2341 struct i3c_generic_ibi_slot *slot;
2342 unsigned long flags;
2343
2344 spin_lock_irqsave(&pool->lock, flags);
2345 slot = list_first_entry_or_null(&pool->free_slots,
2346 struct i3c_generic_ibi_slot, node);
2347 if (slot)
2348 list_del(&slot->node);
2349 spin_unlock_irqrestore(&pool->lock, flags);
2350
2351 return slot ? &slot->base : NULL;
2352 }
2353 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2354
2355 /**
2356 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2357 * @pool: the pool to return the IBI slot to
2358 * @s: IBI slot to recycle
2359 *
2360 * Add an IBI slot back to its generic IBI pool. Should be called from the
2361 * master driver struct_master_controller_ops->recycle_ibi() method.
2362 */
2363 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2364 struct i3c_ibi_slot *s)
2365 {
2366 struct i3c_generic_ibi_slot *slot;
2367 unsigned long flags;
2368
2369 if (!s)
2370 return;
2371
2372 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2373 spin_lock_irqsave(&pool->lock, flags);
2374 list_add_tail(&slot->node, &pool->free_slots);
2375 spin_unlock_irqrestore(&pool->lock, flags);
2376 }
2377 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2378
2379 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2380 {
2381 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2382 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers ||
2383 !ops->i2c_funcs)
2384 return -EINVAL;
2385
2386 if (ops->request_ibi &&
2387 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2388 !ops->recycle_ibi_slot))
2389 return -EINVAL;
2390
2391 return 0;
2392 }
2393
2394 /**
2395 * i3c_master_register() - register an I3C master
2396 * @master: master used to send frames on the bus
2397 * @parent: the parent device (the one that provides this I3C master
2398 * controller)
2399 * @ops: the master controller operations
2400 * @secondary: true if you are registering a secondary master. Will return
2401 * -ENOTSUPP if set to true since secondary masters are not yet
2402 * supported
2403 *
2404 * This function takes care of everything for you:
2405 *
2406 * - creates and initializes the I3C bus
2407 * - populates the bus with static I2C devs if @parent->of_node is not
2408 * NULL
2409 * - registers all I3C devices added by the controller during bus
2410 * initialization
2411 * - registers the I2C adapter and all I2C devices
2412 *
2413 * Return: 0 in case of success, a negative error code otherwise.
2414 */
2415 int i3c_master_register(struct i3c_master_controller *master,
2416 struct device *parent,
2417 const struct i3c_master_controller_ops *ops,
2418 bool secondary)
2419 {
2420 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2421 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2422 struct i2c_dev_boardinfo *i2cbi;
2423 int ret;
2424
2425 /* We do not support secondary masters yet. */
2426 if (secondary)
2427 return -ENOTSUPP;
2428
2429 ret = i3c_master_check_ops(ops);
2430 if (ret)
2431 return ret;
2432
2433 master->dev.parent = parent;
2434 master->dev.of_node = of_node_get(parent->of_node);
2435 master->dev.bus = &i3c_bus_type;
2436 master->dev.type = &i3c_masterdev_type;
2437 master->dev.release = i3c_masterdev_release;
2438 master->ops = ops;
2439 master->secondary = secondary;
2440 INIT_LIST_HEAD(&master->boardinfo.i2c);
2441 INIT_LIST_HEAD(&master->boardinfo.i3c);
2442
2443 ret = i3c_bus_init(i3cbus);
2444 if (ret)
2445 return ret;
2446
2447 device_initialize(&master->dev);
2448 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2449
2450 ret = of_populate_i3c_bus(master);
2451 if (ret)
2452 goto err_put_dev;
2453
2454 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2455 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2456 case I3C_LVR_I2C_INDEX(0):
2457 if (mode < I3C_BUS_MODE_MIXED_FAST)
2458 mode = I3C_BUS_MODE_MIXED_FAST;
2459 break;
2460 case I3C_LVR_I2C_INDEX(1):
2461 case I3C_LVR_I2C_INDEX(2):
2462 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2463 mode = I3C_BUS_MODE_MIXED_SLOW;
2464 break;
2465 default:
2466 ret = -EINVAL;
2467 goto err_put_dev;
2468 }
2469 }
2470
2471 ret = i3c_bus_set_mode(i3cbus, mode);
2472 if (ret)
2473 goto err_put_dev;
2474
2475 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2476 if (!master->wq) {
2477 ret = -ENOMEM;
2478 goto err_put_dev;
2479 }
2480
2481 ret = i3c_master_bus_init(master);
2482 if (ret)
2483 goto err_put_dev;
2484
2485 ret = device_add(&master->dev);
2486 if (ret)
2487 goto err_cleanup_bus;
2488
2489 /*
2490 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2491 * through the I2C subsystem.
2492 */
2493 ret = i3c_master_i2c_adapter_init(master);
2494 if (ret)
2495 goto err_del_dev;
2496
2497 /*
2498 * We're done initializing the bus and the controller, we can now
2499 * register I3C devices dicovered during the initial DAA.
2500 */
2501 master->init_done = true;
2502 i3c_bus_normaluse_lock(&master->bus);
2503 i3c_master_register_new_i3c_devs(master);
2504 i3c_bus_normaluse_unlock(&master->bus);
2505
2506 return 0;
2507
2508 err_del_dev:
2509 device_del(&master->dev);
2510
2511 err_cleanup_bus:
2512 i3c_master_bus_cleanup(master);
2513
2514 err_put_dev:
2515 put_device(&master->dev);
2516
2517 return ret;
2518 }
2519 EXPORT_SYMBOL_GPL(i3c_master_register);
2520
2521 /**
2522 * i3c_master_unregister() - unregister an I3C master
2523 * @master: master used to send frames on the bus
2524 *
2525 * Basically undo everything done in i3c_master_register().
2526 *
2527 * Return: 0 in case of success, a negative error code otherwise.
2528 */
2529 int i3c_master_unregister(struct i3c_master_controller *master)
2530 {
2531 i3c_master_i2c_adapter_cleanup(master);
2532 i3c_master_unregister_i3c_devs(master);
2533 i3c_master_bus_cleanup(master);
2534 device_unregister(&master->dev);
2535
2536 return 0;
2537 }
2538 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2539
2540 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2541 struct i3c_priv_xfer *xfers,
2542 int nxfers)
2543 {
2544 struct i3c_master_controller *master;
2545
2546 if (!dev)
2547 return -ENOENT;
2548
2549 master = i3c_dev_get_master(dev);
2550 if (!master || !xfers)
2551 return -EINVAL;
2552
2553 if (!master->ops->priv_xfers)
2554 return -ENOTSUPP;
2555
2556 return master->ops->priv_xfers(dev, xfers, nxfers);
2557 }
2558
2559 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2560 {
2561 struct i3c_master_controller *master;
2562 int ret;
2563
2564 if (!dev->ibi)
2565 return -EINVAL;
2566
2567 master = i3c_dev_get_master(dev);
2568 ret = master->ops->disable_ibi(dev);
2569 if (ret)
2570 return ret;
2571
2572 reinit_completion(&dev->ibi->all_ibis_handled);
2573 if (atomic_read(&dev->ibi->pending_ibis))
2574 wait_for_completion(&dev->ibi->all_ibis_handled);
2575
2576 dev->ibi->enabled = false;
2577
2578 return 0;
2579 }
2580
2581 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2582 {
2583 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2584 int ret;
2585
2586 if (!dev->ibi)
2587 return -EINVAL;
2588
2589 ret = master->ops->enable_ibi(dev);
2590 if (!ret)
2591 dev->ibi->enabled = true;
2592
2593 return ret;
2594 }
2595
2596 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2597 const struct i3c_ibi_setup *req)
2598 {
2599 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2600 struct i3c_device_ibi_info *ibi;
2601 int ret;
2602
2603 if (!master->ops->request_ibi)
2604 return -ENOTSUPP;
2605
2606 if (dev->ibi)
2607 return -EBUSY;
2608
2609 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2610 if (!ibi)
2611 return -ENOMEM;
2612
2613 atomic_set(&ibi->pending_ibis, 0);
2614 init_completion(&ibi->all_ibis_handled);
2615 ibi->handler = req->handler;
2616 ibi->max_payload_len = req->max_payload_len;
2617 ibi->num_slots = req->num_slots;
2618
2619 dev->ibi = ibi;
2620 ret = master->ops->request_ibi(dev, req);
2621 if (ret) {
2622 kfree(ibi);
2623 dev->ibi = NULL;
2624 }
2625
2626 return ret;
2627 }
2628
2629 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2630 {
2631 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2632
2633 if (!dev->ibi)
2634 return;
2635
2636 if (WARN_ON(dev->ibi->enabled))
2637 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2638
2639 master->ops->free_ibi(dev);
2640 kfree(dev->ibi);
2641 dev->ibi = NULL;
2642 }
2643
2644 static int __init i3c_init(void)
2645 {
2646 return bus_register(&i3c_bus_type);
2647 }
2648 subsys_initcall(i3c_init);
2649
2650 static void __exit i3c_exit(void)
2651 {
2652 idr_destroy(&i3c_bus_idr);
2653 bus_unregister(&i3c_bus_type);
2654 }
2655 module_exit(i3c_exit);
2656
2657 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2658 MODULE_DESCRIPTION("I3C core");
2659 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support