Linux 5.1.15
[linux/fpc-iii.git] / drivers / input / touchscreen / tsc200x-core.h
bloba43c08ccfd3dc0bce3ff578584024b8a1fe028f1
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _TSC200X_CORE_H
3 #define _TSC200X_CORE_H
5 /* control byte 1 */
6 #define TSC200X_CMD 0x80
7 #define TSC200X_CMD_NORMAL 0x00
8 #define TSC200X_CMD_STOP 0x01
9 #define TSC200X_CMD_12BIT 0x04
11 /* control byte 0 */
12 #define TSC200X_REG_READ 0x01 /* R/W access */
13 #define TSC200X_REG_PND0 0x02 /* Power Not Down Control */
14 #define TSC200X_REG_X (0x0 << 3)
15 #define TSC200X_REG_Y (0x1 << 3)
16 #define TSC200X_REG_Z1 (0x2 << 3)
17 #define TSC200X_REG_Z2 (0x3 << 3)
18 #define TSC200X_REG_AUX (0x4 << 3)
19 #define TSC200X_REG_TEMP1 (0x5 << 3)
20 #define TSC200X_REG_TEMP2 (0x6 << 3)
21 #define TSC200X_REG_STATUS (0x7 << 3)
22 #define TSC200X_REG_AUX_HIGH (0x8 << 3)
23 #define TSC200X_REG_AUX_LOW (0x9 << 3)
24 #define TSC200X_REG_TEMP_HIGH (0xA << 3)
25 #define TSC200X_REG_TEMP_LOW (0xB << 3)
26 #define TSC200X_REG_CFR0 (0xC << 3)
27 #define TSC200X_REG_CFR1 (0xD << 3)
28 #define TSC200X_REG_CFR2 (0xE << 3)
29 #define TSC200X_REG_CONV_FUNC (0xF << 3)
31 /* configuration register 0 */
32 #define TSC200X_CFR0_PRECHARGE_276US 0x0040
33 #define TSC200X_CFR0_STABTIME_1MS 0x0300
34 #define TSC200X_CFR0_CLOCK_1MHZ 0x1000
35 #define TSC200X_CFR0_RESOLUTION12 0x2000
36 #define TSC200X_CFR0_PENMODE 0x8000
37 #define TSC200X_CFR0_INITVALUE (TSC200X_CFR0_STABTIME_1MS | \
38 TSC200X_CFR0_CLOCK_1MHZ | \
39 TSC200X_CFR0_RESOLUTION12 | \
40 TSC200X_CFR0_PRECHARGE_276US | \
41 TSC200X_CFR0_PENMODE)
43 /* bits common to both read and write of configuration register 0 */
44 #define TSC200X_CFR0_RW_MASK 0x3fff
46 /* configuration register 1 */
47 #define TSC200X_CFR1_BATCHDELAY_4MS 0x0003
48 #define TSC200X_CFR1_INITVALUE TSC200X_CFR1_BATCHDELAY_4MS
50 /* configuration register 2 */
51 #define TSC200X_CFR2_MAVE_Z 0x0004
52 #define TSC200X_CFR2_MAVE_Y 0x0008
53 #define TSC200X_CFR2_MAVE_X 0x0010
54 #define TSC200X_CFR2_AVG_7 0x0800
55 #define TSC200X_CFR2_MEDIUM_15 0x3000
56 #define TSC200X_CFR2_INITVALUE (TSC200X_CFR2_MAVE_X | \
57 TSC200X_CFR2_MAVE_Y | \
58 TSC200X_CFR2_MAVE_Z | \
59 TSC200X_CFR2_MEDIUM_15 | \
60 TSC200X_CFR2_AVG_7)
62 #define MAX_12BIT 0xfff
63 #define TSC200X_DEF_X_FUZZ 4
64 #define TSC200X_DEF_Y_FUZZ 8
65 #define TSC200X_DEF_P_FUZZ 2
66 #define TSC200X_DEF_RESISTOR 280
68 #define TSC2005_SPI_MAX_SPEED_HZ 10000000
69 #define TSC200X_PENUP_TIME_MS 40
71 extern const struct regmap_config tsc200x_regmap_config;
72 extern const struct dev_pm_ops tsc200x_pm_ops;
74 int tsc200x_probe(struct device *dev, int irq, const struct input_id *tsc_id,
75 struct regmap *regmap,
76 int (*tsc200x_cmd)(struct device *dev, u8 cmd));
77 int tsc200x_remove(struct device *dev);
79 #endif