Linux 5.1.15
[linux/fpc-iii.git] / drivers / pinctrl / meson / pinctrl-meson8b.c
blob7f76000cc12ed52a99db4736920ed6fa4f8adadd
1 /*
2 * Pin controller and GPIO driver for Amlogic Meson8b.
4 * Copyright (C) 2015 Endless Mobile, Inc.
5 * Author: Carlo Caione <carlo@endlessm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
11 * You should have received a copy of the GNU General Public License
12 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 #include <dt-bindings/gpio/meson8b-gpio.h>
16 #include "pinctrl-meson.h"
17 #include "pinctrl-meson8-pmx.h"
19 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
20 MESON_PIN(GPIOX_0),
21 MESON_PIN(GPIOX_1),
22 MESON_PIN(GPIOX_2),
23 MESON_PIN(GPIOX_3),
24 MESON_PIN(GPIOX_4),
25 MESON_PIN(GPIOX_5),
26 MESON_PIN(GPIOX_6),
27 MESON_PIN(GPIOX_7),
28 MESON_PIN(GPIOX_8),
29 MESON_PIN(GPIOX_9),
30 MESON_PIN(GPIOX_10),
31 MESON_PIN(GPIOX_11),
32 MESON_PIN(GPIOX_16),
33 MESON_PIN(GPIOX_17),
34 MESON_PIN(GPIOX_18),
35 MESON_PIN(GPIOX_19),
36 MESON_PIN(GPIOX_20),
37 MESON_PIN(GPIOX_21),
39 MESON_PIN(GPIOY_0),
40 MESON_PIN(GPIOY_1),
41 MESON_PIN(GPIOY_3),
42 MESON_PIN(GPIOY_6),
43 MESON_PIN(GPIOY_7),
44 MESON_PIN(GPIOY_8),
45 MESON_PIN(GPIOY_9),
46 MESON_PIN(GPIOY_10),
47 MESON_PIN(GPIOY_11),
48 MESON_PIN(GPIOY_12),
49 MESON_PIN(GPIOY_13),
50 MESON_PIN(GPIOY_14),
52 MESON_PIN(GPIODV_9),
53 MESON_PIN(GPIODV_24),
54 MESON_PIN(GPIODV_25),
55 MESON_PIN(GPIODV_26),
56 MESON_PIN(GPIODV_27),
57 MESON_PIN(GPIODV_28),
58 MESON_PIN(GPIODV_29),
60 MESON_PIN(GPIOH_0),
61 MESON_PIN(GPIOH_1),
62 MESON_PIN(GPIOH_2),
63 MESON_PIN(GPIOH_3),
64 MESON_PIN(GPIOH_4),
65 MESON_PIN(GPIOH_5),
66 MESON_PIN(GPIOH_6),
67 MESON_PIN(GPIOH_7),
68 MESON_PIN(GPIOH_8),
69 MESON_PIN(GPIOH_9),
71 MESON_PIN(CARD_0),
72 MESON_PIN(CARD_1),
73 MESON_PIN(CARD_2),
74 MESON_PIN(CARD_3),
75 MESON_PIN(CARD_4),
76 MESON_PIN(CARD_5),
77 MESON_PIN(CARD_6),
79 MESON_PIN(BOOT_0),
80 MESON_PIN(BOOT_1),
81 MESON_PIN(BOOT_2),
82 MESON_PIN(BOOT_3),
83 MESON_PIN(BOOT_4),
84 MESON_PIN(BOOT_5),
85 MESON_PIN(BOOT_6),
86 MESON_PIN(BOOT_7),
87 MESON_PIN(BOOT_8),
88 MESON_PIN(BOOT_9),
89 MESON_PIN(BOOT_10),
90 MESON_PIN(BOOT_11),
91 MESON_PIN(BOOT_12),
92 MESON_PIN(BOOT_13),
93 MESON_PIN(BOOT_14),
94 MESON_PIN(BOOT_15),
95 MESON_PIN(BOOT_16),
96 MESON_PIN(BOOT_17),
97 MESON_PIN(BOOT_18),
99 MESON_PIN(DIF_0_P),
100 MESON_PIN(DIF_0_N),
101 MESON_PIN(DIF_1_P),
102 MESON_PIN(DIF_1_N),
103 MESON_PIN(DIF_2_P),
104 MESON_PIN(DIF_2_N),
105 MESON_PIN(DIF_3_P),
106 MESON_PIN(DIF_3_N),
107 MESON_PIN(DIF_4_P),
108 MESON_PIN(DIF_4_N),
111 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
112 MESON_PIN(GPIOAO_0),
113 MESON_PIN(GPIOAO_1),
114 MESON_PIN(GPIOAO_2),
115 MESON_PIN(GPIOAO_3),
116 MESON_PIN(GPIOAO_4),
117 MESON_PIN(GPIOAO_5),
118 MESON_PIN(GPIOAO_6),
119 MESON_PIN(GPIOAO_7),
120 MESON_PIN(GPIOAO_8),
121 MESON_PIN(GPIOAO_9),
122 MESON_PIN(GPIOAO_10),
123 MESON_PIN(GPIOAO_11),
124 MESON_PIN(GPIOAO_12),
125 MESON_PIN(GPIOAO_13),
128 * The following 2 pins are not mentionned in the public datasheet
129 * According to this datasheet, they can't be used with the gpio
130 * interrupt controller
132 MESON_PIN(GPIO_BSD_EN),
133 MESON_PIN(GPIO_TEST_N),
136 /* bank X */
137 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
138 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
139 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
140 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
141 static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
142 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
143 GPIOX_6, GPIOX_7 };
144 static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
145 GPIOX_7 };
146 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
147 static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
148 static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 };
149 static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 };
150 static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 };
151 static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 };
152 static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 };
153 static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 };
155 static const unsigned int sdxc_d0_1_a_pins[] = { GPIOX_0 };
156 static const unsigned int sdxc_d13_1_a_pins[] = { GPIOX_1, GPIOX_2,
157 GPIOX_3 };
158 static const unsigned int pcm_out_a_pins[] = { GPIOX_4 };
159 static const unsigned int pcm_in_a_pins[] = { GPIOX_5 };
160 static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 };
161 static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 };
162 static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 };
163 static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 };
164 static const unsigned int pwm_vs_0_pins[] = { GPIOX_10 };
165 static const unsigned int pwm_e_pins[] = { GPIOX_10 };
166 static const unsigned int pwm_vs_1_pins[] = { GPIOX_11 };
168 static const unsigned int uart_tx_a_pins[] = { GPIOX_4 };
169 static const unsigned int uart_rx_a_pins[] = { GPIOX_5 };
170 static const unsigned int uart_cts_a_pins[] = { GPIOX_6 };
171 static const unsigned int uart_rts_a_pins[] = { GPIOX_7 };
172 static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 };
173 static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 };
174 static const unsigned int uart_cts_b1_pins[] = { GPIOX_10 };
175 static const unsigned int uart_rts_b1_pins[] = { GPIOX_20 };
177 static const unsigned int iso7816_0_clk_pins[] = { GPIOX_6 };
178 static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 };
179 static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 };
180 static const unsigned int spi_miso_0_pins[] = { GPIOX_9 };
181 static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 };
182 static const unsigned int iso7816_det_pins[] = { GPIOX_16 };
183 static const unsigned int iso7816_reset_pins[] = { GPIOX_17 };
184 static const unsigned int iso7816_1_clk_pins[] = { GPIOX_18 };
185 static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 };
186 static const unsigned int spi_ss0_0_pins[] = { GPIOX_20 };
188 static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 };
189 static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 };
190 static const unsigned int tsin_d0_b_pins[] = { GPIOX_10 };
191 static const unsigned int pwm_b_pins[] = { GPIOX_11 };
192 static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 };
193 static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 };
194 static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 };
196 /* bank Y */
197 static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 };
198 static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 };
199 static const unsigned int tsin_d17_a_pins[] = {
200 GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14,
202 static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 };
203 static const unsigned int tsin_d0_a_pins[] = { GPIOY_9 };
205 static const unsigned int spdif_out_0_pins[] = { GPIOY_3 };
207 static const unsigned int xtal_24m_pins[] = { GPIOY_3 };
208 static const unsigned int iso7816_2_clk_pins[] = { GPIOY_13 };
209 static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 };
211 /* bank DV */
212 static const unsigned int pwm_d_pins[] = { GPIODV_28 };
213 static const unsigned int pwm_c0_pins[] = { GPIODV_29 };
215 static const unsigned int pwm_vs_2_pins[] = { GPIODV_9 };
216 static const unsigned int pwm_vs_3_pins[] = { GPIODV_28 };
217 static const unsigned int pwm_vs_4_pins[] = { GPIODV_29 };
219 static const unsigned int xtal24_out_pins[] = { GPIODV_29 };
221 static const unsigned int uart_tx_c_pins[] = { GPIODV_24 };
222 static const unsigned int uart_rx_c_pins[] = { GPIODV_25 };
223 static const unsigned int uart_cts_c_pins[] = { GPIODV_26 };
224 static const unsigned int uart_rts_c_pins[] = { GPIODV_27 };
226 static const unsigned int pwm_c1_pins[] = { GPIODV_9 };
228 static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 };
229 static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 };
230 static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 };
231 static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 };
232 static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 };
233 static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 };
235 /* bank H */
236 static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 };
237 static const unsigned int hdmi_sda_pins[] = { GPIOH_1 };
238 static const unsigned int hdmi_scl_pins[] = { GPIOH_2 };
239 static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 };
240 static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 };
241 static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 };
242 static const unsigned int clk_24m_out_pins[] = { GPIOH_9 };
244 static const unsigned int spi_ss1_pins[] = { GPIOH_0 };
245 static const unsigned int spi_ss2_pins[] = { GPIOH_1 };
246 static const unsigned int spi_ss0_1_pins[] = { GPIOH_3 };
247 static const unsigned int spi_miso_1_pins[] = { GPIOH_4 };
248 static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 };
249 static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 };
251 static const unsigned int eth_txd3_pins[] = { GPIOH_7 };
252 static const unsigned int eth_txd2_pins[] = { GPIOH_8 };
253 static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 };
255 static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 };
256 static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 };
257 static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 };
258 static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 };
259 static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 };
260 static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 };
262 /* bank BOOT */
263 static const unsigned int nand_io_pins[] = {
264 BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7
266 static const unsigned int nand_io_ce0_pins[] = { BOOT_8 };
267 static const unsigned int nand_io_ce1_pins[] = { BOOT_9 };
268 static const unsigned int nand_io_rb0_pins[] = { BOOT_10 };
269 static const unsigned int nand_ale_pins[] = { BOOT_11 };
270 static const unsigned int nand_cle_pins[] = { BOOT_12 };
271 static const unsigned int nand_wen_clk_pins[] = { BOOT_13 };
272 static const unsigned int nand_ren_clk_pins[] = { BOOT_14 };
273 static const unsigned int nand_dqs_15_pins[] = { BOOT_15 };
274 static const unsigned int nand_dqs_18_pins[] = { BOOT_18 };
276 static const unsigned int sdxc_d0_c_pins[] = { BOOT_0};
277 static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2,
278 BOOT_3 };
279 static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5,
280 BOOT_6, BOOT_7 };
281 static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 };
282 static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 };
283 static const unsigned int nor_d_pins[] = { BOOT_11 };
284 static const unsigned int nor_q_pins[] = { BOOT_12 };
285 static const unsigned int nor_c_pins[] = { BOOT_13 };
286 static const unsigned int nor_cs_pins[] = { BOOT_18 };
288 static const unsigned int sd_d0_c_pins[] = { BOOT_0 };
289 static const unsigned int sd_d1_c_pins[] = { BOOT_1 };
290 static const unsigned int sd_d2_c_pins[] = { BOOT_2 };
291 static const unsigned int sd_d3_c_pins[] = { BOOT_3 };
292 static const unsigned int sd_cmd_c_pins[] = { BOOT_8 };
293 static const unsigned int sd_clk_c_pins[] = { BOOT_10 };
295 /* bank CARD */
296 static const unsigned int sd_d1_b_pins[] = { CARD_0 };
297 static const unsigned int sd_d0_b_pins[] = { CARD_1 };
298 static const unsigned int sd_clk_b_pins[] = { CARD_2 };
299 static const unsigned int sd_cmd_b_pins[] = { CARD_3 };
300 static const unsigned int sd_d3_b_pins[] = { CARD_4 };
301 static const unsigned int sd_d2_b_pins[] = { CARD_5 };
303 static const unsigned int sdxc_d13_b_pins[] = { CARD_0, CARD_4,
304 CARD_5 };
305 static const unsigned int sdxc_d0_b_pins[] = { CARD_1 };
306 static const unsigned int sdxc_clk_b_pins[] = { CARD_2 };
307 static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 };
309 /* bank AO */
310 static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
311 static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 };
312 static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 };
313 static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 };
314 static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 };
315 static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 };
316 static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 };
317 static const unsigned int remote_input_pins[] = { GPIOAO_7 };
318 static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 };
319 static const unsigned int ir_blaster_pins[] = { GPIOAO_13 };
321 static const unsigned int pwm_c2_pins[] = { GPIOAO_3 };
322 static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
323 static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
324 static const unsigned int ir_remote_out_pins[] = { GPIOAO_7 };
325 static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 };
326 static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 };
327 static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 };
328 static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 };
330 static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 };
331 static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 };
332 static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 };
333 static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 };
334 static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 };
335 static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 };
336 static const unsigned int spdif_out_1_pins[] = { GPIOAO_6 };
338 static const unsigned int i2s_in_ch01_pins[] = { GPIOAO_6 };
339 static const unsigned int i2s_ao_clk_in_pins[] = { GPIOAO_9 };
340 static const unsigned int i2s_lr_clk_in_pins[] = { GPIOAO_10 };
342 /* bank DIF */
343 static const unsigned int eth_rxd1_pins[] = { DIF_0_P };
344 static const unsigned int eth_rxd0_pins[] = { DIF_0_N };
345 static const unsigned int eth_rx_dv_pins[] = { DIF_1_P };
346 static const unsigned int eth_rx_clk_pins[] = { DIF_1_N };
347 static const unsigned int eth_txd0_1_pins[] = { DIF_2_P };
348 static const unsigned int eth_txd1_1_pins[] = { DIF_2_N };
349 static const unsigned int eth_rxd3_pins[] = { DIF_2_P };
350 static const unsigned int eth_rxd2_pins[] = { DIF_2_N };
351 static const unsigned int eth_tx_en_pins[] = { DIF_3_P };
352 static const unsigned int eth_ref_clk_pins[] = { DIF_3_N };
353 static const unsigned int eth_mdc_pins[] = { DIF_4_P };
354 static const unsigned int eth_mdio_en_pins[] = { DIF_4_N };
356 static struct meson_pmx_group meson8b_cbus_groups[] = {
357 GPIO_GROUP(GPIOX_0),
358 GPIO_GROUP(GPIOX_1),
359 GPIO_GROUP(GPIOX_2),
360 GPIO_GROUP(GPIOX_3),
361 GPIO_GROUP(GPIOX_4),
362 GPIO_GROUP(GPIOX_5),
363 GPIO_GROUP(GPIOX_6),
364 GPIO_GROUP(GPIOX_7),
365 GPIO_GROUP(GPIOX_8),
366 GPIO_GROUP(GPIOX_9),
367 GPIO_GROUP(GPIOX_10),
368 GPIO_GROUP(GPIOX_11),
369 GPIO_GROUP(GPIOX_16),
370 GPIO_GROUP(GPIOX_17),
371 GPIO_GROUP(GPIOX_18),
372 GPIO_GROUP(GPIOX_19),
373 GPIO_GROUP(GPIOX_20),
374 GPIO_GROUP(GPIOX_21),
376 GPIO_GROUP(GPIOY_0),
377 GPIO_GROUP(GPIOY_1),
378 GPIO_GROUP(GPIOY_3),
379 GPIO_GROUP(GPIOY_6),
380 GPIO_GROUP(GPIOY_7),
381 GPIO_GROUP(GPIOY_8),
382 GPIO_GROUP(GPIOY_9),
383 GPIO_GROUP(GPIOY_10),
384 GPIO_GROUP(GPIOY_11),
385 GPIO_GROUP(GPIOY_12),
386 GPIO_GROUP(GPIOY_13),
387 GPIO_GROUP(GPIOY_14),
389 GPIO_GROUP(GPIODV_9),
390 GPIO_GROUP(GPIODV_24),
391 GPIO_GROUP(GPIODV_25),
392 GPIO_GROUP(GPIODV_26),
393 GPIO_GROUP(GPIODV_27),
394 GPIO_GROUP(GPIODV_28),
395 GPIO_GROUP(GPIODV_29),
397 GPIO_GROUP(GPIOH_0),
398 GPIO_GROUP(GPIOH_1),
399 GPIO_GROUP(GPIOH_2),
400 GPIO_GROUP(GPIOH_3),
401 GPIO_GROUP(GPIOH_4),
402 GPIO_GROUP(GPIOH_5),
403 GPIO_GROUP(GPIOH_6),
404 GPIO_GROUP(GPIOH_7),
405 GPIO_GROUP(GPIOH_8),
406 GPIO_GROUP(GPIOH_9),
408 GPIO_GROUP(CARD_0),
409 GPIO_GROUP(CARD_1),
410 GPIO_GROUP(CARD_2),
411 GPIO_GROUP(CARD_3),
412 GPIO_GROUP(CARD_4),
413 GPIO_GROUP(CARD_5),
414 GPIO_GROUP(CARD_6),
416 GPIO_GROUP(BOOT_0),
417 GPIO_GROUP(BOOT_1),
418 GPIO_GROUP(BOOT_2),
419 GPIO_GROUP(BOOT_3),
420 GPIO_GROUP(BOOT_4),
421 GPIO_GROUP(BOOT_5),
422 GPIO_GROUP(BOOT_6),
423 GPIO_GROUP(BOOT_7),
424 GPIO_GROUP(BOOT_8),
425 GPIO_GROUP(BOOT_9),
426 GPIO_GROUP(BOOT_10),
427 GPIO_GROUP(BOOT_11),
428 GPIO_GROUP(BOOT_12),
429 GPIO_GROUP(BOOT_13),
430 GPIO_GROUP(BOOT_14),
431 GPIO_GROUP(BOOT_15),
432 GPIO_GROUP(BOOT_16),
433 GPIO_GROUP(BOOT_17),
434 GPIO_GROUP(BOOT_18),
436 GPIO_GROUP(DIF_0_P),
437 GPIO_GROUP(DIF_0_N),
438 GPIO_GROUP(DIF_1_P),
439 GPIO_GROUP(DIF_1_N),
440 GPIO_GROUP(DIF_2_P),
441 GPIO_GROUP(DIF_2_N),
442 GPIO_GROUP(DIF_3_P),
443 GPIO_GROUP(DIF_3_N),
444 GPIO_GROUP(DIF_4_P),
445 GPIO_GROUP(DIF_4_N),
447 /* bank X */
448 GROUP(sd_d0_a, 8, 5),
449 GROUP(sd_d1_a, 8, 4),
450 GROUP(sd_d2_a, 8, 3),
451 GROUP(sd_d3_a, 8, 2),
452 GROUP(sdxc_d0_0_a, 5, 29),
453 GROUP(sdxc_d47_a, 5, 12),
454 GROUP(sdxc_d13_0_a, 5, 28),
455 GROUP(sd_clk_a, 8, 1),
456 GROUP(sd_cmd_a, 8, 0),
457 GROUP(xtal_32k_out, 3, 22),
458 GROUP(xtal_24m_out, 3, 20),
459 GROUP(uart_tx_b0, 4, 9),
460 GROUP(uart_rx_b0, 4, 8),
461 GROUP(uart_cts_b0, 4, 7),
462 GROUP(uart_rts_b0, 4, 6),
463 GROUP(sdxc_d0_1_a, 5, 14),
464 GROUP(sdxc_d13_1_a, 5, 13),
465 GROUP(pcm_out_a, 3, 30),
466 GROUP(pcm_in_a, 3, 29),
467 GROUP(pcm_fs_a, 3, 28),
468 GROUP(pcm_clk_a, 3, 27),
469 GROUP(sdxc_clk_a, 5, 11),
470 GROUP(sdxc_cmd_a, 5, 10),
471 GROUP(pwm_vs_0, 7, 31),
472 GROUP(pwm_e, 9, 19),
473 GROUP(pwm_vs_1, 7, 30),
474 GROUP(uart_tx_a, 4, 17),
475 GROUP(uart_rx_a, 4, 16),
476 GROUP(uart_cts_a, 4, 15),
477 GROUP(uart_rts_a, 4, 14),
478 GROUP(uart_tx_b1, 6, 19),
479 GROUP(uart_rx_b1, 6, 18),
480 GROUP(uart_cts_b1, 6, 17),
481 GROUP(uart_rts_b1, 6, 16),
482 GROUP(iso7816_0_clk, 5, 9),
483 GROUP(iso7816_0_data, 5, 8),
484 GROUP(spi_sclk_0, 4, 22),
485 GROUP(spi_miso_0, 4, 24),
486 GROUP(spi_mosi_0, 4, 23),
487 GROUP(iso7816_det, 4, 21),
488 GROUP(iso7816_reset, 4, 20),
489 GROUP(iso7816_1_clk, 4, 19),
490 GROUP(iso7816_1_data, 4, 18),
491 GROUP(spi_ss0_0, 4, 25),
492 GROUP(tsin_clk_b, 3, 6),
493 GROUP(tsin_sop_b, 3, 7),
494 GROUP(tsin_d0_b, 3, 8),
495 GROUP(pwm_b, 2, 3),
496 GROUP(i2c_sda_d0, 4, 5),
497 GROUP(i2c_sck_d0, 4, 4),
498 GROUP(tsin_d_valid_b, 3, 9),
500 /* bank Y */
501 GROUP(tsin_d_valid_a, 3, 2),
502 GROUP(tsin_sop_a, 3, 1),
503 GROUP(tsin_d17_a, 3, 5),
504 GROUP(tsin_clk_a, 3, 0),
505 GROUP(tsin_d0_a, 3, 4),
506 GROUP(spdif_out_0, 1, 7),
507 GROUP(xtal_24m, 3, 18),
508 GROUP(iso7816_2_clk, 5, 7),
509 GROUP(iso7816_2_data, 5, 6),
511 /* bank DV */
512 GROUP(pwm_d, 3, 26),
513 GROUP(pwm_c0, 3, 25),
514 GROUP(pwm_vs_2, 7, 28),
515 GROUP(pwm_vs_3, 7, 27),
516 GROUP(pwm_vs_4, 7, 26),
517 GROUP(xtal24_out, 7, 25),
518 GROUP(uart_tx_c, 6, 23),
519 GROUP(uart_rx_c, 6, 22),
520 GROUP(uart_cts_c, 6, 21),
521 GROUP(uart_rts_c, 6, 20),
522 GROUP(pwm_c1, 3, 24),
523 GROUP(i2c_sda_a, 9, 31),
524 GROUP(i2c_sck_a, 9, 30),
525 GROUP(i2c_sda_b0, 9, 29),
526 GROUP(i2c_sck_b0, 9, 28),
527 GROUP(i2c_sda_c0, 9, 27),
528 GROUP(i2c_sck_c0, 9, 26),
530 /* bank H */
531 GROUP(hdmi_hpd, 1, 26),
532 GROUP(hdmi_sda, 1, 25),
533 GROUP(hdmi_scl, 1, 24),
534 GROUP(hdmi_cec_0, 1, 23),
535 GROUP(eth_txd1_0, 7, 21),
536 GROUP(eth_txd0_0, 7, 20),
537 GROUP(clk_24m_out, 4, 1),
538 GROUP(spi_ss1, 8, 11),
539 GROUP(spi_ss2, 8, 12),
540 GROUP(spi_ss0_1, 9, 13),
541 GROUP(spi_miso_1, 9, 12),
542 GROUP(spi_mosi_1, 9, 11),
543 GROUP(spi_sclk_1, 9, 10),
544 GROUP(eth_txd3, 6, 13),
545 GROUP(eth_txd2, 6, 12),
546 GROUP(eth_tx_clk, 6, 11),
547 GROUP(i2c_sda_b1, 5, 27),
548 GROUP(i2c_sck_b1, 5, 26),
549 GROUP(i2c_sda_c1, 5, 25),
550 GROUP(i2c_sck_c1, 5, 24),
551 GROUP(i2c_sda_d1, 4, 3),
552 GROUP(i2c_sck_d1, 4, 2),
554 /* bank BOOT */
555 GROUP(nand_io, 2, 26),
556 GROUP(nand_io_ce0, 2, 25),
557 GROUP(nand_io_ce1, 2, 24),
558 GROUP(nand_io_rb0, 2, 17),
559 GROUP(nand_ale, 2, 21),
560 GROUP(nand_cle, 2, 20),
561 GROUP(nand_wen_clk, 2, 19),
562 GROUP(nand_ren_clk, 2, 18),
563 GROUP(nand_dqs_15, 2, 27),
564 GROUP(nand_dqs_18, 2, 28),
565 GROUP(sdxc_d0_c, 4, 30),
566 GROUP(sdxc_d13_c, 4, 29),
567 GROUP(sdxc_d47_c, 4, 28),
568 GROUP(sdxc_clk_c, 7, 19),
569 GROUP(sdxc_cmd_c, 7, 18),
570 GROUP(nor_d, 5, 1),
571 GROUP(nor_q, 5, 3),
572 GROUP(nor_c, 5, 2),
573 GROUP(nor_cs, 5, 0),
574 GROUP(sd_d0_c, 6, 29),
575 GROUP(sd_d1_c, 6, 28),
576 GROUP(sd_d2_c, 6, 27),
577 GROUP(sd_d3_c, 6, 26),
578 GROUP(sd_cmd_c, 6, 30),
579 GROUP(sd_clk_c, 6, 31),
581 /* bank CARD */
582 GROUP(sd_d1_b, 2, 14),
583 GROUP(sd_d0_b, 2, 15),
584 GROUP(sd_clk_b, 2, 11),
585 GROUP(sd_cmd_b, 2, 10),
586 GROUP(sd_d3_b, 2, 12),
587 GROUP(sd_d2_b, 2, 13),
588 GROUP(sdxc_d13_b, 2, 6),
589 GROUP(sdxc_d0_b, 2, 7),
590 GROUP(sdxc_clk_b, 2, 5),
591 GROUP(sdxc_cmd_b, 2, 4),
593 /* bank DIF */
594 GROUP(eth_rxd1, 6, 0),
595 GROUP(eth_rxd0, 6, 1),
596 GROUP(eth_rx_dv, 6, 2),
597 GROUP(eth_rx_clk, 6, 3),
598 GROUP(eth_txd0_1, 6, 4),
599 GROUP(eth_txd1_1, 6, 5),
600 GROUP(eth_tx_en, 6, 6),
601 GROUP(eth_ref_clk, 6, 8),
602 GROUP(eth_mdc, 6, 9),
603 GROUP(eth_mdio_en, 6, 10),
604 GROUP(eth_rxd3, 7, 22),
605 GROUP(eth_rxd2, 7, 23),
608 static struct meson_pmx_group meson8b_aobus_groups[] = {
609 GPIO_GROUP(GPIOAO_0),
610 GPIO_GROUP(GPIOAO_1),
611 GPIO_GROUP(GPIOAO_2),
612 GPIO_GROUP(GPIOAO_3),
613 GPIO_GROUP(GPIOAO_4),
614 GPIO_GROUP(GPIOAO_5),
615 GPIO_GROUP(GPIOAO_6),
616 GPIO_GROUP(GPIOAO_7),
617 GPIO_GROUP(GPIOAO_8),
618 GPIO_GROUP(GPIOAO_9),
619 GPIO_GROUP(GPIOAO_10),
620 GPIO_GROUP(GPIOAO_11),
621 GPIO_GROUP(GPIOAO_12),
622 GPIO_GROUP(GPIOAO_13),
623 GPIO_GROUP(GPIO_BSD_EN),
624 GPIO_GROUP(GPIO_TEST_N),
626 /* bank AO */
627 GROUP(uart_tx_ao_a, 0, 12),
628 GROUP(uart_rx_ao_a, 0, 11),
629 GROUP(uart_cts_ao_a, 0, 10),
630 GROUP(uart_rts_ao_a, 0, 9),
631 GROUP(i2c_mst_sck_ao, 0, 6),
632 GROUP(i2c_mst_sda_ao, 0, 5),
633 GROUP(clk_32k_in_out, 0, 18),
634 GROUP(remote_input, 0, 0),
635 GROUP(hdmi_cec_1, 0, 17),
636 GROUP(ir_blaster, 0, 31),
637 GROUP(pwm_c2, 0, 22),
638 GROUP(i2c_sck_ao, 0, 2),
639 GROUP(i2c_sda_ao, 0, 1),
640 GROUP(ir_remote_out, 0, 21),
641 GROUP(i2s_am_clk_out, 0, 30),
642 GROUP(i2s_ao_clk_out, 0, 29),
643 GROUP(i2s_lr_clk_out, 0, 28),
644 GROUP(i2s_out_01, 0, 27),
645 GROUP(uart_tx_ao_b0, 0, 26),
646 GROUP(uart_rx_ao_b0, 0, 25),
647 GROUP(uart_cts_ao_b, 0, 8),
648 GROUP(uart_rts_ao_b, 0, 7),
649 GROUP(uart_tx_ao_b1, 0, 24),
650 GROUP(uart_rx_ao_b1, 0, 23),
651 GROUP(spdif_out_1, 0, 16),
652 GROUP(i2s_in_ch01, 0, 13),
653 GROUP(i2s_ao_clk_in, 0, 15),
654 GROUP(i2s_lr_clk_in, 0, 14),
657 static const char * const gpio_periphs_groups[] = {
658 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
659 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
660 "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
661 "GPIOX_19", "GPIOX_20", "GPIOX_21",
663 "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
664 "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
665 "GPIOY_13", "GPIOY_14",
667 "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
668 "GPIODV_27", "GPIODV_28", "GPIODV_29",
670 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
671 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
673 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
674 "CARD_5", "CARD_6",
676 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
677 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
678 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
679 "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
681 "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
682 "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
683 "DIF_4_P", "DIF_4_N"
686 static const char * const gpio_aobus_groups[] = {
687 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
688 "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
689 "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
690 "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
693 static const char * const sd_a_groups[] = {
694 "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
695 "sd_cmd_a"
698 static const char * const sdxc_a_groups[] = {
699 "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
700 "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d13_1_a"
703 static const char * const pcm_a_groups[] = {
704 "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
707 static const char * const uart_a_groups[] = {
708 "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
711 static const char * const uart_b_groups[] = {
712 "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
713 "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
716 static const char * const iso7816_groups[] = {
717 "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
718 "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
721 static const char * const i2c_d_groups[] = {
722 "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
725 static const char * const xtal_groups[] = {
726 "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
729 static const char * const uart_c_groups[] = {
730 "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
733 static const char * const i2c_c_groups[] = {
734 "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
737 static const char * const hdmi_groups[] = {
738 "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
741 static const char * const hdmi_cec_groups[] = {
742 "hdmi_cec_1"
745 static const char * const spi_groups[] = {
746 "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
747 "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
748 "spi_miso_1", "spi_ss2"
751 static const char * const ethernet_groups[] = {
752 "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
753 "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
754 "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
755 "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2"
758 static const char * const i2c_a_groups[] = {
759 "i2c_sda_a", "i2c_sck_a",
762 static const char * const i2c_b_groups[] = {
763 "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
766 static const char * const sd_c_groups[] = {
767 "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
768 "sd_cmd_c", "sd_clk_c"
771 static const char * const sdxc_c_groups[] = {
772 "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
773 "sdxc_clk_c"
776 static const char * const nand_groups[] = {
777 "nand_io", "nand_io_ce0", "nand_io_ce1",
778 "nand_io_rb0", "nand_ale", "nand_cle",
779 "nand_wen_clk", "nand_ren_clk", "nand_dqs_15",
780 "nand_dqs_18"
783 static const char * const nor_groups[] = {
784 "nor_d", "nor_q", "nor_c", "nor_cs"
787 static const char * const sd_b_groups[] = {
788 "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
789 "sd_d3_b", "sd_d2_b"
792 static const char * const sdxc_b_groups[] = {
793 "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
796 static const char * const uart_ao_groups[] = {
797 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
800 static const char * const remote_groups[] = {
801 "remote_input", "ir_blaster", "ir_remote_out"
804 static const char * const i2c_slave_ao_groups[] = {
805 "i2c_sck_ao", "i2c_sda_ao"
808 static const char * const uart_ao_b_groups[] = {
809 "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
810 "uart_cts_ao_b", "uart_rts_ao_b"
813 static const char * const i2c_mst_ao_groups[] = {
814 "i2c_mst_sck_ao", "i2c_mst_sda_ao"
817 static const char * const clk_24m_groups[] = {
818 "clk_24m_out"
821 static const char * const clk_32k_groups[] = {
822 "clk_32k_in_out"
825 static const char * const spdif_0_groups[] = {
826 "spdif_out_0"
829 static const char * const spdif_1_groups[] = {
830 "spdif_out_1"
833 static const char * const i2s_groups[] = {
834 "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
835 "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
836 "i2s_lr_clk_in"
839 static const char * const pwm_b_groups[] = {
840 "pwm_b"
843 static const char * const pwm_c_groups[] = {
844 "pwm_c0", "pwm_c1"
847 static const char * const pwm_c_ao_groups[] = {
848 "pwm_c2"
851 static const char * const pwm_d_groups[] = {
852 "pwm_d"
855 static const char * const pwm_e_groups[] = {
856 "pwm_e"
859 static const char * const pwm_vs_groups[] = {
860 "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
861 "pwm_vs_3", "pwm_vs_4"
864 static const char * const tsin_a_groups[] = {
865 "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
866 "tsin_d_valid_a"
869 static const char * const tsin_b_groups[] = {
870 "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
873 static struct meson_pmx_func meson8b_cbus_functions[] = {
874 FUNCTION(gpio_periphs),
875 FUNCTION(sd_a),
876 FUNCTION(sdxc_a),
877 FUNCTION(pcm_a),
878 FUNCTION(uart_a),
879 FUNCTION(uart_b),
880 FUNCTION(iso7816),
881 FUNCTION(i2c_d),
882 FUNCTION(xtal),
883 FUNCTION(uart_c),
884 FUNCTION(i2c_c),
885 FUNCTION(hdmi),
886 FUNCTION(spi),
887 FUNCTION(ethernet),
888 FUNCTION(i2c_a),
889 FUNCTION(i2c_b),
890 FUNCTION(sd_c),
891 FUNCTION(sdxc_c),
892 FUNCTION(nand),
893 FUNCTION(nor),
894 FUNCTION(sd_b),
895 FUNCTION(sdxc_b),
896 FUNCTION(spdif_0),
897 FUNCTION(pwm_b),
898 FUNCTION(pwm_c),
899 FUNCTION(pwm_d),
900 FUNCTION(pwm_e),
901 FUNCTION(pwm_vs),
902 FUNCTION(tsin_a),
903 FUNCTION(tsin_b),
904 FUNCTION(clk_24m),
907 static struct meson_pmx_func meson8b_aobus_functions[] = {
908 FUNCTION(gpio_aobus),
909 FUNCTION(uart_ao),
910 FUNCTION(uart_ao_b),
911 FUNCTION(i2c_slave_ao),
912 FUNCTION(i2c_mst_ao),
913 FUNCTION(i2s),
914 FUNCTION(remote),
915 FUNCTION(clk_32k),
916 FUNCTION(pwm_c_ao),
917 FUNCTION(spdif_1),
918 FUNCTION(hdmi_cec),
921 static struct meson_bank meson8b_cbus_banks[] = {
922 /* name first last irq pullen pull dir out in */
923 BANK("X0..11", GPIOX_0, GPIOX_11, 97, 108, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
924 BANK("X16..21", GPIOX_16, GPIOX_21, 113, 118, 4, 16, 4, 16, 0, 16, 1, 16, 2, 16),
925 BANK("Y0..1", GPIOY_0, GPIOY_1, 80, 81, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
926 BANK("Y3", GPIOY_3, GPIOY_3, 83, 83, 3, 3, 3, 3, 3, 3, 4, 3, 5, 3),
927 BANK("Y6..14", GPIOY_6, GPIOY_14, 86, 94, 3, 6, 3, 6, 3, 6, 4, 6, 5, 6),
928 BANK("DV9", GPIODV_9, GPIODV_9, 59, 59, 0, 9, 0, 9, 7, 9, 8, 9, 9, 9),
929 BANK("DV24..29", GPIODV_24, GPIODV_29, 74, 79, 0, 24, 0, 24, 7, 24, 8, 24, 9, 24),
930 BANK("H", GPIOH_0, GPIOH_9, 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
931 BANK("CARD", CARD_0, CARD_6, 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
932 BANK("BOOT", BOOT_0, BOOT_18, 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
935 * The following bank is not mentionned in the public datasheet
936 * There is no information whether it can be used with the gpio
937 * interrupt controller
939 BANK("DIF", DIF_0_P, DIF_4_N, -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
942 static struct meson_bank meson8b_aobus_banks[] = {
943 /* name first lastc irq pullen pull dir out in */
944 BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
947 static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
948 .name = "cbus-banks",
949 .pins = meson8b_cbus_pins,
950 .groups = meson8b_cbus_groups,
951 .funcs = meson8b_cbus_functions,
952 .banks = meson8b_cbus_banks,
953 .num_pins = ARRAY_SIZE(meson8b_cbus_pins),
954 .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
955 .num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
956 .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
957 .pmx_ops = &meson8_pmx_ops,
960 static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
961 .name = "aobus-banks",
962 .pins = meson8b_aobus_pins,
963 .groups = meson8b_aobus_groups,
964 .funcs = meson8b_aobus_functions,
965 .banks = meson8b_aobus_banks,
966 .num_pins = ARRAY_SIZE(meson8b_aobus_pins),
967 .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
968 .num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
969 .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
970 .pmx_ops = &meson8_pmx_ops,
973 static const struct of_device_id meson8b_pinctrl_dt_match[] = {
975 .compatible = "amlogic,meson8b-cbus-pinctrl",
976 .data = &meson8b_cbus_pinctrl_data,
979 .compatible = "amlogic,meson8b-aobus-pinctrl",
980 .data = &meson8b_aobus_pinctrl_data,
982 { },
985 static struct platform_driver meson8b_pinctrl_driver = {
986 .probe = meson_pinctrl_probe,
987 .driver = {
988 .name = "meson8b-pinctrl",
989 .of_match_table = meson8b_pinctrl_dt_match,
992 builtin_platform_driver(meson8b_pinctrl_driver);