drivers/pinctrl/pxa/pinctrl-pxa2xx.c

   1 /*
   2  * Marvell PXA2xx family pin control
   3  *
   4  * Copyright (C) 2015 Robert Jarzmik
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  */
  11
  12 #include <linux/bitops.h>
  13 #include <linux/io.h>
  14 #include <linux/of.h>
  15 #include <linux/of_address.h>
  16 #include <linux/module.h>
  17 #include <linux/pinctrl/pinconf.h>
  18 #include <linux/pinctrl/pinconf-generic.h>
  19 #include <linux/pinctrl/pinmux.h>
  20 #include <linux/pinctrl/pinctrl.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/slab.h>
  23
  24 #include "../pinctrl-utils.h"
  25 #include "pinctrl-pxa2xx.h"
  26
  27 static int pxa2xx_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
  28 {
  29         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  30
  31         return pctl->ngroups;
  32 }
  33
  34 static const char *pxa2xx_pctrl_get_group_name(struct pinctrl_dev *pctldev,
  35                                                unsigned tgroup)
  36 {
  37         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  38         struct pxa_pinctrl_group *group = pctl->groups + tgroup;
  39
  40         return group->name;
  41 }
  42
  43 static int pxa2xx_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
  44                                        unsigned tgroup,
  45                                        const unsigned **pins,
  46                                        unsigned *num_pins)
  47 {
  48         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  49         struct pxa_pinctrl_group *group = pctl->groups + tgroup;
  50
  51         *pins = (unsigned *)&group->pin;
  52         *num_pins = 1;
  53
  54         return 0;
  55 }
  56
  57 static const struct pinctrl_ops pxa2xx_pctl_ops = {
  58 #ifdef CONFIG_OF
  59         .dt_node_to_map         = pinconf_generic_dt_node_to_map_all,
  60         .dt_free_map            = pinctrl_utils_free_map,
  61 #endif
  62         .get_groups_count       = pxa2xx_pctrl_get_groups_count,
  63         .get_group_name         = pxa2xx_pctrl_get_group_name,
  64         .get_group_pins         = pxa2xx_pctrl_get_group_pins,
  65 };
  66
  67 static struct pxa_desc_function *
  68 pxa_desc_by_func_group(struct pxa_pinctrl *pctl, const char *pin_name,
  69                        const char *func_name)
  70 {
  71         int i;
  72         struct pxa_desc_function *df;
  73
  74         for (i = 0; i < pctl->npins; i++) {
  75                 const struct pxa_desc_pin *pin = pctl->ppins + i;
  76
  77                 if (!strcmp(pin->pin.name, pin_name))
  78                         for (df = pin->functions; df->name; df++)
  79                                 if (!strcmp(df->name, func_name))
  80                                         return df;
  81         }
  82
  83         return NULL;
  84 }
  85
  86 static int pxa2xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
  87                                          struct pinctrl_gpio_range *range,
  88                                          unsigned pin,
  89                                          bool input)
  90 {
  91         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  92         unsigned long flags;
  93         uint32_t val;
  94         void __iomem *gpdr;
  95
  96         gpdr = pctl->base_gpdr[pin / 32];
  97         dev_dbg(pctl->dev, "set_direction(pin=%d): dir=%d\n",
  98                 pin, !input);
  99
 100         spin_lock_irqsave(&pctl->lock, flags);
 101
 102         val = readl_relaxed(gpdr);
 103         val = (val & ~BIT(pin % 32)) | (input ? 0 : BIT(pin % 32));
 104         writel_relaxed(val, gpdr);
 105
 106         spin_unlock_irqrestore(&pctl->lock, flags);
 107
 108         return 0;
 109 }
 110
 111 static const char *pxa2xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
 112                                             unsigned function)
 113 {
 114         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 115         struct pxa_pinctrl_function *pf = pctl->functions + function;
 116
 117         return pf->name;
 118 }
 119
 120 static int pxa2xx_get_functions_count(struct pinctrl_dev *pctldev)
 121 {
 122         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 123
 124         return pctl->nfuncs;
 125 }
 126
 127 static int pxa2xx_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 128                                       unsigned function,
 129                                       const char * const **groups,
 130                                       unsigned * const num_groups)
 131 {
 132         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 133         struct pxa_pinctrl_function *pf = pctl->functions + function;
 134
 135         *groups = pf->groups;
 136         *num_groups = pf->ngroups;
 137
 138         return 0;
 139 }
 140
 141 static int pxa2xx_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned function,
 142                               unsigned tgroup)
 143 {
 144         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 145         struct pxa_pinctrl_group *group = pctl->groups + tgroup;
 146         struct pxa_desc_function *df;
 147         int pin, shift;
 148         unsigned long flags;
 149         void __iomem *gafr, *gpdr;
 150         u32 val;
 151
 152
 153         df = pxa_desc_by_func_group(pctl, group->name,
 154                                     (pctl->functions + function)->name);
 155         if (!df)
 156                 return -EINVAL;
 157
 158         pin = group->pin;
 159         gafr = pctl->base_gafr[pin / 16];
 160         gpdr = pctl->base_gpdr[pin / 32];
 161         shift = (pin % 16) << 1;
 162         dev_dbg(pctl->dev, "set_mux(pin=%d): af=%d dir=%d\n",
 163                 pin, df->muxval >> 1, df->muxval & 0x1);
 164
 165         spin_lock_irqsave(&pctl->lock, flags);
 166
 167         val = readl_relaxed(gafr);
 168         val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift);
 169         writel_relaxed(val, gafr);
 170
 171         val = readl_relaxed(gpdr);
 172         val = (val & ~BIT(pin % 32)) | ((df->muxval & 1) ? BIT(pin % 32) : 0);
 173         writel_relaxed(val, gpdr);
 174
 175         spin_unlock_irqrestore(&pctl->lock, flags);
 176
 177         return 0;
 178 }
 179 static const struct pinmux_ops pxa2xx_pinmux_ops = {
 180         .get_functions_count = pxa2xx_get_functions_count,
 181         .get_function_name = pxa2xx_pmx_get_func_name,
 182         .get_function_groups = pxa2xx_pmx_get_func_groups,
 183         .set_mux = pxa2xx_pmx_set_mux,
 184         .gpio_set_direction = pxa2xx_pmx_gpio_set_direction,
 185 };
 186
 187 static int pxa2xx_pconf_group_get(struct pinctrl_dev *pctldev,
 188                                   unsigned group,
 189                                   unsigned long *config)
 190 {
 191         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 192         struct pxa_pinctrl_group *g = pctl->groups + group;
 193         unsigned long flags;
 194         unsigned pin = g->pin;
 195         void __iomem *pgsr = pctl->base_pgsr[pin / 32];
 196         u32 val;
 197
 198         spin_lock_irqsave(&pctl->lock, flags);
 199         val = readl_relaxed(pgsr) & BIT(pin % 32);
 200         *config = val ? PIN_CONFIG_LOW_POWER_MODE : 0;
 201         spin_unlock_irqrestore(&pctl->lock, flags);
 202
 203         dev_dbg(pctl->dev, "get sleep gpio state(pin=%d) %d\n",
 204                 pin, !!val);
 205         return 0;
 206 }
 207
 208 static int pxa2xx_pconf_group_set(struct pinctrl_dev *pctldev,
 209                                   unsigned group,
 210                                   unsigned long *configs,
 211                                   unsigned num_configs)
 212 {
 213         struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 214         struct pxa_pinctrl_group *g = pctl->groups + group;
 215         unsigned long flags;
 216         unsigned pin = g->pin;
 217         void __iomem *pgsr = pctl->base_pgsr[pin / 32];
 218         int i, is_set = 0;
 219         u32 val;
 220
 221         for (i = 0; i < num_configs; i++) {
 222                 switch (pinconf_to_config_param(configs[i])) {
 223                 case PIN_CONFIG_LOW_POWER_MODE:
 224                         is_set = pinconf_to_config_argument(configs[i]);
 225                         break;
 226                 default:
 227                         return -EINVAL;
 228                 }
 229         }
 230
 231         dev_dbg(pctl->dev, "set sleep gpio state(pin=%d) %d\n",
 232                 pin, is_set);
 233
 234         spin_lock_irqsave(&pctl->lock, flags);
 235         val = readl_relaxed(pgsr);
 236         val = (val & ~BIT(pin % 32)) | (is_set ? BIT(pin % 32) : 0);
 237         writel_relaxed(val, pgsr);
 238         spin_unlock_irqrestore(&pctl->lock, flags);
 239
 240         return 0;
 241 }
 242
 243 static const struct pinconf_ops pxa2xx_pconf_ops = {
 244         .pin_config_group_get   = pxa2xx_pconf_group_get,
 245         .pin_config_group_set   = pxa2xx_pconf_group_set,
 246         .is_generic             = true,
 247 };
 248
 249 static struct pinctrl_desc pxa2xx_pinctrl_desc = {
 250         .confops        = &pxa2xx_pconf_ops,
 251         .pctlops        = &pxa2xx_pctl_ops,
 252         .pmxops         = &pxa2xx_pinmux_ops,
 253 };
 254
 255 static const struct pxa_pinctrl_function *
 256 pxa2xx_find_function(struct pxa_pinctrl *pctl, const char *fname,
 257                      const struct pxa_pinctrl_function *functions)
 258 {
 259         const struct pxa_pinctrl_function *func;
 260
 261         for (func = functions; func->name; func++)
 262                 if (!strcmp(fname, func->name))
 263                         return func;
 264
 265         return NULL;
 266 }
 267
 268 static int pxa2xx_build_functions(struct pxa_pinctrl *pctl)
 269 {
 270         int i;
 271         struct pxa_pinctrl_function *functions;
 272         struct pxa_desc_function *df;
 273
 274         /*
 275          * Each pin can have at most 6 alternate functions, and 2 gpio functions
 276          * which are common to each pin. As there are more than 2 pins without
 277          * alternate function, 6 * npins is an absolute high limit of the number
 278          * of functions.
 279          */
 280         functions = devm_kcalloc(pctl->dev, pctl->npins * 6,
 281                                  sizeof(*functions), GFP_KERNEL);
 282         if (!functions)
 283                 return -ENOMEM;
 284
 285         for (i = 0; i < pctl->npins; i++)
 286                 for (df = pctl->ppins[i].functions; df->name; df++)
 287                         if (!pxa2xx_find_function(pctl, df->name, functions))
 288                                 (functions + pctl->nfuncs++)->name = df->name;
 289         pctl->functions = devm_kmemdup(pctl->dev, functions,
 290                                        pctl->nfuncs * sizeof(*functions),
 291                                        GFP_KERNEL);
 292         if (!pctl->functions)
 293                 return -ENOMEM;
 294
 295         devm_kfree(pctl->dev, functions);
 296         return 0;
 297 }
 298
 299 static int pxa2xx_build_groups(struct pxa_pinctrl *pctl)
 300 {
 301         int i, j, ngroups;
 302         struct pxa_pinctrl_function *func;
 303         struct pxa_desc_function *df;
 304         char **gtmp;
 305
 306         gtmp = devm_kmalloc_array(pctl->dev, pctl->npins, sizeof(*gtmp),
 307                                   GFP_KERNEL);
 308         if (!gtmp)
 309                 return -ENOMEM;
 310
 311         for (i = 0; i < pctl->nfuncs; i++) {
 312                 ngroups = 0;
 313                 for (j = 0; j < pctl->npins; j++)
 314                         for (df = pctl->ppins[j].functions; df->name;
 315                              df++)
 316                                 if (!strcmp(pctl->functions[i].name,
 317                                             df->name))
 318                                         gtmp[ngroups++] = (char *)
 319                                                 pctl->ppins[j].pin.name;
 320                 func = pctl->functions + i;
 321                 func->ngroups = ngroups;
 322                 func->groups =
 323                         devm_kmalloc_array(pctl->dev, ngroups,
 324                                            sizeof(char *), GFP_KERNEL);
 325                 if (!func->groups)
 326                         return -ENOMEM;
 327
 328                 memcpy(func->groups, gtmp, ngroups * sizeof(*gtmp));
 329         }
 330
 331         devm_kfree(pctl->dev, gtmp);
 332         return 0;
 333 }
 334
 335 static int pxa2xx_build_state(struct pxa_pinctrl *pctl,
 336                               const struct pxa_desc_pin *ppins, int npins)
 337 {
 338         struct pxa_pinctrl_group *group;
 339         struct pinctrl_pin_desc *pins;
 340         int ret, i;
 341
 342         pctl->npins = npins;
 343         pctl->ppins = ppins;
 344         pctl->ngroups = npins;
 345
 346         pctl->desc.npins = npins;
 347         pins = devm_kcalloc(pctl->dev, npins, sizeof(*pins), GFP_KERNEL);
 348         if (!pins)
 349                 return -ENOMEM;
 350
 351         pctl->desc.pins = pins;
 352         for (i = 0; i < npins; i++)
 353                 pins[i] = ppins[i].pin;
 354
 355         pctl->groups = devm_kmalloc_array(pctl->dev, pctl->ngroups,
 356                                           sizeof(*pctl->groups), GFP_KERNEL);
 357         if (!pctl->groups)
 358                 return -ENOMEM;
 359
 360         for (i = 0; i < npins; i++) {
 361                 group = pctl->groups + i;
 362                 group->name = ppins[i].pin.name;
 363                 group->pin = ppins[i].pin.number;
 364         }
 365
 366         ret = pxa2xx_build_functions(pctl);
 367         if (ret)
 368                 return ret;
 369
 370         ret = pxa2xx_build_groups(pctl);
 371         if (ret)
 372                 return ret;
 373
 374         return 0;
 375 }
 376
 377 int pxa2xx_pinctrl_init(struct platform_device *pdev,
 378                         const struct pxa_desc_pin *ppins, int npins,
 379                         void __iomem *base_gafr[], void __iomem *base_gpdr[],
 380                         void __iomem *base_pgsr[])
 381 {
 382         struct pxa_pinctrl *pctl;
 383         int ret, i, maxpin = 0;
 384
 385         for (i = 0; i < npins; i++)
 386                 maxpin = max_t(int, ppins[i].pin.number, maxpin);
 387
 388         pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
 389         if (!pctl)
 390                 return -ENOMEM;
 391         pctl->base_gafr = devm_kcalloc(&pdev->dev, roundup(maxpin, 16),
 392                                        sizeof(*pctl->base_gafr), GFP_KERNEL);
 393         pctl->base_gpdr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32),
 394                                        sizeof(*pctl->base_gpdr), GFP_KERNEL);
 395         pctl->base_pgsr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32),
 396                                        sizeof(*pctl->base_pgsr), GFP_KERNEL);
 397         if (!pctl->base_gafr || !pctl->base_gpdr || !pctl->base_pgsr)
 398                 return -ENOMEM;
 399
 400         platform_set_drvdata(pdev, pctl);
 401         spin_lock_init(&pctl->lock);
 402
 403         pctl->dev = &pdev->dev;
 404         pctl->desc = pxa2xx_pinctrl_desc;
 405         pctl->desc.name = dev_name(&pdev->dev);
 406         pctl->desc.owner = THIS_MODULE;
 407
 408         for (i = 0; i < roundup(maxpin, 16); i += 16)
 409                 pctl->base_gafr[i / 16] = base_gafr[i / 16];
 410         for (i = 0; i < roundup(maxpin, 32); i += 32) {
 411                 pctl->base_gpdr[i / 32] = base_gpdr[i / 32];
 412                 pctl->base_pgsr[i / 32] = base_pgsr[i / 32];
 413         }
 414
 415         ret = pxa2xx_build_state(pctl, ppins, npins);
 416         if (ret)
 417                 return ret;
 418
 419         pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl);
 420         if (IS_ERR(pctl->pctl_dev)) {
 421                 dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
 422                 return PTR_ERR(pctl->pctl_dev);
 423         }
 424
 425         dev_info(&pdev->dev, "initialized pxa2xx pinctrl driver\n");
 426
 427         return 0;
 428 }
 429 EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_init);
 430
 431 int pxa2xx_pinctrl_exit(struct platform_device *pdev)
 432 {
 433         struct pxa_pinctrl *pctl = platform_get_drvdata(pdev);
 434
 435         pinctrl_unregister(pctl->pctl_dev);
 436         return 0;
 437 }
 438 EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_exit);
 439
 440 MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
 441 MODULE_DESCRIPTION("Marvell PXA2xx pinctrl driver");
 442 MODULE_LICENSE("GPL v2");