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Linux 5.1.15
[linux/fpc-iii.git] / drivers / pinctrl / qcom / pinctrl-msm8994.c
blob8e16d9ae0c39fc20c4c9217543ee6d0151b0f83d
1 /*
2 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/pinctrl/pinctrl.h>
18
19 #include "pinctrl-msm.h"
20
21 #define FUNCTION(fname) \
22 [MSM_MUX_##fname] = { \
23 .name = #fname, \
24 .groups = fname##_groups, \
25 .ngroups = ARRAY_SIZE(fname##_groups), \
26 }
27
28 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
29 { \
30 .name = "gpio" #id, \
31 .pins = gpio##id##_pins, \
32 .npins = ARRAY_SIZE(gpio##id##_pins), \
33 .funcs = (int[]){ \
34 MSM_MUX_gpio, \
35 MSM_MUX_##f1, \
36 MSM_MUX_##f2, \
37 MSM_MUX_##f3, \
38 MSM_MUX_##f4, \
39 MSM_MUX_##f5, \
40 MSM_MUX_##f6, \
41 MSM_MUX_##f7, \
42 MSM_MUX_##f8, \
43 MSM_MUX_##f9, \
44 MSM_MUX_##f10, \
45 MSM_MUX_##f11 \
46 }, \
47 .nfuncs = 12, \
48 .ctl_reg = 0x1000 + 0x10 * id, \
49 .io_reg = 0x1004 + 0x10 * id, \
50 .intr_cfg_reg = 0x1008 + 0x10 * id, \
51 .intr_status_reg = 0x100c + 0x10 * id, \
52 .intr_target_reg = 0x1008 + 0x10 * id, \
53 .mux_bit = 2, \
54 .pull_bit = 0, \
55 .drv_bit = 6, \
56 .oe_bit = 9, \
57 .in_bit = 0, \
58 .out_bit = 1, \
59 .intr_enable_bit = 0, \
60 .intr_status_bit = 0, \
61 .intr_target_bit = 5, \
62 .intr_target_kpss_val = 4, \
63 .intr_raw_status_bit = 4, \
64 .intr_polarity_bit = 1, \
65 .intr_detection_bit = 2, \
66 .intr_detection_width = 2, \
67 }
68
69 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
70 { \
71 .name = #pg_name, \
72 .pins = pg_name##_pins, \
73 .npins = ARRAY_SIZE(pg_name##_pins), \
74 .ctl_reg = ctl, \
75 .io_reg = 0, \
76 .intr_cfg_reg = 0, \
77 .intr_status_reg = 0, \
78 .intr_target_reg = 0, \
79 .mux_bit = -1, \
80 .pull_bit = pull, \
81 .drv_bit = drv, \
82 .oe_bit = -1, \
83 .in_bit = -1, \
84 .out_bit = -1, \
85 .intr_enable_bit = -1, \
86 .intr_status_bit = -1, \
87 .intr_target_bit = -1, \
88 .intr_target_kpss_val = -1, \
89 .intr_raw_status_bit = -1, \
90 .intr_polarity_bit = -1, \
91 .intr_detection_bit = -1, \
92 .intr_detection_width = -1, \
93 }
94 static const struct pinctrl_pin_desc msm8994_pins[] = {
95 PINCTRL_PIN(0, "GPIO_0"),
96 PINCTRL_PIN(1, "GPIO_1"),
97 PINCTRL_PIN(2, "GPIO_2"),
98 PINCTRL_PIN(3, "GPIO_3"),
99 PINCTRL_PIN(4, "GPIO_4"),
100 PINCTRL_PIN(5, "GPIO_5"),
101 PINCTRL_PIN(6, "GPIO_6"),
102 PINCTRL_PIN(7, "GPIO_7"),
103 PINCTRL_PIN(8, "GPIO_8"),
104 PINCTRL_PIN(9, "GPIO_9"),
105 PINCTRL_PIN(10, "GPIO_10"),
106 PINCTRL_PIN(11, "GPIO_11"),
107 PINCTRL_PIN(12, "GPIO_12"),
108 PINCTRL_PIN(13, "GPIO_13"),
109 PINCTRL_PIN(14, "GPIO_14"),
110 PINCTRL_PIN(15, "GPIO_15"),
111 PINCTRL_PIN(16, "GPIO_16"),
112 PINCTRL_PIN(17, "GPIO_17"),
113 PINCTRL_PIN(18, "GPIO_18"),
114 PINCTRL_PIN(19, "GPIO_19"),
115 PINCTRL_PIN(20, "GPIO_20"),
116 PINCTRL_PIN(21, "GPIO_21"),
117 PINCTRL_PIN(22, "GPIO_22"),
118 PINCTRL_PIN(23, "GPIO_23"),
119 PINCTRL_PIN(24, "GPIO_24"),
120 PINCTRL_PIN(25, "GPIO_25"),
121 PINCTRL_PIN(26, "GPIO_26"),
122 PINCTRL_PIN(27, "GPIO_27"),
123 PINCTRL_PIN(28, "GPIO_28"),
124 PINCTRL_PIN(29, "GPIO_29"),
125 PINCTRL_PIN(30, "GPIO_30"),
126 PINCTRL_PIN(31, "GPIO_31"),
127 PINCTRL_PIN(32, "GPIO_32"),
128 PINCTRL_PIN(33, "GPIO_33"),
129 PINCTRL_PIN(34, "GPIO_34"),
130 PINCTRL_PIN(35, "GPIO_35"),
131 PINCTRL_PIN(36, "GPIO_36"),
132 PINCTRL_PIN(37, "GPIO_37"),
133 PINCTRL_PIN(38, "GPIO_38"),
134 PINCTRL_PIN(39, "GPIO_39"),
135 PINCTRL_PIN(40, "GPIO_40"),
136 PINCTRL_PIN(41, "GPIO_41"),
137 PINCTRL_PIN(42, "GPIO_42"),
138 PINCTRL_PIN(43, "GPIO_43"),
139 PINCTRL_PIN(44, "GPIO_44"),
140 PINCTRL_PIN(45, "GPIO_45"),
141 PINCTRL_PIN(46, "GPIO_46"),
142 PINCTRL_PIN(47, "GPIO_47"),
143 PINCTRL_PIN(48, "GPIO_48"),
144 PINCTRL_PIN(49, "GPIO_49"),
145 PINCTRL_PIN(50, "GPIO_50"),
146 PINCTRL_PIN(51, "GPIO_51"),
147 PINCTRL_PIN(52, "GPIO_52"),
148 PINCTRL_PIN(53, "GPIO_53"),
149 PINCTRL_PIN(54, "GPIO_54"),
150 PINCTRL_PIN(55, "GPIO_55"),
151 PINCTRL_PIN(56, "GPIO_56"),
152 PINCTRL_PIN(57, "GPIO_57"),
153 PINCTRL_PIN(58, "GPIO_58"),
154 PINCTRL_PIN(59, "GPIO_59"),
155 PINCTRL_PIN(60, "GPIO_60"),
156 PINCTRL_PIN(61, "GPIO_61"),
157 PINCTRL_PIN(62, "GPIO_62"),
158 PINCTRL_PIN(63, "GPIO_63"),
159 PINCTRL_PIN(64, "GPIO_64"),
160 PINCTRL_PIN(65, "GPIO_65"),
161 PINCTRL_PIN(66, "GPIO_66"),
162 PINCTRL_PIN(67, "GPIO_67"),
163 PINCTRL_PIN(68, "GPIO_68"),
164 PINCTRL_PIN(69, "GPIO_69"),
165 PINCTRL_PIN(70, "GPIO_70"),
166 PINCTRL_PIN(71, "GPIO_71"),
167 PINCTRL_PIN(72, "GPIO_72"),
168 PINCTRL_PIN(73, "GPIO_73"),
169 PINCTRL_PIN(74, "GPIO_74"),
170 PINCTRL_PIN(75, "GPIO_75"),
171 PINCTRL_PIN(76, "GPIO_76"),
172 PINCTRL_PIN(77, "GPIO_77"),
173 PINCTRL_PIN(78, "GPIO_78"),
174 PINCTRL_PIN(79, "GPIO_79"),
175 PINCTRL_PIN(80, "GPIO_80"),
176 PINCTRL_PIN(81, "GPIO_81"),
177 PINCTRL_PIN(82, "GPIO_82"),
178 PINCTRL_PIN(83, "GPIO_83"),
179 PINCTRL_PIN(84, "GPIO_84"),
180 PINCTRL_PIN(85, "GPIO_85"),
181 PINCTRL_PIN(86, "GPIO_86"),
182 PINCTRL_PIN(87, "GPIO_87"),
183 PINCTRL_PIN(88, "GPIO_88"),
184 PINCTRL_PIN(89, "GPIO_89"),
185 PINCTRL_PIN(90, "GPIO_90"),
186 PINCTRL_PIN(91, "GPIO_91"),
187 PINCTRL_PIN(92, "GPIO_92"),
188 PINCTRL_PIN(93, "GPIO_93"),
189 PINCTRL_PIN(94, "GPIO_94"),
190 PINCTRL_PIN(95, "GPIO_95"),
191 PINCTRL_PIN(96, "GPIO_96"),
192 PINCTRL_PIN(97, "GPIO_97"),
193 PINCTRL_PIN(98, "GPIO_98"),
194 PINCTRL_PIN(99, "GPIO_99"),
195 PINCTRL_PIN(100, "GPIO_100"),
196 PINCTRL_PIN(101, "GPIO_101"),
197 PINCTRL_PIN(102, "GPIO_102"),
198 PINCTRL_PIN(103, "GPIO_103"),
199 PINCTRL_PIN(104, "GPIO_104"),
200 PINCTRL_PIN(105, "GPIO_105"),
201 PINCTRL_PIN(106, "GPIO_106"),
202 PINCTRL_PIN(107, "GPIO_107"),
203 PINCTRL_PIN(108, "GPIO_108"),
204 PINCTRL_PIN(109, "GPIO_109"),
205 PINCTRL_PIN(110, "GPIO_110"),
206 PINCTRL_PIN(111, "GPIO_111"),
207 PINCTRL_PIN(112, "GPIO_112"),
208 PINCTRL_PIN(113, "GPIO_113"),
209 PINCTRL_PIN(114, "GPIO_114"),
210 PINCTRL_PIN(115, "GPIO_115"),
211 PINCTRL_PIN(116, "GPIO_116"),
212 PINCTRL_PIN(117, "GPIO_117"),
213 PINCTRL_PIN(118, "GPIO_118"),
214 PINCTRL_PIN(119, "GPIO_119"),
215 PINCTRL_PIN(120, "GPIO_120"),
216 PINCTRL_PIN(121, "GPIO_121"),
217 PINCTRL_PIN(122, "GPIO_122"),
218 PINCTRL_PIN(123, "GPIO_123"),
219 PINCTRL_PIN(124, "GPIO_124"),
220 PINCTRL_PIN(125, "GPIO_125"),
221 PINCTRL_PIN(126, "GPIO_126"),
222 PINCTRL_PIN(127, "GPIO_127"),
223 PINCTRL_PIN(128, "GPIO_128"),
224 PINCTRL_PIN(129, "GPIO_129"),
225 PINCTRL_PIN(130, "GPIO_130"),
226 PINCTRL_PIN(131, "GPIO_131"),
227 PINCTRL_PIN(132, "GPIO_132"),
228 PINCTRL_PIN(133, "GPIO_133"),
229 PINCTRL_PIN(134, "GPIO_134"),
230 PINCTRL_PIN(135, "GPIO_135"),
231 PINCTRL_PIN(136, "GPIO_136"),
232 PINCTRL_PIN(137, "GPIO_137"),
233 PINCTRL_PIN(138, "GPIO_138"),
234 PINCTRL_PIN(139, "GPIO_139"),
235 PINCTRL_PIN(140, "GPIO_140"),
236 PINCTRL_PIN(141, "GPIO_141"),
237 PINCTRL_PIN(142, "GPIO_142"),
238 PINCTRL_PIN(143, "GPIO_143"),
239 PINCTRL_PIN(144, "GPIO_144"),
240 PINCTRL_PIN(145, "GPIO_145"),
241 PINCTRL_PIN(146, "SDC1_RCLK"),
242 PINCTRL_PIN(147, "SDC1_CLK"),
243 PINCTRL_PIN(148, "SDC1_CMD"),
244 PINCTRL_PIN(149, "SDC1_DATA"),
245 PINCTRL_PIN(150, "SDC2_CLK"),
246 PINCTRL_PIN(151, "SDC2_CMD"),
247 PINCTRL_PIN(152, "SDC2_DATA"),
248 PINCTRL_PIN(153, "SDC3_CLK"),
249 PINCTRL_PIN(154, "SDC3_CMD"),
250 PINCTRL_PIN(155, "SDC3_DATA"),
251 };
252
253 #define DECLARE_MSM_GPIO_PINS(pin) \
254 static const unsigned int gpio##pin##_pins[] = { pin }
255 DECLARE_MSM_GPIO_PINS(0);
256 DECLARE_MSM_GPIO_PINS(1);
257 DECLARE_MSM_GPIO_PINS(2);
258 DECLARE_MSM_GPIO_PINS(3);
259 DECLARE_MSM_GPIO_PINS(4);
260 DECLARE_MSM_GPIO_PINS(5);
261 DECLARE_MSM_GPIO_PINS(6);
262 DECLARE_MSM_GPIO_PINS(7);
263 DECLARE_MSM_GPIO_PINS(8);
264 DECLARE_MSM_GPIO_PINS(9);
265 DECLARE_MSM_GPIO_PINS(10);
266 DECLARE_MSM_GPIO_PINS(11);
267 DECLARE_MSM_GPIO_PINS(12);
268 DECLARE_MSM_GPIO_PINS(13);
269 DECLARE_MSM_GPIO_PINS(14);
270 DECLARE_MSM_GPIO_PINS(15);
271 DECLARE_MSM_GPIO_PINS(16);
272 DECLARE_MSM_GPIO_PINS(17);
273 DECLARE_MSM_GPIO_PINS(18);
274 DECLARE_MSM_GPIO_PINS(19);
275 DECLARE_MSM_GPIO_PINS(20);
276 DECLARE_MSM_GPIO_PINS(21);
277 DECLARE_MSM_GPIO_PINS(22);
278 DECLARE_MSM_GPIO_PINS(23);
279 DECLARE_MSM_GPIO_PINS(24);
280 DECLARE_MSM_GPIO_PINS(25);
281 DECLARE_MSM_GPIO_PINS(26);
282 DECLARE_MSM_GPIO_PINS(27);
283 DECLARE_MSM_GPIO_PINS(28);
284 DECLARE_MSM_GPIO_PINS(29);
285 DECLARE_MSM_GPIO_PINS(30);
286 DECLARE_MSM_GPIO_PINS(31);
287 DECLARE_MSM_GPIO_PINS(32);
288 DECLARE_MSM_GPIO_PINS(33);
289 DECLARE_MSM_GPIO_PINS(34);
290 DECLARE_MSM_GPIO_PINS(35);
291 DECLARE_MSM_GPIO_PINS(36);
292 DECLARE_MSM_GPIO_PINS(37);
293 DECLARE_MSM_GPIO_PINS(38);
294 DECLARE_MSM_GPIO_PINS(39);
295 DECLARE_MSM_GPIO_PINS(40);
296 DECLARE_MSM_GPIO_PINS(41);
297 DECLARE_MSM_GPIO_PINS(42);
298 DECLARE_MSM_GPIO_PINS(43);
299 DECLARE_MSM_GPIO_PINS(44);
300 DECLARE_MSM_GPIO_PINS(45);
301 DECLARE_MSM_GPIO_PINS(46);
302 DECLARE_MSM_GPIO_PINS(47);
303 DECLARE_MSM_GPIO_PINS(48);
304 DECLARE_MSM_GPIO_PINS(49);
305 DECLARE_MSM_GPIO_PINS(50);
306 DECLARE_MSM_GPIO_PINS(51);
307 DECLARE_MSM_GPIO_PINS(52);
308 DECLARE_MSM_GPIO_PINS(53);
309 DECLARE_MSM_GPIO_PINS(54);
310 DECLARE_MSM_GPIO_PINS(55);
311 DECLARE_MSM_GPIO_PINS(56);
312 DECLARE_MSM_GPIO_PINS(57);
313 DECLARE_MSM_GPIO_PINS(58);
314 DECLARE_MSM_GPIO_PINS(59);
315 DECLARE_MSM_GPIO_PINS(60);
316 DECLARE_MSM_GPIO_PINS(61);
317 DECLARE_MSM_GPIO_PINS(62);
318 DECLARE_MSM_GPIO_PINS(63);
319 DECLARE_MSM_GPIO_PINS(64);
320 DECLARE_MSM_GPIO_PINS(65);
321 DECLARE_MSM_GPIO_PINS(66);
322 DECLARE_MSM_GPIO_PINS(67);
323 DECLARE_MSM_GPIO_PINS(68);
324 DECLARE_MSM_GPIO_PINS(69);
325 DECLARE_MSM_GPIO_PINS(70);
326 DECLARE_MSM_GPIO_PINS(71);
327 DECLARE_MSM_GPIO_PINS(72);
328 DECLARE_MSM_GPIO_PINS(73);
329 DECLARE_MSM_GPIO_PINS(74);
330 DECLARE_MSM_GPIO_PINS(75);
331 DECLARE_MSM_GPIO_PINS(76);
332 DECLARE_MSM_GPIO_PINS(77);
333 DECLARE_MSM_GPIO_PINS(78);
334 DECLARE_MSM_GPIO_PINS(79);
335 DECLARE_MSM_GPIO_PINS(80);
336 DECLARE_MSM_GPIO_PINS(81);
337 DECLARE_MSM_GPIO_PINS(82);
338 DECLARE_MSM_GPIO_PINS(83);
339 DECLARE_MSM_GPIO_PINS(84);
340 DECLARE_MSM_GPIO_PINS(85);
341 DECLARE_MSM_GPIO_PINS(86);
342 DECLARE_MSM_GPIO_PINS(87);
343 DECLARE_MSM_GPIO_PINS(88);
344 DECLARE_MSM_GPIO_PINS(89);
345 DECLARE_MSM_GPIO_PINS(90);
346 DECLARE_MSM_GPIO_PINS(91);
347 DECLARE_MSM_GPIO_PINS(92);
348 DECLARE_MSM_GPIO_PINS(93);
349 DECLARE_MSM_GPIO_PINS(94);
350 DECLARE_MSM_GPIO_PINS(95);
351 DECLARE_MSM_GPIO_PINS(96);
352 DECLARE_MSM_GPIO_PINS(97);
353 DECLARE_MSM_GPIO_PINS(98);
354 DECLARE_MSM_GPIO_PINS(99);
355 DECLARE_MSM_GPIO_PINS(100);
356 DECLARE_MSM_GPIO_PINS(101);
357 DECLARE_MSM_GPIO_PINS(102);
358 DECLARE_MSM_GPIO_PINS(103);
359 DECLARE_MSM_GPIO_PINS(104);
360 DECLARE_MSM_GPIO_PINS(105);
361 DECLARE_MSM_GPIO_PINS(106);
362 DECLARE_MSM_GPIO_PINS(107);
363 DECLARE_MSM_GPIO_PINS(108);
364 DECLARE_MSM_GPIO_PINS(109);
365 DECLARE_MSM_GPIO_PINS(110);
366 DECLARE_MSM_GPIO_PINS(111);
367 DECLARE_MSM_GPIO_PINS(112);
368 DECLARE_MSM_GPIO_PINS(113);
369 DECLARE_MSM_GPIO_PINS(114);
370 DECLARE_MSM_GPIO_PINS(115);
371 DECLARE_MSM_GPIO_PINS(116);
372 DECLARE_MSM_GPIO_PINS(117);
373 DECLARE_MSM_GPIO_PINS(118);
374 DECLARE_MSM_GPIO_PINS(119);
375 DECLARE_MSM_GPIO_PINS(120);
376 DECLARE_MSM_GPIO_PINS(121);
377 DECLARE_MSM_GPIO_PINS(122);
378 DECLARE_MSM_GPIO_PINS(123);
379 DECLARE_MSM_GPIO_PINS(124);
380 DECLARE_MSM_GPIO_PINS(125);
381 DECLARE_MSM_GPIO_PINS(126);
382 DECLARE_MSM_GPIO_PINS(127);
383 DECLARE_MSM_GPIO_PINS(128);
384 DECLARE_MSM_GPIO_PINS(129);
385 DECLARE_MSM_GPIO_PINS(130);
386 DECLARE_MSM_GPIO_PINS(131);
387 DECLARE_MSM_GPIO_PINS(132);
388 DECLARE_MSM_GPIO_PINS(133);
389 DECLARE_MSM_GPIO_PINS(134);
390 DECLARE_MSM_GPIO_PINS(135);
391 DECLARE_MSM_GPIO_PINS(136);
392 DECLARE_MSM_GPIO_PINS(137);
393 DECLARE_MSM_GPIO_PINS(138);
394 DECLARE_MSM_GPIO_PINS(139);
395 DECLARE_MSM_GPIO_PINS(140);
396 DECLARE_MSM_GPIO_PINS(141);
397 DECLARE_MSM_GPIO_PINS(142);
398 DECLARE_MSM_GPIO_PINS(143);
399 DECLARE_MSM_GPIO_PINS(144);
400 DECLARE_MSM_GPIO_PINS(145);
401
402 static const unsigned int sdc1_rclk_pins[] = { 146 };
403 static const unsigned int sdc1_clk_pins[] = { 147 };
404 static const unsigned int sdc1_cmd_pins[] = { 148 };
405 static const unsigned int sdc1_data_pins[] = { 149 };
406 static const unsigned int sdc2_clk_pins[] = { 150 };
407 static const unsigned int sdc2_cmd_pins[] = { 151 };
408 static const unsigned int sdc2_data_pins[] = { 152 };
409 static const unsigned int sdc3_clk_pins[] = { 153 };
410 static const unsigned int sdc3_cmd_pins[] = { 154 };
411 static const unsigned int sdc3_data_pins[] = { 155 };
412
413 enum msm8994_functions {
414 MSM_MUX_audio_ref_clk,
415 MSM_MUX_blsp_i2c1,
416 MSM_MUX_blsp_i2c2,
417 MSM_MUX_blsp_i2c3,
418 MSM_MUX_blsp_i2c4,
419 MSM_MUX_blsp_i2c5,
420 MSM_MUX_blsp_i2c6,
421 MSM_MUX_blsp_i2c7,
422 MSM_MUX_blsp_i2c8,
423 MSM_MUX_blsp_i2c9,
424 MSM_MUX_blsp_i2c10,
425 MSM_MUX_blsp_i2c11,
426 MSM_MUX_blsp_i2c12,
427 MSM_MUX_blsp_spi1,
428 MSM_MUX_blsp_spi1_cs1,
429 MSM_MUX_blsp_spi1_cs2,
430 MSM_MUX_blsp_spi1_cs3,
431 MSM_MUX_blsp_spi2,
432 MSM_MUX_blsp_spi2_cs1,
433 MSM_MUX_blsp_spi2_cs2,
434 MSM_MUX_blsp_spi2_cs3,
435 MSM_MUX_blsp_spi3,
436 MSM_MUX_blsp_spi4,
437 MSM_MUX_blsp_spi5,
438 MSM_MUX_blsp_spi6,
439 MSM_MUX_blsp_spi7,
440 MSM_MUX_blsp_spi8,
441 MSM_MUX_blsp_spi9,
442 MSM_MUX_blsp_spi10,
443 MSM_MUX_blsp_spi10_cs1,
444 MSM_MUX_blsp_spi10_cs2,
445 MSM_MUX_blsp_spi10_cs3,
446 MSM_MUX_blsp_spi11,
447 MSM_MUX_blsp_spi12,
448 MSM_MUX_blsp_uart1,
449 MSM_MUX_blsp_uart2,
450 MSM_MUX_blsp_uart3,
451 MSM_MUX_blsp_uart4,
452 MSM_MUX_blsp_uart5,
453 MSM_MUX_blsp_uart6,
454 MSM_MUX_blsp_uart7,
455 MSM_MUX_blsp_uart8,
456 MSM_MUX_blsp_uart9,
457 MSM_MUX_blsp_uart10,
458 MSM_MUX_blsp_uart11,
459 MSM_MUX_blsp_uart12,
460 MSM_MUX_blsp_uim1,
461 MSM_MUX_blsp_uim2,
462 MSM_MUX_blsp_uim3,
463 MSM_MUX_blsp_uim4,
464 MSM_MUX_blsp_uim5,
465 MSM_MUX_blsp_uim6,
466 MSM_MUX_blsp_uim7,
467 MSM_MUX_blsp_uim8,
468 MSM_MUX_blsp_uim9,
469 MSM_MUX_blsp_uim10,
470 MSM_MUX_blsp_uim11,
471 MSM_MUX_blsp_uim12,
472 MSM_MUX_blsp11_i2c_scl_b,
473 MSM_MUX_blsp11_i2c_sda_b,
474 MSM_MUX_blsp11_uart_rx_b,
475 MSM_MUX_blsp11_uart_tx_b,
476 MSM_MUX_cam_mclk0,
477 MSM_MUX_cam_mclk1,
478 MSM_MUX_cam_mclk2,
479 MSM_MUX_cam_mclk3,
480 MSM_MUX_cci_async_in0,
481 MSM_MUX_cci_async_in1,
482 MSM_MUX_cci_async_in2,
483 MSM_MUX_cci_i2c0,
484 MSM_MUX_cci_i2c1,
485 MSM_MUX_cci_timer0,
486 MSM_MUX_cci_timer1,
487 MSM_MUX_cci_timer2,
488 MSM_MUX_cci_timer3,
489 MSM_MUX_cci_timer4,
490 MSM_MUX_gcc_gp1_clk_a,
491 MSM_MUX_gcc_gp1_clk_b,
492 MSM_MUX_gcc_gp2_clk_a,
493 MSM_MUX_gcc_gp2_clk_b,
494 MSM_MUX_gcc_gp3_clk_a,
495 MSM_MUX_gcc_gp3_clk_b,
496 MSM_MUX_gp_mn,
497 MSM_MUX_gp_pdm0,
498 MSM_MUX_gp_pdm1,
499 MSM_MUX_gp_pdm2,
500 MSM_MUX_gp0_clk,
501 MSM_MUX_gp1_clk,
502 MSM_MUX_gps_tx,
503 MSM_MUX_gsm_tx,
504 MSM_MUX_hdmi_cec,
505 MSM_MUX_hdmi_ddc,
506 MSM_MUX_hdmi_hpd,
507 MSM_MUX_hdmi_rcv,
508 MSM_MUX_mdp_vsync,
509 MSM_MUX_mss_lte,
510 MSM_MUX_nav_pps,
511 MSM_MUX_nav_tsync,
512 MSM_MUX_qdss_cti_trig_in_a,
513 MSM_MUX_qdss_cti_trig_in_b,
514 MSM_MUX_qdss_cti_trig_in_c,
515 MSM_MUX_qdss_cti_trig_in_d,
516 MSM_MUX_qdss_cti_trig_out_a,
517 MSM_MUX_qdss_cti_trig_out_b,
518 MSM_MUX_qdss_cti_trig_out_c,
519 MSM_MUX_qdss_cti_trig_out_d,
520 MSM_MUX_qdss_traceclk_a,
521 MSM_MUX_qdss_traceclk_b,
522 MSM_MUX_qdss_tracectl_a,
523 MSM_MUX_qdss_tracectl_b,
524 MSM_MUX_qdss_tracedata_a,
525 MSM_MUX_qdss_tracedata_b,
526 MSM_MUX_qua_mi2s,
527 MSM_MUX_pci_e0,
528 MSM_MUX_pci_e1,
529 MSM_MUX_pri_mi2s,
530 MSM_MUX_sdc4,
531 MSM_MUX_sec_mi2s,
532 MSM_MUX_slimbus,
533 MSM_MUX_spkr_i2s,
534 MSM_MUX_ter_mi2s,
535 MSM_MUX_tsif1,
536 MSM_MUX_tsif2,
537 MSM_MUX_uim1,
538 MSM_MUX_uim2,
539 MSM_MUX_uim3,
540 MSM_MUX_uim4,
541 MSM_MUX_uim_batt_alarm,
542 MSM_MUX_gpio,
543 MSM_MUX_NA,
544 };
545
546 static const char * const gpio_groups[] = {
547 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
548 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
549 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
550 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
551 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
552 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
553 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
554 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
555 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
556 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
557 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
558 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
559 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
560 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
561 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
562 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
563 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
564 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
565 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
566 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
567 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
568 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
569 };
570
571 static const char * const blsp_spi1_groups[] = {
572 "gpio0", "gpio1", "gpio2", "gpio3"
573 };
574 static const char * const blsp_uart1_groups[] = {
575 "gpio0", "gpio1", "gpio2", "gpio3"
576 };
577 static const char * const blsp_uim1_groups[] = {
578 "gpio0", "gpio1"
579 };
580 static const char * const hdmi_rcv_groups[] = {
581 "gpio0"
582 };
583 static const char * const blsp_i2c1_groups[] = {
584 "gpio2", "gpio3"
585 };
586 static const char * const blsp_spi2_groups[] = {
587 "gpio4", "gpio5", "gpio6", "gpio7"
588 };
589 static const char * const blsp_uart2_groups[] = {
590 "gpio4", "gpio5", "gpio6", "gpio7"
591 };
592 static const char * const blsp_uim2_groups[] = {
593 "gpio4", "gpio5"
594 };
595 static const char * const qdss_cti_trig_out_b_groups[] = {
596 "gpio4",
597 };
598 static const char * const qdss_cti_trig_in_b_groups[] = {
599 "gpio5",
600 };
601 static const char * const blsp_i2c2_groups[] = {
602 "gpio6", "gpio7"
603 };
604 static const char * const blsp_spi3_groups[] = {
605 "gpio8", "gpio9", "gpio10", "gpio11"
606 };
607 static const char * const blsp_uart3_groups[] = {
608 "gpio8", "gpio9", "gpio10", "gpio11"
609 };
610 static const char * const blsp_uim3_groups[] = {
611 "gpio8", "gpio9"
612 };
613 static const char * const blsp_spi1_cs1_groups[] = {
614 "gpio8"
615 };
616 static const char * const blsp_spi1_cs2_groups[] = {
617 "gpio9", "gpio11"
618 };
619 static const char * const mdp_vsync_groups[] = {
620 "gpio10", "gpio11", "gpio12"
621 };
622 static const char * const blsp_i2c3_groups[] = {
623 "gpio10", "gpio11"
624 };
625 static const char * const blsp_spi1_cs3_groups[] = {
626 "gpio10"
627 };
628 static const char * const qdss_tracedata_b_groups[] = {
629 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18",
630 "gpio19", "gpio21", "gpio22", "gpio23", "gpio25", "gpio26",
631 "gpio57", "gpio58", "gpio92", "gpio93",
632 };
633 static const char * const cam_mclk0_groups[] = {
634 "gpio13"
635 };
636 static const char * const cam_mclk1_groups[] = {
637 "gpio14"
638 };
639 static const char * const cam_mclk2_groups[] = {
640 "gpio15"
641 };
642 static const char * const cam_mclk3_groups[] = {
643 "gpio16"
644 };
645 static const char * const cci_i2c0_groups[] = {
646 "gpio17", "gpio18"
647 };
648 static const char * const blsp_spi4_groups[] = {
649 "gpio17", "gpio18", "gpio19", "gpio20"
650 };
651 static const char * const blsp_uart4_groups[] = {
652 "gpio17", "gpio18", "gpio19", "gpio20"
653 };
654 static const char * const blsp_uim4_groups[] = {
655 "gpio17", "gpio18"
656 };
657 static const char * const cci_i2c1_groups[] = {
658 "gpio19", "gpio20"
659 };
660 static const char * const blsp_i2c4_groups[] = {
661 "gpio19", "gpio20"
662 };
663 static const char * const cci_timer0_groups[] = {
664 "gpio21"
665 };
666 static const char * const blsp_spi5_groups[] = {
667 "gpio21", "gpio22", "gpio23", "gpio24"
668 };
669 static const char * const blsp_uart5_groups[] = {
670 "gpio21", "gpio22", "gpio23", "gpio24"
671 };
672 static const char * const blsp_uim5_groups[] = {
673 "gpio21", "gpio22"
674 };
675 static const char * const cci_timer1_groups[] = {
676 "gpio22"
677 };
678 static const char * const cci_timer2_groups[] = {
679 "gpio23"
680 };
681 static const char * const blsp_i2c5_groups[] = {
682 "gpio23", "gpio24"
683 };
684 static const char * const cci_timer3_groups[] = {
685 "gpio24"
686 };
687 static const char * const cci_async_in1_groups[] = {
688 "gpio24"
689 };
690 static const char * const cci_timer4_groups[] = {
691 "gpio25"
692 };
693 static const char * const cci_async_in2_groups[] = {
694 "gpio25"
695 };
696 static const char * const blsp_spi6_groups[] = {
697 "gpio25", "gpio26", "gpio27", "gpio28"
698 };
699 static const char * const blsp_uart6_groups[] = {
700 "gpio25", "gpio26", "gpio27", "gpio28"
701 };
702 static const char * const blsp_uim6_groups[] = {
703 "gpio25", "gpio26"
704 };
705 static const char * const cci_async_in0_groups[] = {
706 "gpio26"
707 };
708 static const char * const gp0_clk_groups[] = {
709 "gpio26"
710 };
711 static const char * const gp1_clk_groups[] = {
712 "gpio27", "gpio57", "gpio78"
713 };
714 static const char * const blsp_i2c6_groups[] = {
715 "gpio27", "gpio28"
716 };
717 static const char * const qdss_tracectl_a_groups[] = {
718 "gpio27",
719 };
720 static const char * const qdss_traceclk_a_groups[] = {
721 "gpio28",
722 };
723 static const char * const gp_mn_groups[] = {
724 "gpio29"
725 };
726 static const char * const hdmi_cec_groups[] = {
727 "gpio31"
728 };
729 static const char * const hdmi_ddc_groups[] = {
730 "gpio32", "gpio33"
731 };
732 static const char * const hdmi_hpd_groups[] = {
733 "gpio34"
734 };
735 static const char * const uim3_groups[] = {
736 "gpio35", "gpio36", "gpio37", "gpio38"
737 };
738 static const char * const pci_e1_groups[] = {
739 "gpio35", "gpio36",
740 };
741 static const char * const blsp_spi7_groups[] = {
742 "gpio41", "gpio42", "gpio43", "gpio44"
743 };
744 static const char * const blsp_uart7_groups[] = {
745 "gpio41", "gpio42", "gpio43", "gpio44"
746 };
747 static const char * const blsp_uim7_groups[] = {
748 "gpio41", "gpio42"
749 };
750 static const char * const qdss_cti_trig_out_c_groups[] = {
751 "gpio41",
752 };
753 static const char * const qdss_cti_trig_in_c_groups[] = {
754 "gpio42",
755 };
756 static const char * const blsp_i2c7_groups[] = {
757 "gpio43", "gpio44"
758 };
759 static const char * const blsp_spi8_groups[] = {
760 "gpio45", "gpio46", "gpio47", "gpio48"
761 };
762 static const char * const blsp_uart8_groups[] = {
763 "gpio45", "gpio46", "gpio47", "gpio48"
764 };
765 static const char * const blsp_uim8_groups[] = {
766 "gpio45", "gpio46"
767 };
768 static const char * const blsp_i2c8_groups[] = {
769 "gpio47", "gpio48"
770 };
771 static const char * const blsp_spi10_cs1_groups[] = {
772 "gpio47", "gpio67"
773 };
774 static const char * const blsp_spi10_cs2_groups[] = {
775 "gpio48", "gpio68"
776 };
777 static const char * const uim2_groups[] = {
778 "gpio49", "gpio50", "gpio51", "gpio52"
779 };
780 static const char * const blsp_spi9_groups[] = {
781 "gpio49", "gpio50", "gpio51", "gpio52"
782 };
783 static const char * const blsp_uart9_groups[] = {
784 "gpio49", "gpio50", "gpio51", "gpio52"
785 };
786 static const char * const blsp_uim9_groups[] = {
787 "gpio49", "gpio50"
788 };
789 static const char * const blsp_i2c9_groups[] = {
790 "gpio51", "gpio52"
791 };
792 static const char * const pci_e0_groups[] = {
793 "gpio53", "gpio54",
794 };
795 static const char * const uim4_groups[] = {
796 "gpio53", "gpio54", "gpio55", "gpio56"
797 };
798 static const char * const blsp_spi10_groups[] = {
799 "gpio53", "gpio54", "gpio55", "gpio56"
800 };
801 static const char * const blsp_uart10_groups[] = {
802 "gpio53", "gpio54", "gpio55", "gpio56"
803 };
804 static const char * const blsp_uim10_groups[] = {
805 "gpio53", "gpio54"
806 };
807 static const char * const qdss_tracedata_a_groups[] = {
808 "gpio53", "gpio54", "gpio63", "gpio64", "gpio65",
809 "gpio66", "gpio67", "gpio74", "gpio75", "gpio76",
810 "gpio77", "gpio85", "gpio86", "gpio87", "gpio89",
811 "gpio90"
812 };
813 static const char * const gp_pdm0_groups[] = {
814 "gpio54", "gpio95"
815 };
816 static const char * const blsp_i2c10_groups[] = {
817 "gpio55", "gpio56"
818 };
819 static const char * const qdss_cti_trig_in_a_groups[] = {
820 "gpio55",
821 };
822 static const char * const qdss_cti_trig_out_a_groups[] = {
823 "gpio56",
824 };
825 static const char * const qua_mi2s_groups[] = {
826 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
827 };
828 static const char * const gcc_gp1_clk_a_groups[] = {
829 "gpio57"
830 };
831 static const char * const gcc_gp2_clk_a_groups[] = {
832 "gpio58"
833 };
834 static const char * const gcc_gp3_clk_a_groups[] = {
835 "gpio59"
836 };
837 static const char * const blsp_spi2_cs1_groups[] = {
838 "gpio62"
839 };
840 static const char * const blsp_spi2_cs2_groups[] = {
841 "gpio63"
842 };
843 static const char * const gp_pdm2_groups[] = {
844 "gpio63", "gpio79"
845 };
846 static const char * const pri_mi2s_groups[] = {
847 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
848 };
849 static const char * const blsp_spi2_cs3_groups[] = {
850 "gpio66"
851 };
852 static const char * const spkr_i2s_groups[] = {
853 "gpio69", "gpio70", "gpio71", "gpio72"
854 };
855 static const char * const audio_ref_clk_groups[] = {
856 "gpio69"
857 };
858 static const char * const slimbus_groups[] = {
859 "gpio70", "gpio71"
860 };
861 static const char * const ter_mi2s_groups[] = {
862 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
863 };
864 static const char * const gp_pdm1_groups[] = {
865 "gpio74", "gpio86"
866 };
867 static const char * const sec_mi2s_groups[] = {
868 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
869 };
870 static const char * const gcc_gp1_clk_b_groups[] = {
871 "gpio78"
872 };
873 static const char * const blsp_spi11_groups[] = {
874 "gpio81", "gpio82", "gpio83", "gpio84"
875 };
876 static const char * const blsp_uart11_groups[] = {
877 "gpio81", "gpio82", "gpio83", "gpio84"
878 };
879 static const char * const blsp_uim11_groups[] = {
880 "gpio81", "gpio82"
881 };
882 static const char * const gcc_gp2_clk_b_groups[] = {
883 "gpio81"
884 };
885 static const char * const gcc_gp3_clk_b_groups[] = {
886 "gpio82"
887 };
888 static const char * const blsp_i2c11_groups[] = {
889 "gpio83", "gpio84"
890 };
891 static const char * const blsp_uart12_groups[] = {
892 "gpio85", "gpio86", "gpio87", "gpio88"
893 };
894 static const char * const blsp_uim12_groups[] = {
895 "gpio85", "gpio86"
896 };
897 static const char * const blsp_i2c12_groups[] = {
898 "gpio87", "gpio88"
899 };
900 static const char * const blsp_spi12_groups[] = {
901 "gpio85", "gpio86", "gpio87", "gpio88"
902 };
903 static const char * const tsif1_groups[] = {
904 "gpio89", "gpio90", "gpio91", "gpio110", "gpio111"
905 };
906 static const char * const blsp_spi10_cs3_groups[] = {
907 "gpio90"
908 };
909 static const char * const sdc4_groups[] = {
910 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
911 };
912 static const char * const qdss_traceclk_b_groups[] = {
913 "gpio91",
914 };
915 static const char * const tsif2_groups[] = {
916 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
917 };
918 static const char * const qdss_tracectl_b_groups[] = {
919 "gpio94",
920 };
921 static const char * const qdss_cti_trig_out_d_groups[] = {
922 "gpio95",
923 };
924 static const char * const qdss_cti_trig_in_d_groups[] = {
925 "gpio96",
926 };
927 static const char * const uim1_groups[] = {
928 "gpio97", "gpio98", "gpio99", "gpio100"
929 };
930 static const char * const uim_batt_alarm_groups[] = {
931 "gpio101"
932 };
933 static const char * const blsp11_uart_tx_b_groups[] = {
934 "gpio111"
935 };
936 static const char * const blsp11_uart_rx_b_groups[] = {
937 "gpio112"
938 };
939 static const char * const blsp11_i2c_sda_b_groups[] = {
940 "gpio113"
941 };
942 static const char * const blsp11_i2c_scl_b_groups[] = {
943 "gpio114"
944 };
945 static const char * const gsm_tx_groups[] = {
946 "gpio126", "gpio131", "gpio132", "gpio133"
947 };
948 static const char * const nav_tsync_groups[] = {
949 "gpio127"
950 };
951 static const char * const nav_pps_groups[] = {
952 "gpio127"
953 };
954 static const char * const gps_tx_groups[] = {
955 "gpio130"
956 };
957 static const char * const mss_lte_groups[] = {
958 "gpio134", "gpio135"
959 };
960
961 static const struct msm_function msm8994_functions[] = {
962 FUNCTION(audio_ref_clk),
963 FUNCTION(blsp_i2c1),
964 FUNCTION(blsp_i2c2),
965 FUNCTION(blsp_i2c3),
966 FUNCTION(blsp_i2c4),
967 FUNCTION(blsp_i2c5),
968 FUNCTION(blsp_i2c6),
969 FUNCTION(blsp_i2c7),
970 FUNCTION(blsp_i2c8),
971 FUNCTION(blsp_i2c9),
972 FUNCTION(blsp_i2c10),
973 FUNCTION(blsp_i2c11),
974 FUNCTION(blsp_i2c12),
975 FUNCTION(blsp_spi1),
976 FUNCTION(blsp_spi1_cs1),
977 FUNCTION(blsp_spi1_cs2),
978 FUNCTION(blsp_spi1_cs3),
979 FUNCTION(blsp_spi2),
980 FUNCTION(blsp_spi2_cs1),
981 FUNCTION(blsp_spi2_cs2),
982 FUNCTION(blsp_spi2_cs3),
983 FUNCTION(blsp_spi3),
984 FUNCTION(blsp_spi4),
985 FUNCTION(blsp_spi5),
986 FUNCTION(blsp_spi6),
987 FUNCTION(blsp_spi7),
988 FUNCTION(blsp_spi8),
989 FUNCTION(blsp_spi9),
990 FUNCTION(blsp_spi10),
991 FUNCTION(blsp_spi10_cs1),
992 FUNCTION(blsp_spi10_cs2),
993 FUNCTION(blsp_spi10_cs3),
994 FUNCTION(blsp_spi11),
995 FUNCTION(blsp_spi12),
996 FUNCTION(blsp_uart1),
997 FUNCTION(blsp_uart2),
998 FUNCTION(blsp_uart3),
999 FUNCTION(blsp_uart4),
1000 FUNCTION(blsp_uart5),
1001 FUNCTION(blsp_uart6),
1002 FUNCTION(blsp_uart7),
1003 FUNCTION(blsp_uart8),
1004 FUNCTION(blsp_uart9),
1005 FUNCTION(blsp_uart10),
1006 FUNCTION(blsp_uart11),
1007 FUNCTION(blsp_uart12),
1008 FUNCTION(blsp_uim1),
1009 FUNCTION(blsp_uim2),
1010 FUNCTION(blsp_uim3),
1011 FUNCTION(blsp_uim4),
1012 FUNCTION(blsp_uim5),
1013 FUNCTION(blsp_uim6),
1014 FUNCTION(blsp_uim7),
1015 FUNCTION(blsp_uim8),
1016 FUNCTION(blsp_uim9),
1017 FUNCTION(blsp_uim10),
1018 FUNCTION(blsp_uim11),
1019 FUNCTION(blsp_uim12),
1020 FUNCTION(blsp11_i2c_scl_b),
1021 FUNCTION(blsp11_i2c_sda_b),
1022 FUNCTION(blsp11_uart_rx_b),
1023 FUNCTION(blsp11_uart_tx_b),
1024 FUNCTION(cam_mclk0),
1025 FUNCTION(cam_mclk1),
1026 FUNCTION(cam_mclk2),
1027 FUNCTION(cam_mclk3),
1028 FUNCTION(cci_async_in0),
1029 FUNCTION(cci_async_in1),
1030 FUNCTION(cci_async_in2),
1031 FUNCTION(cci_i2c0),
1032 FUNCTION(cci_i2c1),
1033 FUNCTION(cci_timer0),
1034 FUNCTION(cci_timer1),
1035 FUNCTION(cci_timer2),
1036 FUNCTION(cci_timer3),
1037 FUNCTION(cci_timer4),
1038 FUNCTION(gcc_gp1_clk_a),
1039 FUNCTION(gcc_gp1_clk_b),
1040 FUNCTION(gcc_gp2_clk_a),
1041 FUNCTION(gcc_gp2_clk_b),
1042 FUNCTION(gcc_gp3_clk_a),
1043 FUNCTION(gcc_gp3_clk_b),
1044 FUNCTION(gp_mn),
1045 FUNCTION(gp_pdm0),
1046 FUNCTION(gp_pdm1),
1047 FUNCTION(gp_pdm2),
1048 FUNCTION(gp0_clk),
1049 FUNCTION(gp1_clk),
1050 FUNCTION(gps_tx),
1051 FUNCTION(gsm_tx),
1052 FUNCTION(hdmi_cec),
1053 FUNCTION(hdmi_ddc),
1054 FUNCTION(hdmi_hpd),
1055 FUNCTION(hdmi_rcv),
1056 FUNCTION(mdp_vsync),
1057 FUNCTION(mss_lte),
1058 FUNCTION(nav_pps),
1059 FUNCTION(nav_tsync),
1060 FUNCTION(qdss_cti_trig_in_a),
1061 FUNCTION(qdss_cti_trig_in_b),
1062 FUNCTION(qdss_cti_trig_in_c),
1063 FUNCTION(qdss_cti_trig_in_d),
1064 FUNCTION(qdss_cti_trig_out_a),
1065 FUNCTION(qdss_cti_trig_out_b),
1066 FUNCTION(qdss_cti_trig_out_c),
1067 FUNCTION(qdss_cti_trig_out_d),
1068 FUNCTION(qdss_traceclk_a),
1069 FUNCTION(qdss_traceclk_b),
1070 FUNCTION(qdss_tracectl_a),
1071 FUNCTION(qdss_tracectl_b),
1072 FUNCTION(qdss_tracedata_a),
1073 FUNCTION(qdss_tracedata_b),
1074 FUNCTION(qua_mi2s),
1075 FUNCTION(pci_e0),
1076 FUNCTION(pci_e1),
1077 FUNCTION(pri_mi2s),
1078 FUNCTION(sdc4),
1079 FUNCTION(sec_mi2s),
1080 FUNCTION(slimbus),
1081 FUNCTION(spkr_i2s),
1082 FUNCTION(ter_mi2s),
1083 FUNCTION(tsif1),
1084 FUNCTION(tsif2),
1085 FUNCTION(uim_batt_alarm),
1086 FUNCTION(uim1),
1087 FUNCTION(uim2),
1088 FUNCTION(uim3),
1089 FUNCTION(uim4),
1090 FUNCTION(gpio),
1091 };
1092
1093 static const struct msm_pingroup msm8994_groups[] = {
1094 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, hdmi_rcv, NA, NA, NA,
1095 NA, NA, NA, NA),
1096 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA,
1097 NA, NA),
1098 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1099 NA, NA),
1100 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1101 NA, NA),
1102 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_out_b,
1103 NA, NA, NA, NA, NA, NA),
1104 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_in_b,
1105 NA, NA, NA, NA, NA, NA),
1106 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1107 NA, NA),
1108 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1109 NA, NA),
1110 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA,
1111 NA, NA, NA, NA, NA),
1112 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA,
1113 NA, NA, NA, NA, NA),
1114 PINGROUP(10, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1115 blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1116 PINGROUP(11, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1117 blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1118 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1119 PINGROUP(13, cam_mclk0, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1120 NA, NA),
1121 PINGROUP(14, cam_mclk1, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1122 NA, NA),
1123 PINGROUP(15, cam_mclk2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1124 NA, NA),
1125 PINGROUP(16, cam_mclk3, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1126 NA, NA),
1127 PINGROUP(17, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1128 qdss_tracedata_b, NA, NA, NA, NA, NA),
1129 PINGROUP(18, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1130 qdss_tracedata_b, NA, NA, NA, NA, NA),
1131 PINGROUP(19, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA,
1132 qdss_tracedata_b, NA, NA, NA, NA, NA),
1133 PINGROUP(20, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
1134 NA, NA, NA, NA),
1135 PINGROUP(21, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1136 qdss_tracedata_b, NA, NA, NA, NA, NA),
1137 PINGROUP(22, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1138 qdss_tracedata_b, NA, NA, NA, NA, NA),
1139 PINGROUP(23, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA,
1140 qdss_tracedata_b, NA, NA, NA, NA),
1141 PINGROUP(24, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5,
1142 blsp_i2c5, NA, NA, NA, NA, NA, NA),
1143 PINGROUP(25, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6,
1144 blsp_uim6, NA, NA, qdss_tracedata_b, NA, NA, NA),
1145 PINGROUP(26, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, gp0_clk,
1146 NA, qdss_tracedata_b, NA, NA, NA, NA),
1147 PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk,
1148 qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
1149 PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, qdss_traceclk_a, NA,
1150 NA, NA, NA, NA, NA, NA),
1151 PINGROUP(29, gp_mn, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1152 PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1153 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1154 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1155 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1156 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1157 PINGROUP(35, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1158 PINGROUP(36, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1159 PINGROUP(37, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1160 PINGROUP(38, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1161 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1162 PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1163 PINGROUP(41, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_out_c,
1164 NA, NA, NA, NA, NA, NA, NA),
1165 PINGROUP(42, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_in_c, NA,
1166 NA, NA, NA, NA, NA, NA),
1167 PINGROUP(43, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1168 NA, NA),
1169 PINGROUP(44, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1170 NA, NA),
1171 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1172 NA, NA),
1173 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1174 NA, NA),
1175 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA,
1176 NA, NA, NA, NA, NA),
1177 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA,
1178 NA, NA, NA, NA, NA),
1179 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1180 NA, NA, NA),
1181 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1182 NA, NA, NA),
1183 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1184 NA, NA, NA),
1185 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1186 NA, NA, NA),
1187 PINGROUP(53, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10, NA,
1188 NA, qdss_tracedata_a, NA, NA, NA),
1189 PINGROUP(54, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10,
1190 gp_pdm0, NA, NA, qdss_tracedata_a, NA, NA),
1191 PINGROUP(55, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA,
1192 qdss_cti_trig_in_a, NA, NA, NA),
1193 PINGROUP(56, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA,
1194 qdss_cti_trig_out_a, NA, NA, NA, NA),
1195 PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1196 NA, NA, NA, NA),
1197 PINGROUP(58, qua_mi2s, gcc_gp2_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1198 NA, NA, NA, NA),
1199 PINGROUP(59, qua_mi2s, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA, NA,
1200 NA),
1201 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1202 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1203 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA, NA, NA, NA,
1204 NA),
1205 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA, NA,
1206 qdss_tracedata_a, NA, NA),
1207 PINGROUP(64, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1208 NA, NA),
1209 PINGROUP(65, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1210 NA, NA),
1211 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, qdss_tracedata_a,
1212 NA, NA, NA, NA, NA),
1213 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, qdss_tracedata_a,
1214 NA, NA, NA, NA, NA),
1215 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA, NA, NA,
1216 NA),
1217 PINGROUP(69, spkr_i2s, audio_ref_clk, NA, NA, NA, NA, NA, NA, NA, NA,
1218 NA),
1219 PINGROUP(70, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1220 PINGROUP(71, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1221 PINGROUP(72, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1222 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1223 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, qdss_tracedata_a, NA, NA,
1224 NA, NA, NA),
1225 PINGROUP(75, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1226 NA, NA),
1227 PINGROUP(76, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1228 NA, NA),
1229 PINGROUP(77, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1230 NA, NA),
1231 PINGROUP(78, sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA,
1232 NA),
1233 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1234 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1235 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1236 gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
1237 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1238 gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
1239 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1240 NA, NA, NA),
1241 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1242 NA, NA, NA),
1243 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA,
1244 qdss_tracedata_a, NA, NA, NA, NA, NA),
1245 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA,
1246 qdss_tracedata_a, NA, NA, NA, NA, NA),
1247 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA,
1248 qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
1249 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA, NA,
1250 NA, NA, NA),
1251 PINGROUP(89, tsif1, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA,
1252 NA),
1253 PINGROUP(90, tsif1, blsp_spi10_cs3, qdss_tracedata_a, NA, NA, NA, NA,
1254 NA, NA, NA, NA),
1255 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, qdss_traceclk_b, NA, NA, NA,
1256 NA),
1257 PINGROUP(92, tsif2, sdc4, NA, NA, qdss_tracedata_b, NA, NA, NA, NA,
1258 NA, NA),
1259 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, qdss_tracedata_b, NA, NA,
1260 NA, NA),
1261 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, qdss_tracectl_b, NA, NA, NA,
1262 NA),
1263 PINGROUP(95, tsif2, sdc4, gp_pdm0, NA, NA, NA, qdss_cti_trig_out_d,
1264 NA, NA, NA, NA),
1265 PINGROUP(96, tsif2, sdc4, qdss_cti_trig_in_d, NA, NA, NA, NA, NA, NA,
1266 NA, NA),
1267 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1268 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1269 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1270 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1271 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1272 PINGROUP(102, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1273 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1274 PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1275 PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1276 PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1277 PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1278 PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1279 PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1280 PINGROUP(110, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1281 PINGROUP(111, tsif1, blsp11_uart_tx_b, NA, NA, NA, NA, NA, NA, NA, NA,
1282 NA),
1283 PINGROUP(112, blsp11_uart_rx_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1284 NA),
1285 PINGROUP(113, blsp11_i2c_sda_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1286 NA),
1287 PINGROUP(114, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1288 NA),
1289 PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1290 PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1291 PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1292 PINGROUP(118, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1293 PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1294 PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1295 PINGROUP(121, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1296 PINGROUP(122, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1297 PINGROUP(123, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1298 PINGROUP(124, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1299 PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1300 PINGROUP(126, NA, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1301 PINGROUP(127, NA, nav_tsync, nav_pps, NA, NA, NA, NA, NA, NA, NA,
1302 NA),
1303 PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1304 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1305 PINGROUP(130, gps_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1306 PINGROUP(131, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1307 PINGROUP(132, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1308 PINGROUP(133, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1309 PINGROUP(134, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1310 PINGROUP(135, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1311 PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1312 PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1313 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1314 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1315 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1316 PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1317 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1318 PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1319 PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1320 PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1321 SDC_PINGROUP(sdc1_rclk, 0x2044, 15, 0),
1322 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1323 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1324 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1325 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1326 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1327 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1328 SDC_PINGROUP(sdc3_clk, 0x206c, 14, 6),
1329 SDC_PINGROUP(sdc3_cmd, 0x206c, 11, 3),
1330 SDC_PINGROUP(sdc3_data, 0x206c, 9, 0),
1331 };
1332
1333 #define NUM_GPIO_PINGROUPS 146
1334
1335 static const struct msm_pinctrl_soc_data msm8994_pinctrl = {
1336 .pins = msm8994_pins,
1337 .npins = ARRAY_SIZE(msm8994_pins),
1338 .functions = msm8994_functions,
1339 .nfunctions = ARRAY_SIZE(msm8994_functions),
1340 .groups = msm8994_groups,
1341 .ngroups = ARRAY_SIZE(msm8994_groups),
1342 .ngpios = NUM_GPIO_PINGROUPS,
1343 };
1344
1345 static int msm8994_pinctrl_probe(struct platform_device *pdev)
1346 {
1347 return msm_pinctrl_probe(pdev, &msm8994_pinctrl);
1348 }
1349
1350 static const struct of_device_id msm8994_pinctrl_of_match[] = {
1351 { .compatible = "qcom,msm8992-pinctrl", },
1352 { .compatible = "qcom,msm8994-pinctrl", },
1353 { }
1354 };
1355
1356 static struct platform_driver msm8994_pinctrl_driver = {
1357 .driver = {
1358 .name = "msm8994-pinctrl",
1359 .of_match_table = msm8994_pinctrl_of_match,
1360 },
1361 .probe = msm8994_pinctrl_probe,
1362 .remove = msm_pinctrl_remove,
1363 };
1364
1365 static int __init msm8994_pinctrl_init(void)
1366 {
1367 return platform_driver_register(&msm8994_pinctrl_driver);
1368 }
1369 arch_initcall(msm8994_pinctrl_init);
1370
1371 static void __exit msm8994_pinctrl_exit(void)
1372 {
1373 platform_driver_unregister(&msm8994_pinctrl_driver);
1374 }
1375 module_exit(msm8994_pinctrl_exit);
1376
1377 MODULE_DESCRIPTION("Qualcomm MSM8994 pinctrl driver");
1378 MODULE_LICENSE("GPL v2");
1379 MODULE_DEVICE_TABLE(of, msm8994_pinctrl_of_match);
Linux with added FPC-III support