2 * Copyright (c) 2015, Sony Mobile Communications AB.
3 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/soc/qcom/smd-rpm.h>
25 struct qcom_smd_rpm
*rpm
;
30 struct regulator_desc desc
;
36 unsigned int enabled_updated
:1;
37 unsigned int uv_updated
:1;
38 unsigned int load_updated
:1;
41 struct rpm_regulator_req
{
47 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
48 #define RPM_KEY_UV 0x00007675 /* "uv" */
49 #define RPM_KEY_MA 0x0000616d /* "ma" */
51 static int rpm_reg_write_active(struct qcom_rpm_reg
*vreg
)
53 struct rpm_regulator_req req
[3];
57 if (vreg
->enabled_updated
) {
58 req
[reqlen
].key
= cpu_to_le32(RPM_KEY_SWEN
);
59 req
[reqlen
].nbytes
= cpu_to_le32(sizeof(u32
));
60 req
[reqlen
].value
= cpu_to_le32(vreg
->is_enabled
);
64 if (vreg
->uv_updated
&& vreg
->is_enabled
) {
65 req
[reqlen
].key
= cpu_to_le32(RPM_KEY_UV
);
66 req
[reqlen
].nbytes
= cpu_to_le32(sizeof(u32
));
67 req
[reqlen
].value
= cpu_to_le32(vreg
->uV
);
71 if (vreg
->load_updated
&& vreg
->is_enabled
) {
72 req
[reqlen
].key
= cpu_to_le32(RPM_KEY_MA
);
73 req
[reqlen
].nbytes
= cpu_to_le32(sizeof(u32
));
74 req
[reqlen
].value
= cpu_to_le32(vreg
->load
/ 1000);
81 ret
= qcom_rpm_smd_write(vreg
->rpm
, QCOM_SMD_RPM_ACTIVE_STATE
,
83 req
, sizeof(req
[0]) * reqlen
);
85 vreg
->enabled_updated
= 0;
87 vreg
->load_updated
= 0;
93 static int rpm_reg_enable(struct regulator_dev
*rdev
)
95 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
99 vreg
->enabled_updated
= 1;
101 ret
= rpm_reg_write_active(vreg
);
103 vreg
->is_enabled
= 0;
108 static int rpm_reg_is_enabled(struct regulator_dev
*rdev
)
110 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
112 return vreg
->is_enabled
;
115 static int rpm_reg_disable(struct regulator_dev
*rdev
)
117 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
120 vreg
->is_enabled
= 0;
121 vreg
->enabled_updated
= 1;
123 ret
= rpm_reg_write_active(vreg
);
125 vreg
->is_enabled
= 1;
130 static int rpm_reg_get_voltage(struct regulator_dev
*rdev
)
132 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
137 static int rpm_reg_set_voltage(struct regulator_dev
*rdev
,
142 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
144 int old_uV
= vreg
->uV
;
147 vreg
->uv_updated
= 1;
149 ret
= rpm_reg_write_active(vreg
);
156 static int rpm_reg_set_load(struct regulator_dev
*rdev
, int load_uA
)
158 struct qcom_rpm_reg
*vreg
= rdev_get_drvdata(rdev
);
159 u32 old_load
= vreg
->load
;
162 vreg
->load
= load_uA
;
163 vreg
->load_updated
= 1;
164 ret
= rpm_reg_write_active(vreg
);
166 vreg
->load
= old_load
;
171 static const struct regulator_ops rpm_smps_ldo_ops
= {
172 .enable
= rpm_reg_enable
,
173 .disable
= rpm_reg_disable
,
174 .is_enabled
= rpm_reg_is_enabled
,
175 .list_voltage
= regulator_list_voltage_linear_range
,
177 .get_voltage
= rpm_reg_get_voltage
,
178 .set_voltage
= rpm_reg_set_voltage
,
180 .set_load
= rpm_reg_set_load
,
183 static const struct regulator_ops rpm_smps_ldo_ops_fixed
= {
184 .enable
= rpm_reg_enable
,
185 .disable
= rpm_reg_disable
,
186 .is_enabled
= rpm_reg_is_enabled
,
188 .get_voltage
= rpm_reg_get_voltage
,
189 .set_voltage
= rpm_reg_set_voltage
,
191 .set_load
= rpm_reg_set_load
,
194 static const struct regulator_ops rpm_switch_ops
= {
195 .enable
= rpm_reg_enable
,
196 .disable
= rpm_reg_disable
,
197 .is_enabled
= rpm_reg_is_enabled
,
200 static const struct regulator_ops rpm_bob_ops
= {
201 .enable
= rpm_reg_enable
,
202 .disable
= rpm_reg_disable
,
203 .is_enabled
= rpm_reg_is_enabled
,
205 .get_voltage
= rpm_reg_get_voltage
,
206 .set_voltage
= rpm_reg_set_voltage
,
209 static const struct regulator_desc pma8084_hfsmps
= {
210 .linear_ranges
= (struct regulator_linear_range
[]) {
211 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
212 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
214 .n_linear_ranges
= 2,
216 .ops
= &rpm_smps_ldo_ops
,
219 static const struct regulator_desc pma8084_ftsmps
= {
220 .linear_ranges
= (struct regulator_linear_range
[]) {
221 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
222 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
224 .n_linear_ranges
= 2,
226 .ops
= &rpm_smps_ldo_ops
,
229 static const struct regulator_desc pma8084_pldo
= {
230 .linear_ranges
= (struct regulator_linear_range
[]) {
231 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
232 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
233 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
235 .n_linear_ranges
= 3,
237 .ops
= &rpm_smps_ldo_ops
,
240 static const struct regulator_desc pma8084_nldo
= {
241 .linear_ranges
= (struct regulator_linear_range
[]) {
242 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
244 .n_linear_ranges
= 1,
246 .ops
= &rpm_smps_ldo_ops
,
249 static const struct regulator_desc pma8084_switch
= {
250 .ops
= &rpm_switch_ops
,
253 static const struct regulator_desc pm8x41_hfsmps
= {
254 .linear_ranges
= (struct regulator_linear_range
[]) {
255 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
256 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
258 .n_linear_ranges
= 2,
260 .ops
= &rpm_smps_ldo_ops
,
263 static const struct regulator_desc pm8841_ftsmps
= {
264 .linear_ranges
= (struct regulator_linear_range
[]) {
265 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
266 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
268 .n_linear_ranges
= 2,
270 .ops
= &rpm_smps_ldo_ops
,
273 static const struct regulator_desc pm8941_boost
= {
274 .linear_ranges
= (struct regulator_linear_range
[]) {
275 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
277 .n_linear_ranges
= 1,
279 .ops
= &rpm_smps_ldo_ops
,
282 static const struct regulator_desc pm8941_pldo
= {
283 .linear_ranges
= (struct regulator_linear_range
[]) {
284 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
285 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
286 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
288 .n_linear_ranges
= 3,
290 .ops
= &rpm_smps_ldo_ops
,
293 static const struct regulator_desc pm8941_nldo
= {
294 .linear_ranges
= (struct regulator_linear_range
[]) {
295 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
297 .n_linear_ranges
= 1,
299 .ops
= &rpm_smps_ldo_ops
,
302 static const struct regulator_desc pm8941_lnldo
= {
305 .ops
= &rpm_smps_ldo_ops_fixed
,
308 static const struct regulator_desc pm8941_switch
= {
309 .ops
= &rpm_switch_ops
,
312 static const struct regulator_desc pm8916_pldo
= {
313 .linear_ranges
= (struct regulator_linear_range
[]) {
314 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
316 .n_linear_ranges
= 1,
318 .ops
= &rpm_smps_ldo_ops
,
321 static const struct regulator_desc pm8916_nldo
= {
322 .linear_ranges
= (struct regulator_linear_range
[]) {
323 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
325 .n_linear_ranges
= 1,
327 .ops
= &rpm_smps_ldo_ops
,
330 static const struct regulator_desc pm8916_buck_lvo_smps
= {
331 .linear_ranges
= (struct regulator_linear_range
[]) {
332 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
333 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
335 .n_linear_ranges
= 2,
337 .ops
= &rpm_smps_ldo_ops
,
340 static const struct regulator_desc pm8916_buck_hvo_smps
= {
341 .linear_ranges
= (struct regulator_linear_range
[]) {
342 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
344 .n_linear_ranges
= 1,
346 .ops
= &rpm_smps_ldo_ops
,
349 static const struct regulator_desc pm8994_hfsmps
= {
350 .linear_ranges
= (struct regulator_linear_range
[]) {
351 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
352 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
354 .n_linear_ranges
= 2,
356 .ops
= &rpm_smps_ldo_ops
,
359 static const struct regulator_desc pm8994_ftsmps
= {
360 .linear_ranges
= (struct regulator_linear_range
[]) {
361 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
362 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
364 .n_linear_ranges
= 2,
366 .ops
= &rpm_smps_ldo_ops
,
369 static const struct regulator_desc pm8994_nldo
= {
370 .linear_ranges
= (struct regulator_linear_range
[]) {
371 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
373 .n_linear_ranges
= 1,
375 .ops
= &rpm_smps_ldo_ops
,
378 static const struct regulator_desc pm8994_pldo
= {
379 .linear_ranges
= (struct regulator_linear_range
[]) {
380 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
381 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
382 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
384 .n_linear_ranges
= 3,
386 .ops
= &rpm_smps_ldo_ops
,
389 static const struct regulator_desc pm8994_switch
= {
390 .ops
= &rpm_switch_ops
,
393 static const struct regulator_desc pm8994_lnldo
= {
396 .ops
= &rpm_smps_ldo_ops_fixed
,
399 static const struct regulator_desc pm8998_ftsmps
= {
400 .linear_ranges
= (struct regulator_linear_range
[]) {
401 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
403 .n_linear_ranges
= 1,
405 .ops
= &rpm_smps_ldo_ops
,
408 static const struct regulator_desc pm8998_hfsmps
= {
409 .linear_ranges
= (struct regulator_linear_range
[]) {
410 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
412 .n_linear_ranges
= 1,
414 .ops
= &rpm_smps_ldo_ops
,
417 static const struct regulator_desc pm8998_nldo
= {
418 .linear_ranges
= (struct regulator_linear_range
[]) {
419 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
421 .n_linear_ranges
= 1,
423 .ops
= &rpm_smps_ldo_ops
,
426 static const struct regulator_desc pm8998_pldo
= {
427 .linear_ranges
= (struct regulator_linear_range
[]) {
428 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
430 .n_linear_ranges
= 1,
432 .ops
= &rpm_smps_ldo_ops
,
435 static const struct regulator_desc pm8998_pldo_lv
= {
436 .linear_ranges
= (struct regulator_linear_range
[]) {
437 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
439 .n_linear_ranges
= 1,
441 .ops
= &rpm_smps_ldo_ops
,
444 static const struct regulator_desc pm8998_switch
= {
445 .ops
= &rpm_switch_ops
,
448 static const struct regulator_desc pmi8998_bob
= {
449 .linear_ranges
= (struct regulator_linear_range
[]) {
450 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
452 .n_linear_ranges
= 1,
457 static const struct regulator_desc pms405_hfsmps3
= {
458 .linear_ranges
= (struct regulator_linear_range
[]) {
459 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
461 .n_linear_ranges
= 1,
463 .ops
= &rpm_smps_ldo_ops
,
466 static const struct regulator_desc pms405_nldo300
= {
467 .linear_ranges
= (struct regulator_linear_range
[]) {
468 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
470 .n_linear_ranges
= 1,
472 .ops
= &rpm_smps_ldo_ops
,
475 static const struct regulator_desc pms405_nldo1200
= {
476 .linear_ranges
= (struct regulator_linear_range
[]) {
477 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
479 .n_linear_ranges
= 1,
481 .ops
= &rpm_smps_ldo_ops
,
484 static const struct regulator_desc pms405_pldo50
= {
485 .linear_ranges
= (struct regulator_linear_range
[]) {
486 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
488 .n_linear_ranges
= 1,
490 .ops
= &rpm_smps_ldo_ops
,
493 static const struct regulator_desc pms405_pldo150
= {
494 .linear_ranges
= (struct regulator_linear_range
[]) {
495 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
497 .n_linear_ranges
= 1,
499 .ops
= &rpm_smps_ldo_ops
,
502 static const struct regulator_desc pms405_pldo600
= {
503 .linear_ranges
= (struct regulator_linear_range
[]) {
504 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
506 .n_linear_ranges
= 1,
508 .ops
= &rpm_smps_ldo_ops
,
511 struct rpm_regulator_data
{
515 const struct regulator_desc
*desc
;
519 static const struct rpm_regulator_data rpm_pm8841_regulators
[] = {
520 { "s1", QCOM_SMD_RPM_SMPB
, 1, &pm8x41_hfsmps
, "vdd_s1" },
521 { "s2", QCOM_SMD_RPM_SMPB
, 2, &pm8841_ftsmps
, "vdd_s2" },
522 { "s3", QCOM_SMD_RPM_SMPB
, 3, &pm8x41_hfsmps
, "vdd_s3" },
523 { "s4", QCOM_SMD_RPM_SMPB
, 4, &pm8841_ftsmps
, "vdd_s4" },
524 { "s5", QCOM_SMD_RPM_SMPB
, 5, &pm8841_ftsmps
, "vdd_s5" },
525 { "s6", QCOM_SMD_RPM_SMPB
, 6, &pm8841_ftsmps
, "vdd_s6" },
526 { "s7", QCOM_SMD_RPM_SMPB
, 7, &pm8841_ftsmps
, "vdd_s7" },
527 { "s8", QCOM_SMD_RPM_SMPB
, 8, &pm8841_ftsmps
, "vdd_s8" },
531 static const struct rpm_regulator_data rpm_pm8916_regulators
[] = {
532 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pm8916_buck_lvo_smps
, "vdd_s1" },
533 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pm8916_buck_lvo_smps
, "vdd_s2" },
534 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pm8916_buck_lvo_smps
, "vdd_s3" },
535 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pm8916_buck_hvo_smps
, "vdd_s4" },
536 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pm8916_nldo
, "vdd_l1_l2_l3" },
537 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pm8916_nldo
, "vdd_l1_l2_l3" },
538 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pm8916_nldo
, "vdd_l1_l2_l3" },
539 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pm8916_pldo
, "vdd_l4_l5_l6" },
540 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pm8916_pldo
, "vdd_l4_l5_l6" },
541 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pm8916_pldo
, "vdd_l4_l5_l6" },
542 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pm8916_pldo
, "vdd_l7" },
543 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
544 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
545 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
546 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
547 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
548 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
549 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
550 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
551 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
552 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
553 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pm8916_pldo
, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
557 static const struct rpm_regulator_data rpm_pm8941_regulators
[] = {
558 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pm8x41_hfsmps
, "vdd_s1" },
559 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pm8x41_hfsmps
, "vdd_s2" },
560 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pm8x41_hfsmps
, "vdd_s3" },
561 { "s4", QCOM_SMD_RPM_BOOST
, 1, &pm8941_boost
},
563 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pm8941_nldo
, "vdd_l1_l3" },
564 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pm8941_nldo
, "vdd_l2_lvs1_2_3" },
565 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pm8941_nldo
, "vdd_l1_l3" },
566 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pm8941_nldo
, "vdd_l4_l11" },
567 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pm8941_lnldo
, "vdd_l5_l7" },
568 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
569 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pm8941_lnldo
, "vdd_l5_l7" },
570 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
571 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
572 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
573 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pm8941_nldo
, "vdd_l4_l11" },
574 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
575 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
576 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
577 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pm8941_pldo
, "vdd_l6_l12_l14_l15" },
578 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
579 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
580 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
581 { "l19", QCOM_SMD_RPM_LDOA
, 19, &pm8941_pldo
, "vdd_l8_l16_l18_l19" },
582 { "l20", QCOM_SMD_RPM_LDOA
, 20, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
583 { "l21", QCOM_SMD_RPM_LDOA
, 21, &pm8941_pldo
, "vdd_l21" },
584 { "l22", QCOM_SMD_RPM_LDOA
, 22, &pm8941_pldo
, "vdd_l9_l10_l17_l22" },
585 { "l23", QCOM_SMD_RPM_LDOA
, 23, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
586 { "l24", QCOM_SMD_RPM_LDOA
, 24, &pm8941_pldo
, "vdd_l13_l20_l23_l24" },
588 { "lvs1", QCOM_SMD_RPM_VSA
, 1, &pm8941_switch
, "vdd_l2_lvs1_2_3" },
589 { "lvs2", QCOM_SMD_RPM_VSA
, 2, &pm8941_switch
, "vdd_l2_lvs1_2_3" },
590 { "lvs3", QCOM_SMD_RPM_VSA
, 3, &pm8941_switch
, "vdd_l2_lvs1_2_3" },
592 { "5vs1", QCOM_SMD_RPM_VSA
, 4, &pm8941_switch
, "vin_5vs" },
593 { "5vs2", QCOM_SMD_RPM_VSA
, 5, &pm8941_switch
, "vin_5vs" },
598 static const struct rpm_regulator_data rpm_pma8084_regulators
[] = {
599 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pma8084_ftsmps
, "vdd_s1" },
600 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pma8084_ftsmps
, "vdd_s2" },
601 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pma8084_hfsmps
, "vdd_s3" },
602 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pma8084_hfsmps
, "vdd_s4" },
603 { "s5", QCOM_SMD_RPM_SMPA
, 5, &pma8084_hfsmps
, "vdd_s5" },
604 { "s6", QCOM_SMD_RPM_SMPA
, 6, &pma8084_ftsmps
, "vdd_s6" },
605 { "s7", QCOM_SMD_RPM_SMPA
, 7, &pma8084_ftsmps
, "vdd_s7" },
606 { "s8", QCOM_SMD_RPM_SMPA
, 8, &pma8084_ftsmps
, "vdd_s8" },
607 { "s9", QCOM_SMD_RPM_SMPA
, 9, &pma8084_ftsmps
, "vdd_s9" },
608 { "s10", QCOM_SMD_RPM_SMPA
, 10, &pma8084_ftsmps
, "vdd_s10" },
609 { "s11", QCOM_SMD_RPM_SMPA
, 11, &pma8084_ftsmps
, "vdd_s11" },
610 { "s12", QCOM_SMD_RPM_SMPA
, 12, &pma8084_ftsmps
, "vdd_s12" },
612 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pma8084_nldo
, "vdd_l1_l11" },
613 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
614 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
615 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
616 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pma8084_pldo
, "vdd_l5_l7" },
617 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
618 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pma8084_pldo
, "vdd_l5_l7" },
619 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pma8084_pldo
, "vdd_l8" },
620 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
621 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
622 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pma8084_nldo
, "vdd_l1_l11" },
623 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
624 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
625 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
626 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
627 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pma8084_pldo
, "vdd_l16_l25" },
628 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pma8084_pldo
, "vdd_l17" },
629 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pma8084_pldo
, "vdd_l18" },
630 { "l19", QCOM_SMD_RPM_LDOA
, 19, &pma8084_pldo
, "vdd_l19" },
631 { "l20", QCOM_SMD_RPM_LDOA
, 20, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
632 { "l21", QCOM_SMD_RPM_LDOA
, 21, &pma8084_pldo
, "vdd_l21" },
633 { "l22", QCOM_SMD_RPM_LDOA
, 22, &pma8084_pldo
, "vdd_l22" },
634 { "l23", QCOM_SMD_RPM_LDOA
, 23, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
635 { "l24", QCOM_SMD_RPM_LDOA
, 24, &pma8084_pldo
, "vdd_l9_l10_l13_l20_l23_l24" },
636 { "l25", QCOM_SMD_RPM_LDOA
, 25, &pma8084_pldo
, "vdd_l16_l25" },
637 { "l26", QCOM_SMD_RPM_LDOA
, 26, &pma8084_pldo
, "vdd_l6_l12_l14_l15_l26" },
638 { "l27", QCOM_SMD_RPM_LDOA
, 27, &pma8084_nldo
, "vdd_l2_l3_l4_l27" },
640 { "lvs1", QCOM_SMD_RPM_VSA
, 1, &pma8084_switch
},
641 { "lvs2", QCOM_SMD_RPM_VSA
, 2, &pma8084_switch
},
642 { "lvs3", QCOM_SMD_RPM_VSA
, 3, &pma8084_switch
},
643 { "lvs4", QCOM_SMD_RPM_VSA
, 4, &pma8084_switch
},
644 { "5vs1", QCOM_SMD_RPM_VSA
, 5, &pma8084_switch
},
649 static const struct rpm_regulator_data rpm_pm8994_regulators
[] = {
650 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pm8994_ftsmps
, "vdd_s1" },
651 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pm8994_ftsmps
, "vdd_s2" },
652 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pm8994_hfsmps
, "vdd_s3" },
653 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pm8994_hfsmps
, "vdd_s4" },
654 { "s5", QCOM_SMD_RPM_SMPA
, 5, &pm8994_hfsmps
, "vdd_s5" },
655 { "s6", QCOM_SMD_RPM_SMPA
, 6, &pm8994_ftsmps
, "vdd_s6" },
656 { "s7", QCOM_SMD_RPM_SMPA
, 7, &pm8994_hfsmps
, "vdd_s7" },
657 { "s8", QCOM_SMD_RPM_SMPA
, 8, &pm8994_ftsmps
, "vdd_s8" },
658 { "s9", QCOM_SMD_RPM_SMPA
, 9, &pm8994_ftsmps
, "vdd_s9" },
659 { "s10", QCOM_SMD_RPM_SMPA
, 10, &pm8994_ftsmps
, "vdd_s10" },
660 { "s11", QCOM_SMD_RPM_SMPA
, 11, &pm8994_ftsmps
, "vdd_s11" },
661 { "s12", QCOM_SMD_RPM_SMPA
, 12, &pm8994_ftsmps
, "vdd_s12" },
662 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pm8994_nldo
, "vdd_l1" },
663 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pm8994_nldo
, "vdd_l2_l26_l28" },
664 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pm8994_nldo
, "vdd_l3_l11" },
665 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pm8994_nldo
, "vdd_l4_l27_l31" },
666 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pm8994_lnldo
, "vdd_l5_l7" },
667 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pm8994_pldo
, "vdd_l6_l12_l32" },
668 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pm8994_lnldo
, "vdd_l5_l7" },
669 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pm8994_pldo
, "vdd_l8_l16_l30" },
670 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pm8994_pldo
, "vdd_l9_l10_l18_l22" },
671 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pm8994_pldo
, "vdd_l9_l10_l18_l22" },
672 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pm8994_nldo
, "vdd_l3_l11" },
673 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pm8994_pldo
, "vdd_l6_l12_l32" },
674 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pm8994_pldo
, "vdd_l13_l19_l23_l24" },
675 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pm8994_pldo
, "vdd_l14_l15" },
676 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pm8994_pldo
, "vdd_l14_l15" },
677 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pm8994_pldo
, "vdd_l8_l16_l30" },
678 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pm8994_pldo
, "vdd_l17_l29" },
679 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pm8994_pldo
, "vdd_l9_l10_l18_l22" },
680 { "l19", QCOM_SMD_RPM_LDOA
, 19, &pm8994_pldo
, "vdd_l13_l19_l23_l24" },
681 { "l20", QCOM_SMD_RPM_LDOA
, 20, &pm8994_pldo
, "vdd_l20_l21" },
682 { "l21", QCOM_SMD_RPM_LDOA
, 21, &pm8994_pldo
, "vdd_l20_l21" },
683 { "l22", QCOM_SMD_RPM_LDOA
, 22, &pm8994_pldo
, "vdd_l9_l10_l18_l22" },
684 { "l23", QCOM_SMD_RPM_LDOA
, 23, &pm8994_pldo
, "vdd_l13_l19_l23_l24" },
685 { "l24", QCOM_SMD_RPM_LDOA
, 24, &pm8994_pldo
, "vdd_l13_l19_l23_l24" },
686 { "l25", QCOM_SMD_RPM_LDOA
, 25, &pm8994_pldo
, "vdd_l25" },
687 { "l26", QCOM_SMD_RPM_LDOA
, 26, &pm8994_nldo
, "vdd_l2_l26_l28" },
688 { "l27", QCOM_SMD_RPM_LDOA
, 27, &pm8994_nldo
, "vdd_l4_l27_l31" },
689 { "l28", QCOM_SMD_RPM_LDOA
, 28, &pm8994_nldo
, "vdd_l2_l26_l28" },
690 { "l29", QCOM_SMD_RPM_LDOA
, 29, &pm8994_pldo
, "vdd_l17_l29" },
691 { "l30", QCOM_SMD_RPM_LDOA
, 30, &pm8994_pldo
, "vdd_l8_l16_l30" },
692 { "l31", QCOM_SMD_RPM_LDOA
, 31, &pm8994_nldo
, "vdd_l4_l27_l31" },
693 { "l32", QCOM_SMD_RPM_LDOA
, 32, &pm8994_pldo
, "vdd_l6_l12_l32" },
694 { "lvs1", QCOM_SMD_RPM_VSA
, 1, &pm8994_switch
, "vdd_lvs1_2" },
695 { "lvs2", QCOM_SMD_RPM_VSA
, 2, &pm8994_switch
, "vdd_lvs1_2" },
700 static const struct rpm_regulator_data rpm_pm8998_regulators
[] = {
701 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pm8998_ftsmps
, "vdd_s1" },
702 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pm8998_ftsmps
, "vdd_s2" },
703 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pm8998_hfsmps
, "vdd_s3" },
704 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pm8998_hfsmps
, "vdd_s4" },
705 { "s5", QCOM_SMD_RPM_SMPA
, 5, &pm8998_hfsmps
, "vdd_s5" },
706 { "s6", QCOM_SMD_RPM_SMPA
, 6, &pm8998_ftsmps
, "vdd_s6" },
707 { "s7", QCOM_SMD_RPM_SMPA
, 7, &pm8998_ftsmps
, "vdd_s7" },
708 { "s8", QCOM_SMD_RPM_SMPA
, 8, &pm8998_ftsmps
, "vdd_s8" },
709 { "s9", QCOM_SMD_RPM_SMPA
, 9, &pm8998_ftsmps
, "vdd_s9" },
710 { "s10", QCOM_SMD_RPM_SMPA
, 10, &pm8998_ftsmps
, "vdd_s10" },
711 { "s11", QCOM_SMD_RPM_SMPA
, 11, &pm8998_ftsmps
, "vdd_s11" },
712 { "s12", QCOM_SMD_RPM_SMPA
, 12, &pm8998_ftsmps
, "vdd_s12" },
713 { "s13", QCOM_SMD_RPM_SMPA
, 13, &pm8998_ftsmps
, "vdd_s13" },
714 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pm8998_nldo
, "vdd_l1_l27" },
715 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pm8998_nldo
, "vdd_l2_l8_l17" },
716 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pm8998_nldo
, "vdd_l3_l11" },
717 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pm8998_nldo
, "vdd_l4_l5" },
718 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pm8998_nldo
, "vdd_l4_l5" },
719 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pm8998_pldo
, "vdd_l6" },
720 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pm8998_pldo_lv
, "vdd_l7_l12_l14_l15" },
721 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pm8998_nldo
, "vdd_l2_l8_l17" },
722 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pm8998_pldo
, "vdd_l9" },
723 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pm8998_pldo
, "vdd_l10_l23_l25" },
724 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pm8998_nldo
, "vdd_l3_l11" },
725 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pm8998_pldo_lv
, "vdd_l7_l12_l14_l15" },
726 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pm8998_pldo
, "vdd_l13_l19_l21" },
727 { "l14", QCOM_SMD_RPM_LDOA
, 14, &pm8998_pldo_lv
, "vdd_l7_l12_l14_l15" },
728 { "l15", QCOM_SMD_RPM_LDOA
, 15, &pm8998_pldo_lv
, "vdd_l7_l12_l14_l15" },
729 { "l16", QCOM_SMD_RPM_LDOA
, 16, &pm8998_pldo
, "vdd_l16_l28" },
730 { "l17", QCOM_SMD_RPM_LDOA
, 17, &pm8998_nldo
, "vdd_l2_l8_l17" },
731 { "l18", QCOM_SMD_RPM_LDOA
, 18, &pm8998_pldo
, "vdd_l18_l22" },
732 { "l19", QCOM_SMD_RPM_LDOA
, 19, &pm8998_pldo
, "vdd_l13_l19_l21" },
733 { "l20", QCOM_SMD_RPM_LDOA
, 20, &pm8998_pldo
, "vdd_l20_l24" },
734 { "l21", QCOM_SMD_RPM_LDOA
, 21, &pm8998_pldo
, "vdd_l13_l19_l21" },
735 { "l22", QCOM_SMD_RPM_LDOA
, 22, &pm8998_pldo
, "vdd_l18_l22" },
736 { "l23", QCOM_SMD_RPM_LDOA
, 23, &pm8998_pldo
, "vdd_l10_l23_l25" },
737 { "l24", QCOM_SMD_RPM_LDOA
, 24, &pm8998_pldo
, "vdd_l20_l24" },
738 { "l25", QCOM_SMD_RPM_LDOA
, 25, &pm8998_pldo
, "vdd_l10_l23_l25" },
739 { "l26", QCOM_SMD_RPM_LDOA
, 26, &pm8998_nldo
, "vdd_l26" },
740 { "l27", QCOM_SMD_RPM_LDOA
, 27, &pm8998_nldo
, "vdd_l1_l27" },
741 { "l28", QCOM_SMD_RPM_LDOA
, 28, &pm8998_pldo
, "vdd_l16_l28" },
742 { "lvs1", QCOM_SMD_RPM_VSA
, 1, &pm8998_switch
, "vdd_lvs1_lvs2" },
743 { "lvs2", QCOM_SMD_RPM_VSA
, 2, &pm8998_switch
, "vdd_lvs1_lvs2" },
747 static const struct rpm_regulator_data rpm_pmi8998_regulators
[] = {
748 { "bob", QCOM_SMD_RPM_BOBB
, 1, &pmi8998_bob
, "vdd_bob" },
752 static const struct rpm_regulator_data rpm_pms405_regulators
[] = {
753 { "s1", QCOM_SMD_RPM_SMPA
, 1, &pms405_hfsmps3
, "vdd_s1" },
754 { "s2", QCOM_SMD_RPM_SMPA
, 2, &pms405_hfsmps3
, "vdd_s2" },
755 { "s3", QCOM_SMD_RPM_SMPA
, 3, &pms405_hfsmps3
, "vdd_s3" },
756 { "s4", QCOM_SMD_RPM_SMPA
, 4, &pms405_hfsmps3
, "vdd_s4" },
757 { "s5", QCOM_SMD_RPM_SMPA
, 5, &pms405_hfsmps3
, "vdd_s5" },
758 { "l1", QCOM_SMD_RPM_LDOA
, 1, &pms405_nldo1200
, "vdd_l1_l2" },
759 { "l2", QCOM_SMD_RPM_LDOA
, 2, &pms405_nldo1200
, "vdd_l1_l2" },
760 { "l3", QCOM_SMD_RPM_LDOA
, 3, &pms405_nldo1200
, "vdd_l3_l8" },
761 { "l4", QCOM_SMD_RPM_LDOA
, 4, &pms405_nldo300
, "vdd_l4" },
762 { "l5", QCOM_SMD_RPM_LDOA
, 5, &pms405_pldo600
, "vdd_l5_l6" },
763 { "l6", QCOM_SMD_RPM_LDOA
, 6, &pms405_pldo600
, "vdd_l5_l6" },
764 { "l7", QCOM_SMD_RPM_LDOA
, 7, &pms405_pldo150
, "vdd_l7" },
765 { "l8", QCOM_SMD_RPM_LDOA
, 8, &pms405_nldo1200
, "vdd_l3_l8" },
766 { "l9", QCOM_SMD_RPM_LDOA
, 9, &pms405_nldo1200
, "vdd_l9" },
767 { "l10", QCOM_SMD_RPM_LDOA
, 10, &pms405_pldo50
, "vdd_l10_l11_l12_l13" },
768 { "l11", QCOM_SMD_RPM_LDOA
, 11, &pms405_pldo150
, "vdd_l10_l11_l12_l13" },
769 { "l12", QCOM_SMD_RPM_LDOA
, 12, &pms405_pldo150
, "vdd_l10_l11_l12_l13" },
770 { "l13", QCOM_SMD_RPM_LDOA
, 13, &pms405_pldo150
, "vdd_l10_l11_l12_l13" },
774 static const struct of_device_id rpm_of_match
[] = {
775 { .compatible
= "qcom,rpm-pm8841-regulators", .data
= &rpm_pm8841_regulators
},
776 { .compatible
= "qcom,rpm-pm8916-regulators", .data
= &rpm_pm8916_regulators
},
777 { .compatible
= "qcom,rpm-pm8941-regulators", .data
= &rpm_pm8941_regulators
},
778 { .compatible
= "qcom,rpm-pm8994-regulators", .data
= &rpm_pm8994_regulators
},
779 { .compatible
= "qcom,rpm-pm8998-regulators", .data
= &rpm_pm8998_regulators
},
780 { .compatible
= "qcom,rpm-pma8084-regulators", .data
= &rpm_pma8084_regulators
},
781 { .compatible
= "qcom,rpm-pmi8998-regulators", .data
= &rpm_pmi8998_regulators
},
782 { .compatible
= "qcom,rpm-pms405-regulators", .data
= &rpm_pms405_regulators
},
785 MODULE_DEVICE_TABLE(of
, rpm_of_match
);
787 static int rpm_reg_probe(struct platform_device
*pdev
)
789 const struct rpm_regulator_data
*reg
;
790 const struct of_device_id
*match
;
791 struct regulator_config config
= { };
792 struct regulator_dev
*rdev
;
793 struct qcom_rpm_reg
*vreg
;
794 struct qcom_smd_rpm
*rpm
;
796 rpm
= dev_get_drvdata(pdev
->dev
.parent
);
798 dev_err(&pdev
->dev
, "unable to retrieve handle to rpm\n");
802 match
= of_match_device(rpm_of_match
, &pdev
->dev
);
804 dev_err(&pdev
->dev
, "failed to match device\n");
808 for (reg
= match
->data
; reg
->name
; reg
++) {
809 vreg
= devm_kzalloc(&pdev
->dev
, sizeof(*vreg
), GFP_KERNEL
);
813 vreg
->dev
= &pdev
->dev
;
814 vreg
->type
= reg
->type
;
818 memcpy(&vreg
->desc
, reg
->desc
, sizeof(vreg
->desc
));
821 vreg
->desc
.owner
= THIS_MODULE
;
822 vreg
->desc
.type
= REGULATOR_VOLTAGE
;
823 vreg
->desc
.name
= reg
->name
;
824 vreg
->desc
.supply_name
= reg
->supply
;
825 vreg
->desc
.of_match
= reg
->name
;
827 config
.dev
= &pdev
->dev
;
828 config
.driver_data
= vreg
;
829 rdev
= devm_regulator_register(&pdev
->dev
, &vreg
->desc
, &config
);
831 dev_err(&pdev
->dev
, "failed to register %s\n", reg
->name
);
832 return PTR_ERR(rdev
);
839 static struct platform_driver rpm_reg_driver
= {
840 .probe
= rpm_reg_probe
,
842 .name
= "qcom_rpm_smd_regulator",
843 .of_match_table
= rpm_of_match
,
847 static int __init
rpm_reg_init(void)
849 return platform_driver_register(&rpm_reg_driver
);
851 subsys_initcall(rpm_reg_init
);
853 static void __exit
rpm_reg_exit(void)
855 platform_driver_unregister(&rpm_reg_driver
);
857 module_exit(rpm_reg_exit
)
859 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
860 MODULE_LICENSE("GPL v2");