Linux 5.1.15
[linux/fpc-iii.git] / drivers / remoteproc / st_remoteproc.c
blob51049d17b1e5c01b5ef94d18a27b4e5555c4d131
1 /*
2 * ST's Remote Processor Control Driver
4 * Copyright (C) 2015 STMicroelectronics - All Rights Reserved
6 * Author: Ludovic Barre <ludovic.barre@st.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/clk.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/err.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <linux/mailbox_client.h>
19 #include <linux/mfd/syscon.h>
20 #include <linux/module.h>
21 #include <linux/of.h>
22 #include <linux/of_address.h>
23 #include <linux/of_device.h>
24 #include <linux/of_reserved_mem.h>
25 #include <linux/platform_device.h>
26 #include <linux/regmap.h>
27 #include <linux/remoteproc.h>
28 #include <linux/reset.h>
30 #include "remoteproc_internal.h"
32 #define ST_RPROC_VQ0 0
33 #define ST_RPROC_VQ1 1
34 #define ST_RPROC_MAX_VRING 2
36 #define MBOX_RX 0
37 #define MBOX_TX 1
38 #define MBOX_MAX 2
40 struct st_rproc_config {
41 bool sw_reset;
42 bool pwr_reset;
43 unsigned long bootaddr_mask;
46 struct st_rproc {
47 struct st_rproc_config *config;
48 struct reset_control *sw_reset;
49 struct reset_control *pwr_reset;
50 struct clk *clk;
51 u32 clk_rate;
52 struct regmap *boot_base;
53 u32 boot_offset;
54 struct mbox_chan *mbox_chan[ST_RPROC_MAX_VRING * MBOX_MAX];
55 struct mbox_client mbox_client_vq0;
56 struct mbox_client mbox_client_vq1;
59 static void st_rproc_mbox_callback(struct device *dev, u32 msg)
61 struct rproc *rproc = dev_get_drvdata(dev);
63 if (rproc_vq_interrupt(rproc, msg) == IRQ_NONE)
64 dev_dbg(dev, "no message was found in vqid %d\n", msg);
67 static
68 void st_rproc_mbox_callback_vq0(struct mbox_client *mbox_client, void *data)
70 st_rproc_mbox_callback(mbox_client->dev, 0);
73 static
74 void st_rproc_mbox_callback_vq1(struct mbox_client *mbox_client, void *data)
76 st_rproc_mbox_callback(mbox_client->dev, 1);
79 static void st_rproc_kick(struct rproc *rproc, int vqid)
81 struct st_rproc *ddata = rproc->priv;
82 struct device *dev = rproc->dev.parent;
83 int ret;
85 /* send the index of the triggered virtqueue in the mailbox payload */
86 if (WARN_ON(vqid >= ST_RPROC_MAX_VRING))
87 return;
89 ret = mbox_send_message(ddata->mbox_chan[vqid * MBOX_MAX + MBOX_TX],
90 (void *)&vqid);
91 if (ret < 0)
92 dev_err(dev, "failed to send message via mbox: %d\n", ret);
95 static int st_rproc_mem_alloc(struct rproc *rproc,
96 struct rproc_mem_entry *mem)
98 struct device *dev = rproc->dev.parent;
99 void *va;
101 va = ioremap_wc(mem->dma, mem->len);
102 if (!va) {
103 dev_err(dev, "Unable to map memory region: %pa+%zx\n",
104 &mem->dma, mem->len);
105 return -ENOMEM;
108 /* Update memory entry va */
109 mem->va = va;
111 return 0;
114 static int st_rproc_mem_release(struct rproc *rproc,
115 struct rproc_mem_entry *mem)
117 iounmap(mem->va);
119 return 0;
122 static int st_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
124 struct device *dev = rproc->dev.parent;
125 struct device_node *np = dev->of_node;
126 struct rproc_mem_entry *mem;
127 struct reserved_mem *rmem;
128 struct of_phandle_iterator it;
129 int index = 0;
131 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
132 while (of_phandle_iterator_next(&it) == 0) {
133 rmem = of_reserved_mem_lookup(it.node);
134 if (!rmem) {
135 dev_err(dev, "unable to acquire memory-region\n");
136 return -EINVAL;
139 /* No need to map vdev buffer */
140 if (strcmp(it.node->name, "vdev0buffer")) {
141 /* Register memory region */
142 mem = rproc_mem_entry_init(dev, NULL,
143 (dma_addr_t)rmem->base,
144 rmem->size, rmem->base,
145 st_rproc_mem_alloc,
146 st_rproc_mem_release,
147 it.node->name);
148 } else {
149 /* Register reserved memory for vdev buffer allocation */
150 mem = rproc_of_resm_mem_entry_init(dev, index,
151 rmem->size,
152 rmem->base,
153 it.node->name);
156 if (!mem)
157 return -ENOMEM;
159 rproc_add_carveout(rproc, mem);
160 index++;
163 return rproc_elf_load_rsc_table(rproc, fw);
166 static int st_rproc_start(struct rproc *rproc)
168 struct st_rproc *ddata = rproc->priv;
169 int err;
171 regmap_update_bits(ddata->boot_base, ddata->boot_offset,
172 ddata->config->bootaddr_mask, rproc->bootaddr);
174 err = clk_enable(ddata->clk);
175 if (err) {
176 dev_err(&rproc->dev, "Failed to enable clock\n");
177 return err;
180 if (ddata->config->sw_reset) {
181 err = reset_control_deassert(ddata->sw_reset);
182 if (err) {
183 dev_err(&rproc->dev, "Failed to deassert S/W Reset\n");
184 goto sw_reset_fail;
188 if (ddata->config->pwr_reset) {
189 err = reset_control_deassert(ddata->pwr_reset);
190 if (err) {
191 dev_err(&rproc->dev, "Failed to deassert Power Reset\n");
192 goto pwr_reset_fail;
196 dev_info(&rproc->dev, "Started from 0x%x\n", rproc->bootaddr);
198 return 0;
201 pwr_reset_fail:
202 if (ddata->config->pwr_reset)
203 reset_control_assert(ddata->sw_reset);
204 sw_reset_fail:
205 clk_disable(ddata->clk);
207 return err;
210 static int st_rproc_stop(struct rproc *rproc)
212 struct st_rproc *ddata = rproc->priv;
213 int sw_err = 0, pwr_err = 0;
215 if (ddata->config->sw_reset) {
216 sw_err = reset_control_assert(ddata->sw_reset);
217 if (sw_err)
218 dev_err(&rproc->dev, "Failed to assert S/W Reset\n");
221 if (ddata->config->pwr_reset) {
222 pwr_err = reset_control_assert(ddata->pwr_reset);
223 if (pwr_err)
224 dev_err(&rproc->dev, "Failed to assert Power Reset\n");
227 clk_disable(ddata->clk);
229 return sw_err ?: pwr_err;
232 static const struct rproc_ops st_rproc_ops = {
233 .kick = st_rproc_kick,
234 .start = st_rproc_start,
235 .stop = st_rproc_stop,
236 .parse_fw = st_rproc_parse_fw,
237 .load = rproc_elf_load_segments,
238 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
239 .sanity_check = rproc_elf_sanity_check,
240 .get_boot_addr = rproc_elf_get_boot_addr,
244 * Fetch state of the processor: 0 is off, 1 is on.
246 static int st_rproc_state(struct platform_device *pdev)
248 struct rproc *rproc = platform_get_drvdata(pdev);
249 struct st_rproc *ddata = rproc->priv;
250 int reset_sw = 0, reset_pwr = 0;
252 if (ddata->config->sw_reset)
253 reset_sw = reset_control_status(ddata->sw_reset);
255 if (ddata->config->pwr_reset)
256 reset_pwr = reset_control_status(ddata->pwr_reset);
258 if (reset_sw < 0 || reset_pwr < 0)
259 return -EINVAL;
261 return !reset_sw && !reset_pwr;
264 static const struct st_rproc_config st40_rproc_cfg = {
265 .sw_reset = true,
266 .pwr_reset = true,
267 .bootaddr_mask = GENMASK(28, 1),
270 static const struct st_rproc_config st231_rproc_cfg = {
271 .sw_reset = true,
272 .pwr_reset = false,
273 .bootaddr_mask = GENMASK(31, 6),
276 static const struct of_device_id st_rproc_match[] = {
277 { .compatible = "st,st40-rproc", .data = &st40_rproc_cfg },
278 { .compatible = "st,st231-rproc", .data = &st231_rproc_cfg },
281 MODULE_DEVICE_TABLE(of, st_rproc_match);
283 static int st_rproc_parse_dt(struct platform_device *pdev)
285 struct device *dev = &pdev->dev;
286 struct rproc *rproc = platform_get_drvdata(pdev);
287 struct st_rproc *ddata = rproc->priv;
288 struct device_node *np = dev->of_node;
289 int err;
291 if (ddata->config->sw_reset) {
292 ddata->sw_reset = devm_reset_control_get_exclusive(dev,
293 "sw_reset");
294 if (IS_ERR(ddata->sw_reset)) {
295 dev_err(dev, "Failed to get S/W Reset\n");
296 return PTR_ERR(ddata->sw_reset);
300 if (ddata->config->pwr_reset) {
301 ddata->pwr_reset = devm_reset_control_get_exclusive(dev,
302 "pwr_reset");
303 if (IS_ERR(ddata->pwr_reset)) {
304 dev_err(dev, "Failed to get Power Reset\n");
305 return PTR_ERR(ddata->pwr_reset);
309 ddata->clk = devm_clk_get(dev, NULL);
310 if (IS_ERR(ddata->clk)) {
311 dev_err(dev, "Failed to get clock\n");
312 return PTR_ERR(ddata->clk);
315 err = of_property_read_u32(np, "clock-frequency", &ddata->clk_rate);
316 if (err) {
317 dev_err(dev, "failed to get clock frequency\n");
318 return err;
321 ddata->boot_base = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
322 if (IS_ERR(ddata->boot_base)) {
323 dev_err(dev, "Boot base not found\n");
324 return PTR_ERR(ddata->boot_base);
327 err = of_property_read_u32_index(np, "st,syscfg", 1,
328 &ddata->boot_offset);
329 if (err) {
330 dev_err(dev, "Boot offset not found\n");
331 return -EINVAL;
334 err = clk_prepare(ddata->clk);
335 if (err)
336 dev_err(dev, "failed to get clock\n");
338 return err;
341 static int st_rproc_probe(struct platform_device *pdev)
343 struct device *dev = &pdev->dev;
344 const struct of_device_id *match;
345 struct st_rproc *ddata;
346 struct device_node *np = dev->of_node;
347 struct rproc *rproc;
348 struct mbox_chan *chan;
349 int enabled;
350 int ret, i;
352 match = of_match_device(st_rproc_match, dev);
353 if (!match || !match->data) {
354 dev_err(dev, "No device match found\n");
355 return -ENODEV;
358 rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
359 if (!rproc)
360 return -ENOMEM;
362 rproc->has_iommu = false;
363 ddata = rproc->priv;
364 ddata->config = (struct st_rproc_config *)match->data;
366 platform_set_drvdata(pdev, rproc);
368 ret = st_rproc_parse_dt(pdev);
369 if (ret)
370 goto free_rproc;
372 enabled = st_rproc_state(pdev);
373 if (enabled < 0) {
374 ret = enabled;
375 goto free_clk;
378 if (enabled) {
379 atomic_inc(&rproc->power);
380 rproc->state = RPROC_RUNNING;
381 } else {
382 clk_set_rate(ddata->clk, ddata->clk_rate);
385 if (of_get_property(np, "mbox-names", NULL)) {
386 ddata->mbox_client_vq0.dev = dev;
387 ddata->mbox_client_vq0.tx_done = NULL;
388 ddata->mbox_client_vq0.tx_block = false;
389 ddata->mbox_client_vq0.knows_txdone = false;
390 ddata->mbox_client_vq0.rx_callback = st_rproc_mbox_callback_vq0;
392 ddata->mbox_client_vq1.dev = dev;
393 ddata->mbox_client_vq1.tx_done = NULL;
394 ddata->mbox_client_vq1.tx_block = false;
395 ddata->mbox_client_vq1.knows_txdone = false;
396 ddata->mbox_client_vq1.rx_callback = st_rproc_mbox_callback_vq1;
399 * To control a co-processor without IPC mechanism.
400 * This driver can be used without mbox and rpmsg.
402 chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_rx");
403 if (IS_ERR(chan)) {
404 dev_err(&rproc->dev, "failed to request mbox chan 0\n");
405 ret = PTR_ERR(chan);
406 goto free_clk;
408 ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_RX] = chan;
410 chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_tx");
411 if (IS_ERR(chan)) {
412 dev_err(&rproc->dev, "failed to request mbox chan 0\n");
413 ret = PTR_ERR(chan);
414 goto free_mbox;
416 ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_TX] = chan;
418 chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_rx");
419 if (IS_ERR(chan)) {
420 dev_err(&rproc->dev, "failed to request mbox chan 1\n");
421 ret = PTR_ERR(chan);
422 goto free_mbox;
424 ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_RX] = chan;
426 chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_tx");
427 if (IS_ERR(chan)) {
428 dev_err(&rproc->dev, "failed to request mbox chan 1\n");
429 ret = PTR_ERR(chan);
430 goto free_mbox;
432 ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_TX] = chan;
435 ret = rproc_add(rproc);
436 if (ret)
437 goto free_mbox;
439 return 0;
441 free_mbox:
442 for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)
443 mbox_free_channel(ddata->mbox_chan[i]);
444 free_clk:
445 clk_unprepare(ddata->clk);
446 free_rproc:
447 rproc_free(rproc);
448 return ret;
451 static int st_rproc_remove(struct platform_device *pdev)
453 struct rproc *rproc = platform_get_drvdata(pdev);
454 struct st_rproc *ddata = rproc->priv;
455 int i;
457 rproc_del(rproc);
459 clk_disable_unprepare(ddata->clk);
461 for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)
462 mbox_free_channel(ddata->mbox_chan[i]);
464 rproc_free(rproc);
466 return 0;
469 static struct platform_driver st_rproc_driver = {
470 .probe = st_rproc_probe,
471 .remove = st_rproc_remove,
472 .driver = {
473 .name = "st-rproc",
474 .of_match_table = of_match_ptr(st_rproc_match),
477 module_platform_driver(st_rproc_driver);
479 MODULE_DESCRIPTION("ST Remote Processor Control Driver");
480 MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
481 MODULE_LICENSE("GPL v2");