Linux 5.1.15
[linux/fpc-iii.git] / drivers / s390 / cio / qdio_main.c
blob9537e656e9278d5b9b9861320e39f086a8d94f02
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Linux for s390 qdio support, buffer handling, qdio API and module support.
5 * Copyright IBM Corp. 2000, 2008
6 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
7 * Jan Glauber <jang@linux.vnet.ibm.com>
8 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
9 */
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/timer.h>
14 #include <linux/delay.h>
15 #include <linux/gfp.h>
16 #include <linux/io.h>
17 #include <linux/atomic.h>
18 #include <asm/debug.h>
19 #include <asm/qdio.h>
20 #include <asm/ipl.h>
22 #include "cio.h"
23 #include "css.h"
24 #include "device.h"
25 #include "qdio.h"
26 #include "qdio_debug.h"
28 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
29 "Jan Glauber <jang@linux.vnet.ibm.com>");
30 MODULE_DESCRIPTION("QDIO base support");
31 MODULE_LICENSE("GPL");
33 static inline int do_siga_sync(unsigned long schid,
34 unsigned int out_mask, unsigned int in_mask,
35 unsigned int fc)
37 register unsigned long __fc asm ("0") = fc;
38 register unsigned long __schid asm ("1") = schid;
39 register unsigned long out asm ("2") = out_mask;
40 register unsigned long in asm ("3") = in_mask;
41 int cc;
43 asm volatile(
44 " siga 0\n"
45 " ipm %0\n"
46 " srl %0,28\n"
47 : "=d" (cc)
48 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
49 return cc;
52 static inline int do_siga_input(unsigned long schid, unsigned int mask,
53 unsigned int fc)
55 register unsigned long __fc asm ("0") = fc;
56 register unsigned long __schid asm ("1") = schid;
57 register unsigned long __mask asm ("2") = mask;
58 int cc;
60 asm volatile(
61 " siga 0\n"
62 " ipm %0\n"
63 " srl %0,28\n"
64 : "=d" (cc)
65 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
66 return cc;
69 /**
70 * do_siga_output - perform SIGA-w/wt function
71 * @schid: subchannel id or in case of QEBSM the subchannel token
72 * @mask: which output queues to process
73 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
74 * @fc: function code to perform
75 * @aob: asynchronous operation block
77 * Returns condition code.
78 * Note: For IQDC unicast queues only the highest priority queue is processed.
80 static inline int do_siga_output(unsigned long schid, unsigned long mask,
81 unsigned int *bb, unsigned int fc,
82 unsigned long aob)
84 register unsigned long __fc asm("0") = fc;
85 register unsigned long __schid asm("1") = schid;
86 register unsigned long __mask asm("2") = mask;
87 register unsigned long __aob asm("3") = aob;
88 int cc;
90 asm volatile(
91 " siga 0\n"
92 " ipm %0\n"
93 " srl %0,28\n"
94 : "=d" (cc), "+d" (__fc), "+d" (__aob)
95 : "d" (__schid), "d" (__mask)
96 : "cc");
97 *bb = __fc >> 31;
98 return cc;
102 * qdio_do_eqbs - extract buffer states for QEBSM
103 * @q: queue to manipulate
104 * @state: state of the extracted buffers
105 * @start: buffer number to start at
106 * @count: count of buffers to examine
107 * @auto_ack: automatically acknowledge buffers
109 * Returns the number of successfully extracted equal buffer states.
110 * Stops processing if a state is different from the last buffers state.
112 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
113 int start, int count, int auto_ack)
115 int tmp_count = count, tmp_start = start, nr = q->nr;
116 unsigned int ccq = 0;
118 qperf_inc(q, eqbs);
120 if (!q->is_input_q)
121 nr += q->irq_ptr->nr_input_qs;
122 again:
123 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
124 auto_ack);
126 switch (ccq) {
127 case 0:
128 case 32:
129 /* all done, or next buffer state different */
130 return count - tmp_count;
131 case 96:
132 /* not all buffers processed */
133 qperf_inc(q, eqbs_partial);
134 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
135 tmp_count);
136 return count - tmp_count;
137 case 97:
138 /* no buffer processed */
139 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
140 goto again;
141 default:
142 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
143 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
144 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
145 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr,
146 q->first_to_kick, count, q->irq_ptr->int_parm);
147 return 0;
152 * qdio_do_sqbs - set buffer states for QEBSM
153 * @q: queue to manipulate
154 * @state: new state of the buffers
155 * @start: first buffer number to change
156 * @count: how many buffers to change
158 * Returns the number of successfully changed buffers.
159 * Does retrying until the specified count of buffer states is set or an
160 * error occurs.
162 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
163 int count)
165 unsigned int ccq = 0;
166 int tmp_count = count, tmp_start = start;
167 int nr = q->nr;
169 if (!count)
170 return 0;
171 qperf_inc(q, sqbs);
173 if (!q->is_input_q)
174 nr += q->irq_ptr->nr_input_qs;
175 again:
176 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
178 switch (ccq) {
179 case 0:
180 case 32:
181 /* all done, or active buffer adapter-owned */
182 WARN_ON_ONCE(tmp_count);
183 return count - tmp_count;
184 case 96:
185 /* not all buffers processed */
186 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
187 qperf_inc(q, sqbs_partial);
188 goto again;
189 default:
190 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
191 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
192 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
193 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr,
194 q->first_to_kick, count, q->irq_ptr->int_parm);
195 return 0;
200 * Returns number of examined buffers and their common state in *state.
201 * Requested number of buffers-to-examine must be > 0.
203 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
204 unsigned char *state, unsigned int count,
205 int auto_ack, int merge_pending)
207 unsigned char __state = 0;
208 int i;
210 if (is_qebsm(q))
211 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
213 /* get initial state: */
214 __state = q->slsb.val[bufnr];
215 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
216 __state = SLSB_P_OUTPUT_EMPTY;
218 for (i = 1; i < count; i++) {
219 bufnr = next_buf(bufnr);
221 /* merge PENDING into EMPTY: */
222 if (merge_pending &&
223 q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING &&
224 __state == SLSB_P_OUTPUT_EMPTY)
225 continue;
227 /* stop if next state differs from initial state: */
228 if (q->slsb.val[bufnr] != __state)
229 break;
231 *state = __state;
232 return i;
235 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
236 unsigned char *state, int auto_ack)
238 return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
241 /* wrap-around safe setting of slsb states, returns number of changed buffers */
242 static inline int set_buf_states(struct qdio_q *q, int bufnr,
243 unsigned char state, int count)
245 int i;
247 if (is_qebsm(q))
248 return qdio_do_sqbs(q, state, bufnr, count);
250 for (i = 0; i < count; i++) {
251 xchg(&q->slsb.val[bufnr], state);
252 bufnr = next_buf(bufnr);
254 return count;
257 static inline int set_buf_state(struct qdio_q *q, int bufnr,
258 unsigned char state)
260 return set_buf_states(q, bufnr, state, 1);
263 /* set slsb states to initial state */
264 static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
266 struct qdio_q *q;
267 int i;
269 for_each_input_queue(irq_ptr, q, i)
270 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
271 QDIO_MAX_BUFFERS_PER_Q);
272 for_each_output_queue(irq_ptr, q, i)
273 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
274 QDIO_MAX_BUFFERS_PER_Q);
277 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
278 unsigned int input)
280 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
281 unsigned int fc = QDIO_SIGA_SYNC;
282 int cc;
284 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
285 qperf_inc(q, siga_sync);
287 if (is_qebsm(q)) {
288 schid = q->irq_ptr->sch_token;
289 fc |= QDIO_SIGA_QEBSM_FLAG;
292 cc = do_siga_sync(schid, output, input, fc);
293 if (unlikely(cc))
294 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
295 return (cc) ? -EIO : 0;
298 static inline int qdio_siga_sync_q(struct qdio_q *q)
300 if (q->is_input_q)
301 return qdio_siga_sync(q, 0, q->mask);
302 else
303 return qdio_siga_sync(q, q->mask, 0);
306 static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
307 unsigned long aob)
309 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
310 unsigned int fc = QDIO_SIGA_WRITE;
311 u64 start_time = 0;
312 int retries = 0, cc;
313 unsigned long laob = 0;
315 WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
316 !q->u.out.use_cq));
317 if (q->u.out.use_cq && aob != 0) {
318 fc = QDIO_SIGA_WRITEQ;
319 laob = aob;
322 if (is_qebsm(q)) {
323 schid = q->irq_ptr->sch_token;
324 fc |= QDIO_SIGA_QEBSM_FLAG;
326 again:
327 cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
329 /* hipersocket busy condition */
330 if (unlikely(*busy_bit)) {
331 retries++;
333 if (!start_time) {
334 start_time = get_tod_clock_fast();
335 goto again;
337 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
338 goto again;
340 if (retries) {
341 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
342 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
343 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
345 return cc;
348 static inline int qdio_siga_input(struct qdio_q *q)
350 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
351 unsigned int fc = QDIO_SIGA_READ;
352 int cc;
354 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
355 qperf_inc(q, siga_read);
357 if (is_qebsm(q)) {
358 schid = q->irq_ptr->sch_token;
359 fc |= QDIO_SIGA_QEBSM_FLAG;
362 cc = do_siga_input(schid, q->mask, fc);
363 if (unlikely(cc))
364 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
365 return (cc) ? -EIO : 0;
368 #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
369 #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
371 static inline void qdio_sync_queues(struct qdio_q *q)
373 /* PCI capable outbound queues will also be scanned so sync them too */
374 if (pci_out_supported(q))
375 qdio_siga_sync_all(q);
376 else
377 qdio_siga_sync_q(q);
380 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
381 unsigned char *state)
383 if (need_siga_sync(q))
384 qdio_siga_sync_q(q);
385 return get_buf_states(q, bufnr, state, 1, 0, 0);
388 static inline void qdio_stop_polling(struct qdio_q *q)
390 if (!q->u.in.polling)
391 return;
393 q->u.in.polling = 0;
394 qperf_inc(q, stop_polling);
396 /* show the card that we are not polling anymore */
397 if (is_qebsm(q)) {
398 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
399 q->u.in.ack_count);
400 q->u.in.ack_count = 0;
401 } else
402 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
405 static inline void account_sbals(struct qdio_q *q, unsigned int count)
407 int pos;
409 q->q_stats.nr_sbal_total += count;
410 if (count == QDIO_MAX_BUFFERS_MASK) {
411 q->q_stats.nr_sbals[7]++;
412 return;
414 pos = ilog2(count);
415 q->q_stats.nr_sbals[pos]++;
418 static void process_buffer_error(struct qdio_q *q, int count)
420 unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
421 SLSB_P_OUTPUT_NOT_INIT;
423 q->qdio_error = QDIO_ERROR_SLSB_STATE;
425 /* special handling for no target buffer empty */
426 if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q &&
427 q->sbal[q->first_to_check]->element[15].sflags == 0x10) {
428 qperf_inc(q, target_full);
429 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
430 q->first_to_check);
431 goto set;
434 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
435 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
436 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
437 DBF_ERROR("F14:%2x F15:%2x",
438 q->sbal[q->first_to_check]->element[14].sflags,
439 q->sbal[q->first_to_check]->element[15].sflags);
441 set:
443 * Interrupts may be avoided as long as the error is present
444 * so change the buffer state immediately to avoid starvation.
446 set_buf_states(q, q->first_to_check, state, count);
449 static inline void inbound_primed(struct qdio_q *q, int count)
451 int new;
453 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count);
455 /* for QEBSM the ACK was already set by EQBS */
456 if (is_qebsm(q)) {
457 if (!q->u.in.polling) {
458 q->u.in.polling = 1;
459 q->u.in.ack_count = count;
460 q->u.in.ack_start = q->first_to_check;
461 return;
464 /* delete the previous ACK's */
465 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
466 q->u.in.ack_count);
467 q->u.in.ack_count = count;
468 q->u.in.ack_start = q->first_to_check;
469 return;
473 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
474 * or by the next inbound run.
476 new = add_buf(q->first_to_check, count - 1);
477 if (q->u.in.polling) {
478 /* reset the previous ACK but first set the new one */
479 set_buf_state(q, new, SLSB_P_INPUT_ACK);
480 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
481 } else {
482 q->u.in.polling = 1;
483 set_buf_state(q, new, SLSB_P_INPUT_ACK);
486 q->u.in.ack_start = new;
487 count--;
488 if (!count)
489 return;
490 /* need to change ALL buffers to get more interrupts */
491 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
494 static int get_inbound_buffer_frontier(struct qdio_q *q)
496 unsigned char state = 0;
497 int count;
499 q->timestamp = get_tod_clock_fast();
502 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
503 * would return 0.
505 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
506 if (!count)
507 goto out;
510 * No siga sync here, as a PCI or we after a thin interrupt
511 * already sync'ed the queues.
513 count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
514 if (!count)
515 goto out;
517 switch (state) {
518 case SLSB_P_INPUT_PRIMED:
519 inbound_primed(q, count);
520 q->first_to_check = add_buf(q->first_to_check, count);
521 if (atomic_sub_return(count, &q->nr_buf_used) == 0)
522 qperf_inc(q, inbound_queue_full);
523 if (q->irq_ptr->perf_stat_enabled)
524 account_sbals(q, count);
525 break;
526 case SLSB_P_INPUT_ERROR:
527 process_buffer_error(q, count);
528 q->first_to_check = add_buf(q->first_to_check, count);
529 if (atomic_sub_return(count, &q->nr_buf_used) == 0)
530 qperf_inc(q, inbound_queue_full);
531 if (q->irq_ptr->perf_stat_enabled)
532 account_sbals_error(q, count);
533 break;
534 case SLSB_CU_INPUT_EMPTY:
535 case SLSB_P_INPUT_NOT_INIT:
536 case SLSB_P_INPUT_ACK:
537 if (q->irq_ptr->perf_stat_enabled)
538 q->q_stats.nr_sbal_nop++;
539 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
540 q->nr, q->first_to_check);
541 break;
542 default:
543 WARN_ON_ONCE(1);
545 out:
546 return q->first_to_check;
549 static int qdio_inbound_q_moved(struct qdio_q *q)
551 int bufnr;
553 bufnr = get_inbound_buffer_frontier(q);
555 if (bufnr != q->last_move) {
556 q->last_move = bufnr;
557 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
558 q->u.in.timestamp = get_tod_clock();
559 return 1;
560 } else
561 return 0;
564 static inline int qdio_inbound_q_done(struct qdio_q *q)
566 unsigned char state = 0;
568 if (!atomic_read(&q->nr_buf_used))
569 return 1;
571 if (need_siga_sync(q))
572 qdio_siga_sync_q(q);
573 get_buf_state(q, q->first_to_check, &state, 0);
575 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
576 /* more work coming */
577 return 0;
579 if (is_thinint_irq(q->irq_ptr))
580 return 1;
582 /* don't poll under z/VM */
583 if (MACHINE_IS_VM)
584 return 1;
587 * At this point we know, that inbound first_to_check
588 * has (probably) not moved (see qdio_inbound_processing).
590 if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
591 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
592 q->first_to_check);
593 return 1;
594 } else
595 return 0;
598 static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
600 unsigned char state = 0;
601 int j, b = start;
603 for (j = 0; j < count; ++j) {
604 get_buf_state(q, b, &state, 0);
605 if (state == SLSB_P_OUTPUT_PENDING) {
606 struct qaob *aob = q->u.out.aobs[b];
607 if (aob == NULL)
608 continue;
610 q->u.out.sbal_state[b].flags |=
611 QDIO_OUTBUF_STATE_FLAG_PENDING;
612 q->u.out.aobs[b] = NULL;
614 b = next_buf(b);
618 static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
619 int bufnr)
621 unsigned long phys_aob = 0;
623 if (!q->use_cq)
624 return 0;
626 if (!q->aobs[bufnr]) {
627 struct qaob *aob = qdio_allocate_aob();
628 q->aobs[bufnr] = aob;
630 if (q->aobs[bufnr]) {
631 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
632 phys_aob = virt_to_phys(q->aobs[bufnr]);
633 WARN_ON_ONCE(phys_aob & 0xFF);
636 q->sbal_state[bufnr].flags = 0;
637 return phys_aob;
640 static void qdio_kick_handler(struct qdio_q *q)
642 int start = q->first_to_kick;
643 int end = q->first_to_check;
644 int count;
646 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
647 return;
649 count = sub_buf(end, start);
651 if (q->is_input_q) {
652 qperf_inc(q, inbound_handler);
653 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
654 } else {
655 qperf_inc(q, outbound_handler);
656 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
657 start, count);
658 if (q->u.out.use_cq)
659 qdio_handle_aobs(q, start, count);
662 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
663 q->irq_ptr->int_parm);
665 /* for the next time */
666 q->first_to_kick = end;
667 q->qdio_error = 0;
670 static inline int qdio_tasklet_schedule(struct qdio_q *q)
672 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
673 tasklet_schedule(&q->tasklet);
674 return 0;
676 return -EPERM;
679 static void __qdio_inbound_processing(struct qdio_q *q)
681 qperf_inc(q, tasklet_inbound);
683 if (!qdio_inbound_q_moved(q))
684 return;
686 qdio_kick_handler(q);
688 if (!qdio_inbound_q_done(q)) {
689 /* means poll time is not yet over */
690 qperf_inc(q, tasklet_inbound_resched);
691 if (!qdio_tasklet_schedule(q))
692 return;
695 qdio_stop_polling(q);
697 * We need to check again to not lose initiative after
698 * resetting the ACK state.
700 if (!qdio_inbound_q_done(q)) {
701 qperf_inc(q, tasklet_inbound_resched2);
702 qdio_tasklet_schedule(q);
706 void qdio_inbound_processing(unsigned long data)
708 struct qdio_q *q = (struct qdio_q *)data;
709 __qdio_inbound_processing(q);
712 static int get_outbound_buffer_frontier(struct qdio_q *q)
714 unsigned char state = 0;
715 int count;
717 q->timestamp = get_tod_clock_fast();
719 if (need_siga_sync(q))
720 if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
721 !pci_out_supported(q)) ||
722 (queue_type(q) == QDIO_IQDIO_QFMT &&
723 multicast_outbound(q)))
724 qdio_siga_sync_q(q);
727 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
728 * would return 0.
730 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
731 if (!count)
732 goto out;
734 count = get_buf_states(q, q->first_to_check, &state, count, 0,
735 q->u.out.use_cq);
736 if (!count)
737 goto out;
739 switch (state) {
740 case SLSB_P_OUTPUT_EMPTY:
741 /* the adapter got it */
742 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
743 "out empty:%1d %02x", q->nr, count);
745 atomic_sub(count, &q->nr_buf_used);
746 q->first_to_check = add_buf(q->first_to_check, count);
747 if (q->irq_ptr->perf_stat_enabled)
748 account_sbals(q, count);
750 break;
751 case SLSB_P_OUTPUT_ERROR:
752 process_buffer_error(q, count);
753 q->first_to_check = add_buf(q->first_to_check, count);
754 atomic_sub(count, &q->nr_buf_used);
755 if (q->irq_ptr->perf_stat_enabled)
756 account_sbals_error(q, count);
757 break;
758 case SLSB_CU_OUTPUT_PRIMED:
759 /* the adapter has not fetched the output yet */
760 if (q->irq_ptr->perf_stat_enabled)
761 q->q_stats.nr_sbal_nop++;
762 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
763 q->nr);
764 break;
765 case SLSB_P_OUTPUT_NOT_INIT:
766 case SLSB_P_OUTPUT_HALTED:
767 break;
768 default:
769 WARN_ON_ONCE(1);
772 out:
773 return q->first_to_check;
776 /* all buffers processed? */
777 static inline int qdio_outbound_q_done(struct qdio_q *q)
779 return atomic_read(&q->nr_buf_used) == 0;
782 static inline int qdio_outbound_q_moved(struct qdio_q *q)
784 int bufnr;
786 bufnr = get_outbound_buffer_frontier(q);
788 if (bufnr != q->last_move) {
789 q->last_move = bufnr;
790 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
791 return 1;
792 } else
793 return 0;
796 static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
798 int retries = 0, cc;
799 unsigned int busy_bit;
801 if (!need_siga_out(q))
802 return 0;
804 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
805 retry:
806 qperf_inc(q, siga_write);
808 cc = qdio_siga_output(q, &busy_bit, aob);
809 switch (cc) {
810 case 0:
811 break;
812 case 2:
813 if (busy_bit) {
814 while (++retries < QDIO_BUSY_BIT_RETRIES) {
815 mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
816 goto retry;
818 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
819 cc = -EBUSY;
820 } else {
821 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
822 cc = -ENOBUFS;
824 break;
825 case 1:
826 case 3:
827 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
828 cc = -EIO;
829 break;
831 if (retries) {
832 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
833 DBF_ERROR("count:%u", retries);
835 return cc;
838 static void __qdio_outbound_processing(struct qdio_q *q)
840 qperf_inc(q, tasklet_outbound);
841 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
843 if (qdio_outbound_q_moved(q))
844 qdio_kick_handler(q);
846 if (queue_type(q) == QDIO_ZFCP_QFMT)
847 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
848 goto sched;
850 if (q->u.out.pci_out_enabled)
851 return;
854 * Now we know that queue type is either qeth without pci enabled
855 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
856 * is noticed and outbound_handler is called after some time.
858 if (qdio_outbound_q_done(q))
859 del_timer_sync(&q->u.out.timer);
860 else
861 if (!timer_pending(&q->u.out.timer) &&
862 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
863 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
864 return;
866 sched:
867 qdio_tasklet_schedule(q);
870 /* outbound tasklet */
871 void qdio_outbound_processing(unsigned long data)
873 struct qdio_q *q = (struct qdio_q *)data;
874 __qdio_outbound_processing(q);
877 void qdio_outbound_timer(struct timer_list *t)
879 struct qdio_q *q = from_timer(q, t, u.out.timer);
881 qdio_tasklet_schedule(q);
884 static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
886 struct qdio_q *out;
887 int i;
889 if (!pci_out_supported(q))
890 return;
892 for_each_output_queue(q->irq_ptr, out, i)
893 if (!qdio_outbound_q_done(out))
894 qdio_tasklet_schedule(out);
897 static void __tiqdio_inbound_processing(struct qdio_q *q)
899 qperf_inc(q, tasklet_inbound);
900 if (need_siga_sync(q) && need_siga_sync_after_ai(q))
901 qdio_sync_queues(q);
904 * The interrupt could be caused by a PCI request. Check the
905 * PCI capable outbound queues.
907 qdio_check_outbound_after_thinint(q);
909 if (!qdio_inbound_q_moved(q))
910 return;
912 qdio_kick_handler(q);
914 if (!qdio_inbound_q_done(q)) {
915 qperf_inc(q, tasklet_inbound_resched);
916 if (!qdio_tasklet_schedule(q))
917 return;
920 qdio_stop_polling(q);
922 * We need to check again to not lose initiative after
923 * resetting the ACK state.
925 if (!qdio_inbound_q_done(q)) {
926 qperf_inc(q, tasklet_inbound_resched2);
927 qdio_tasklet_schedule(q);
931 void tiqdio_inbound_processing(unsigned long data)
933 struct qdio_q *q = (struct qdio_q *)data;
934 __tiqdio_inbound_processing(q);
937 static inline void qdio_set_state(struct qdio_irq *irq_ptr,
938 enum qdio_irq_states state)
940 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
942 irq_ptr->state = state;
943 mb();
946 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
948 if (irb->esw.esw0.erw.cons) {
949 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
950 DBF_ERROR_HEX(irb, 64);
951 DBF_ERROR_HEX(irb->ecw, 64);
955 /* PCI interrupt handler */
956 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
958 int i;
959 struct qdio_q *q;
961 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
962 return;
964 for_each_input_queue(irq_ptr, q, i) {
965 if (q->u.in.queue_start_poll) {
966 /* skip if polling is enabled or already in work */
967 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
968 &q->u.in.queue_irq_state)) {
969 qperf_inc(q, int_discarded);
970 continue;
972 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
973 q->irq_ptr->int_parm);
974 } else {
975 tasklet_schedule(&q->tasklet);
979 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
980 return;
982 for_each_output_queue(irq_ptr, q, i) {
983 if (qdio_outbound_q_done(q))
984 continue;
985 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
986 qdio_siga_sync_q(q);
987 qdio_tasklet_schedule(q);
991 static void qdio_handle_activate_check(struct ccw_device *cdev,
992 unsigned long intparm, int cstat, int dstat)
994 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
995 struct qdio_q *q;
996 int count;
998 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
999 DBF_ERROR("intp :%lx", intparm);
1000 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1002 if (irq_ptr->nr_input_qs) {
1003 q = irq_ptr->input_qs[0];
1004 } else if (irq_ptr->nr_output_qs) {
1005 q = irq_ptr->output_qs[0];
1006 } else {
1007 dump_stack();
1008 goto no_handler;
1011 count = sub_buf(q->first_to_check, q->first_to_kick);
1012 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
1013 q->nr, q->first_to_kick, count, irq_ptr->int_parm);
1014 no_handler:
1015 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1017 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
1018 * Therefore we call the LGR detection function here.
1020 lgr_info_log();
1023 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
1024 int dstat)
1026 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1028 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
1030 if (cstat)
1031 goto error;
1032 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
1033 goto error;
1034 if (!(dstat & DEV_STAT_DEV_END))
1035 goto error;
1036 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
1037 return;
1039 error:
1040 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
1041 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1042 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1045 /* qdio interrupt handler */
1046 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
1047 struct irb *irb)
1049 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1050 struct subchannel_id schid;
1051 int cstat, dstat;
1053 if (!intparm || !irq_ptr) {
1054 ccw_device_get_schid(cdev, &schid);
1055 DBF_ERROR("qint:%4x", schid.sch_no);
1056 return;
1059 if (irq_ptr->perf_stat_enabled)
1060 irq_ptr->perf_stat.qdio_int++;
1062 if (IS_ERR(irb)) {
1063 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
1064 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1065 wake_up(&cdev->private->wait_q);
1066 return;
1068 qdio_irq_check_sense(irq_ptr, irb);
1069 cstat = irb->scsw.cmd.cstat;
1070 dstat = irb->scsw.cmd.dstat;
1072 switch (irq_ptr->state) {
1073 case QDIO_IRQ_STATE_INACTIVE:
1074 qdio_establish_handle_irq(cdev, cstat, dstat);
1075 break;
1076 case QDIO_IRQ_STATE_CLEANUP:
1077 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1078 break;
1079 case QDIO_IRQ_STATE_ESTABLISHED:
1080 case QDIO_IRQ_STATE_ACTIVE:
1081 if (cstat & SCHN_STAT_PCI) {
1082 qdio_int_handler_pci(irq_ptr);
1083 return;
1085 if (cstat || dstat)
1086 qdio_handle_activate_check(cdev, intparm, cstat,
1087 dstat);
1088 break;
1089 case QDIO_IRQ_STATE_STOPPED:
1090 break;
1091 default:
1092 WARN_ON_ONCE(1);
1094 wake_up(&cdev->private->wait_q);
1098 * qdio_get_ssqd_desc - get qdio subchannel description
1099 * @cdev: ccw device to get description for
1100 * @data: where to store the ssqd
1102 * Returns 0 or an error code. The results of the chsc are stored in the
1103 * specified structure.
1105 int qdio_get_ssqd_desc(struct ccw_device *cdev,
1106 struct qdio_ssqd_desc *data)
1108 struct subchannel_id schid;
1110 if (!cdev || !cdev->private)
1111 return -EINVAL;
1113 ccw_device_get_schid(cdev, &schid);
1114 DBF_EVENT("get ssqd:%4x", schid.sch_no);
1115 return qdio_setup_get_ssqd(NULL, &schid, data);
1117 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1119 static void qdio_shutdown_queues(struct ccw_device *cdev)
1121 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1122 struct qdio_q *q;
1123 int i;
1125 for_each_input_queue(irq_ptr, q, i)
1126 tasklet_kill(&q->tasklet);
1128 for_each_output_queue(irq_ptr, q, i) {
1129 del_timer_sync(&q->u.out.timer);
1130 tasklet_kill(&q->tasklet);
1135 * qdio_shutdown - shut down a qdio subchannel
1136 * @cdev: associated ccw device
1137 * @how: use halt or clear to shutdown
1139 int qdio_shutdown(struct ccw_device *cdev, int how)
1141 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1142 struct subchannel_id schid;
1143 int rc;
1145 if (!irq_ptr)
1146 return -ENODEV;
1148 WARN_ON_ONCE(irqs_disabled());
1149 ccw_device_get_schid(cdev, &schid);
1150 DBF_EVENT("qshutdown:%4x", schid.sch_no);
1152 mutex_lock(&irq_ptr->setup_mutex);
1154 * Subchannel was already shot down. We cannot prevent being called
1155 * twice since cio may trigger a shutdown asynchronously.
1157 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1158 mutex_unlock(&irq_ptr->setup_mutex);
1159 return 0;
1163 * Indicate that the device is going down. Scheduling the queue
1164 * tasklets is forbidden from here on.
1166 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1168 tiqdio_remove_input_queues(irq_ptr);
1169 qdio_shutdown_queues(cdev);
1170 qdio_shutdown_debug_entries(irq_ptr);
1172 /* cleanup subchannel */
1173 spin_lock_irq(get_ccwdev_lock(cdev));
1175 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1176 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1177 else
1178 /* default behaviour is halt */
1179 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1180 if (rc) {
1181 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1182 DBF_ERROR("rc:%4d", rc);
1183 goto no_cleanup;
1186 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1187 spin_unlock_irq(get_ccwdev_lock(cdev));
1188 wait_event_interruptible_timeout(cdev->private->wait_q,
1189 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1190 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1191 10 * HZ);
1192 spin_lock_irq(get_ccwdev_lock(cdev));
1194 no_cleanup:
1195 qdio_shutdown_thinint(irq_ptr);
1197 /* restore interrupt handler */
1198 if ((void *)cdev->handler == (void *)qdio_int_handler) {
1199 cdev->handler = irq_ptr->orig_handler;
1200 cdev->private->intparm = 0;
1202 spin_unlock_irq(get_ccwdev_lock(cdev));
1204 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1205 mutex_unlock(&irq_ptr->setup_mutex);
1206 if (rc)
1207 return rc;
1208 return 0;
1210 EXPORT_SYMBOL_GPL(qdio_shutdown);
1213 * qdio_free - free data structures for a qdio subchannel
1214 * @cdev: associated ccw device
1216 int qdio_free(struct ccw_device *cdev)
1218 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1219 struct subchannel_id schid;
1221 if (!irq_ptr)
1222 return -ENODEV;
1224 ccw_device_get_schid(cdev, &schid);
1225 DBF_EVENT("qfree:%4x", schid.sch_no);
1226 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
1227 mutex_lock(&irq_ptr->setup_mutex);
1229 irq_ptr->debug_area = NULL;
1230 cdev->private->qdio_data = NULL;
1231 mutex_unlock(&irq_ptr->setup_mutex);
1233 qdio_release_memory(irq_ptr);
1234 return 0;
1236 EXPORT_SYMBOL_GPL(qdio_free);
1239 * qdio_allocate - allocate qdio queues and associated data
1240 * @init_data: initialization data
1242 int qdio_allocate(struct qdio_initialize *init_data)
1244 struct subchannel_id schid;
1245 struct qdio_irq *irq_ptr;
1247 ccw_device_get_schid(init_data->cdev, &schid);
1248 DBF_EVENT("qallocate:%4x", schid.sch_no);
1250 if ((init_data->no_input_qs && !init_data->input_handler) ||
1251 (init_data->no_output_qs && !init_data->output_handler))
1252 return -EINVAL;
1254 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1255 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1256 return -EINVAL;
1258 if ((!init_data->input_sbal_addr_array) ||
1259 (!init_data->output_sbal_addr_array))
1260 return -EINVAL;
1262 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1263 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1264 if (!irq_ptr)
1265 goto out_err;
1267 mutex_init(&irq_ptr->setup_mutex);
1268 if (qdio_allocate_dbf(init_data, irq_ptr))
1269 goto out_rel;
1272 * Allocate a page for the chsc calls in qdio_establish.
1273 * Must be pre-allocated since a zfcp recovery will call
1274 * qdio_establish. In case of low memory and swap on a zfcp disk
1275 * we may not be able to allocate memory otherwise.
1277 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1278 if (!irq_ptr->chsc_page)
1279 goto out_rel;
1281 /* qdr is used in ccw1.cda which is u32 */
1282 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1283 if (!irq_ptr->qdr)
1284 goto out_rel;
1286 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1287 init_data->no_output_qs))
1288 goto out_rel;
1290 init_data->cdev->private->qdio_data = irq_ptr;
1291 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1292 return 0;
1293 out_rel:
1294 qdio_release_memory(irq_ptr);
1295 out_err:
1296 return -ENOMEM;
1298 EXPORT_SYMBOL_GPL(qdio_allocate);
1300 static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1302 struct qdio_q *q = irq_ptr->input_qs[0];
1303 int i, use_cq = 0;
1305 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1306 use_cq = 1;
1308 for_each_output_queue(irq_ptr, q, i) {
1309 if (use_cq) {
1310 if (qdio_enable_async_operation(&q->u.out) < 0) {
1311 use_cq = 0;
1312 continue;
1314 } else
1315 qdio_disable_async_operation(&q->u.out);
1317 DBF_EVENT("use_cq:%d", use_cq);
1321 * qdio_establish - establish queues on a qdio subchannel
1322 * @init_data: initialization data
1324 int qdio_establish(struct qdio_initialize *init_data)
1326 struct ccw_device *cdev = init_data->cdev;
1327 struct subchannel_id schid;
1328 struct qdio_irq *irq_ptr;
1329 int rc;
1331 ccw_device_get_schid(cdev, &schid);
1332 DBF_EVENT("qestablish:%4x", schid.sch_no);
1334 irq_ptr = cdev->private->qdio_data;
1335 if (!irq_ptr)
1336 return -ENODEV;
1338 mutex_lock(&irq_ptr->setup_mutex);
1339 qdio_setup_irq(init_data);
1341 rc = qdio_establish_thinint(irq_ptr);
1342 if (rc) {
1343 mutex_unlock(&irq_ptr->setup_mutex);
1344 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1345 return rc;
1348 /* establish q */
1349 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1350 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1351 irq_ptr->ccw.count = irq_ptr->equeue.count;
1352 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1354 spin_lock_irq(get_ccwdev_lock(cdev));
1355 ccw_device_set_options_mask(cdev, 0);
1357 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1358 spin_unlock_irq(get_ccwdev_lock(cdev));
1359 if (rc) {
1360 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1361 DBF_ERROR("rc:%4x", rc);
1362 mutex_unlock(&irq_ptr->setup_mutex);
1363 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1364 return rc;
1367 wait_event_interruptible_timeout(cdev->private->wait_q,
1368 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1369 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1371 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1372 mutex_unlock(&irq_ptr->setup_mutex);
1373 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1374 return -EIO;
1377 qdio_setup_ssqd_info(irq_ptr);
1379 qdio_detect_hsicq(irq_ptr);
1381 /* qebsm is now setup if available, initialize buffer states */
1382 qdio_init_buf_states(irq_ptr);
1384 mutex_unlock(&irq_ptr->setup_mutex);
1385 qdio_print_subchannel_info(irq_ptr, cdev);
1386 qdio_setup_debug_entries(irq_ptr, cdev);
1387 return 0;
1389 EXPORT_SYMBOL_GPL(qdio_establish);
1392 * qdio_activate - activate queues on a qdio subchannel
1393 * @cdev: associated cdev
1395 int qdio_activate(struct ccw_device *cdev)
1397 struct subchannel_id schid;
1398 struct qdio_irq *irq_ptr;
1399 int rc;
1401 ccw_device_get_schid(cdev, &schid);
1402 DBF_EVENT("qactivate:%4x", schid.sch_no);
1404 irq_ptr = cdev->private->qdio_data;
1405 if (!irq_ptr)
1406 return -ENODEV;
1408 mutex_lock(&irq_ptr->setup_mutex);
1409 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1410 rc = -EBUSY;
1411 goto out;
1414 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1415 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1416 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1417 irq_ptr->ccw.cda = 0;
1419 spin_lock_irq(get_ccwdev_lock(cdev));
1420 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1422 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1423 0, DOIO_DENY_PREFETCH);
1424 spin_unlock_irq(get_ccwdev_lock(cdev));
1425 if (rc) {
1426 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1427 DBF_ERROR("rc:%4x", rc);
1428 goto out;
1431 if (is_thinint_irq(irq_ptr))
1432 tiqdio_add_input_queues(irq_ptr);
1434 /* wait for subchannel to become active */
1435 msleep(5);
1437 switch (irq_ptr->state) {
1438 case QDIO_IRQ_STATE_STOPPED:
1439 case QDIO_IRQ_STATE_ERR:
1440 rc = -EIO;
1441 break;
1442 default:
1443 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1444 rc = 0;
1446 out:
1447 mutex_unlock(&irq_ptr->setup_mutex);
1448 return rc;
1450 EXPORT_SYMBOL_GPL(qdio_activate);
1452 static inline int buf_in_between(int bufnr, int start, int count)
1454 int end = add_buf(start, count);
1456 if (end > start) {
1457 if (bufnr >= start && bufnr < end)
1458 return 1;
1459 else
1460 return 0;
1463 /* wrap-around case */
1464 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1465 (bufnr < end))
1466 return 1;
1467 else
1468 return 0;
1472 * handle_inbound - reset processed input buffers
1473 * @q: queue containing the buffers
1474 * @callflags: flags
1475 * @bufnr: first buffer to process
1476 * @count: how many buffers are emptied
1478 static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1479 int bufnr, int count)
1481 int diff;
1483 qperf_inc(q, inbound_call);
1485 if (!q->u.in.polling)
1486 goto set;
1488 /* protect against stop polling setting an ACK for an emptied slsb */
1489 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1490 /* overwriting everything, just delete polling status */
1491 q->u.in.polling = 0;
1492 q->u.in.ack_count = 0;
1493 goto set;
1494 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1495 if (is_qebsm(q)) {
1496 /* partial overwrite, just update ack_start */
1497 diff = add_buf(bufnr, count);
1498 diff = sub_buf(diff, q->u.in.ack_start);
1499 q->u.in.ack_count -= diff;
1500 if (q->u.in.ack_count <= 0) {
1501 q->u.in.polling = 0;
1502 q->u.in.ack_count = 0;
1503 goto set;
1505 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1507 else
1508 /* the only ACK will be deleted, so stop polling */
1509 q->u.in.polling = 0;
1512 set:
1513 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1514 atomic_add(count, &q->nr_buf_used);
1516 if (need_siga_in(q))
1517 return qdio_siga_input(q);
1519 return 0;
1523 * handle_outbound - process filled outbound buffers
1524 * @q: queue containing the buffers
1525 * @callflags: flags
1526 * @bufnr: first buffer to process
1527 * @count: how many buffers are filled
1529 static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1530 int bufnr, int count)
1532 unsigned char state = 0;
1533 int used, rc = 0;
1535 qperf_inc(q, outbound_call);
1537 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1538 used = atomic_add_return(count, &q->nr_buf_used);
1540 if (used == QDIO_MAX_BUFFERS_PER_Q)
1541 qperf_inc(q, outbound_queue_full);
1543 if (callflags & QDIO_FLAG_PCI_OUT) {
1544 q->u.out.pci_out_enabled = 1;
1545 qperf_inc(q, pci_request_int);
1546 } else
1547 q->u.out.pci_out_enabled = 0;
1549 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1550 unsigned long phys_aob = 0;
1552 /* One SIGA-W per buffer required for unicast HSI */
1553 WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
1555 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1557 rc = qdio_kick_outbound_q(q, phys_aob);
1558 } else if (need_siga_sync(q)) {
1559 rc = qdio_siga_sync_q(q);
1560 } else {
1561 /* try to fast requeue buffers */
1562 get_buf_state(q, prev_buf(bufnr), &state, 0);
1563 if (state != SLSB_CU_OUTPUT_PRIMED)
1564 rc = qdio_kick_outbound_q(q, 0);
1565 else
1566 qperf_inc(q, fast_requeue);
1569 /* in case of SIGA errors we must process the error immediately */
1570 if (used >= q->u.out.scan_threshold || rc)
1571 qdio_tasklet_schedule(q);
1572 else
1573 /* free the SBALs in case of no further traffic */
1574 if (!timer_pending(&q->u.out.timer) &&
1575 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
1576 mod_timer(&q->u.out.timer, jiffies + HZ);
1577 return rc;
1581 * do_QDIO - process input or output buffers
1582 * @cdev: associated ccw_device for the qdio subchannel
1583 * @callflags: input or output and special flags from the program
1584 * @q_nr: queue number
1585 * @bufnr: buffer number
1586 * @count: how many buffers to process
1588 int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1589 int q_nr, unsigned int bufnr, unsigned int count)
1591 struct qdio_irq *irq_ptr;
1593 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1594 return -EINVAL;
1596 irq_ptr = cdev->private->qdio_data;
1597 if (!irq_ptr)
1598 return -ENODEV;
1600 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1601 "do%02x b:%02x c:%02x", callflags, bufnr, count);
1603 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1604 return -EIO;
1605 if (!count)
1606 return 0;
1607 if (callflags & QDIO_FLAG_SYNC_INPUT)
1608 return handle_inbound(irq_ptr->input_qs[q_nr],
1609 callflags, bufnr, count);
1610 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1611 return handle_outbound(irq_ptr->output_qs[q_nr],
1612 callflags, bufnr, count);
1613 return -EINVAL;
1615 EXPORT_SYMBOL_GPL(do_QDIO);
1618 * qdio_start_irq - process input buffers
1619 * @cdev: associated ccw_device for the qdio subchannel
1620 * @nr: input queue number
1622 * Return codes
1623 * 0 - success
1624 * 1 - irqs not started since new data is available
1626 int qdio_start_irq(struct ccw_device *cdev, int nr)
1628 struct qdio_q *q;
1629 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1631 if (!irq_ptr)
1632 return -ENODEV;
1633 q = irq_ptr->input_qs[nr];
1635 clear_nonshared_ind(irq_ptr);
1636 qdio_stop_polling(q);
1637 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1640 * We need to check again to not lose initiative after
1641 * resetting the ACK state.
1643 if (test_nonshared_ind(irq_ptr))
1644 goto rescan;
1645 if (!qdio_inbound_q_done(q))
1646 goto rescan;
1647 return 0;
1649 rescan:
1650 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1651 &q->u.in.queue_irq_state))
1652 return 0;
1653 else
1654 return 1;
1657 EXPORT_SYMBOL(qdio_start_irq);
1660 * qdio_get_next_buffers - process input buffers
1661 * @cdev: associated ccw_device for the qdio subchannel
1662 * @nr: input queue number
1663 * @bufnr: first filled buffer number
1664 * @error: buffers are in error state
1666 * Return codes
1667 * < 0 - error
1668 * = 0 - no new buffers found
1669 * > 0 - number of processed buffers
1671 int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1672 int *error)
1674 struct qdio_q *q;
1675 int start, end;
1676 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1678 if (!irq_ptr)
1679 return -ENODEV;
1680 q = irq_ptr->input_qs[nr];
1683 * Cannot rely on automatic sync after interrupt since queues may
1684 * also be examined without interrupt.
1686 if (need_siga_sync(q))
1687 qdio_sync_queues(q);
1689 /* check the PCI capable outbound queues. */
1690 qdio_check_outbound_after_thinint(q);
1692 if (!qdio_inbound_q_moved(q))
1693 return 0;
1695 /* Note: upper-layer MUST stop processing immediately here ... */
1696 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1697 return -EIO;
1699 start = q->first_to_kick;
1700 end = q->first_to_check;
1701 *bufnr = start;
1702 *error = q->qdio_error;
1704 /* for the next time */
1705 q->first_to_kick = end;
1706 q->qdio_error = 0;
1707 return sub_buf(end, start);
1709 EXPORT_SYMBOL(qdio_get_next_buffers);
1712 * qdio_stop_irq - disable interrupt processing for the device
1713 * @cdev: associated ccw_device for the qdio subchannel
1714 * @nr: input queue number
1716 * Return codes
1717 * 0 - interrupts were already disabled
1718 * 1 - interrupts successfully disabled
1720 int qdio_stop_irq(struct ccw_device *cdev, int nr)
1722 struct qdio_q *q;
1723 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1725 if (!irq_ptr)
1726 return -ENODEV;
1727 q = irq_ptr->input_qs[nr];
1729 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1730 &q->u.in.queue_irq_state))
1731 return 0;
1732 else
1733 return 1;
1735 EXPORT_SYMBOL(qdio_stop_irq);
1738 * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info.
1739 * @schid: Subchannel ID.
1740 * @cnc: Boolean Change-Notification Control
1741 * @response: Response code will be stored at this address
1742 * @cb: Callback function will be executed for each element
1743 * of the address list
1744 * @priv: Pointer to pass to the callback function.
1746 * Performs "Store-network-bridging-information list" operation and calls
1747 * the callback function for every entry in the list. If "change-
1748 * notification-control" is set, further changes in the address list
1749 * will be reported via the IPA command.
1751 int qdio_pnso_brinfo(struct subchannel_id schid,
1752 int cnc, u16 *response,
1753 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
1754 void *entry),
1755 void *priv)
1757 struct chsc_pnso_area *rr;
1758 int rc;
1759 u32 prev_instance = 0;
1760 int isfirstblock = 1;
1761 int i, size, elems;
1763 rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
1764 if (rr == NULL)
1765 return -ENOMEM;
1766 do {
1767 /* on the first iteration, naihdr.resume_token will be zero */
1768 rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
1769 if (rc != 0 && rc != -EBUSY)
1770 goto out;
1771 if (rr->response.code != 1) {
1772 rc = -EIO;
1773 continue;
1774 } else
1775 rc = 0;
1777 if (cb == NULL)
1778 continue;
1780 size = rr->naihdr.naids;
1781 elems = (rr->response.length -
1782 sizeof(struct chsc_header) -
1783 sizeof(struct chsc_brinfo_naihdr)) /
1784 size;
1786 if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
1787 /* Inform the caller that they need to scrap */
1788 /* the data that was already reported via cb */
1789 rc = -EAGAIN;
1790 break;
1792 isfirstblock = 0;
1793 prev_instance = rr->naihdr.instance;
1794 for (i = 0; i < elems; i++)
1795 switch (size) {
1796 case sizeof(struct qdio_brinfo_entry_l3_ipv6):
1797 (*cb)(priv, l3_ipv6_addr,
1798 &rr->entries.l3_ipv6[i]);
1799 break;
1800 case sizeof(struct qdio_brinfo_entry_l3_ipv4):
1801 (*cb)(priv, l3_ipv4_addr,
1802 &rr->entries.l3_ipv4[i]);
1803 break;
1804 case sizeof(struct qdio_brinfo_entry_l2):
1805 (*cb)(priv, l2_addr_lnid,
1806 &rr->entries.l2[i]);
1807 break;
1808 default:
1809 WARN_ON_ONCE(1);
1810 rc = -EIO;
1811 goto out;
1813 } while (rr->response.code == 0x0107 || /* channel busy */
1814 (rr->response.code == 1 && /* list stored */
1815 /* resume token is non-zero => list incomplete */
1816 (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
1817 (*response) = rr->response.code;
1819 out:
1820 free_page((unsigned long)rr);
1821 return rc;
1823 EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
1825 static int __init init_QDIO(void)
1827 int rc;
1829 rc = qdio_debug_init();
1830 if (rc)
1831 return rc;
1832 rc = qdio_setup_init();
1833 if (rc)
1834 goto out_debug;
1835 rc = tiqdio_allocate_memory();
1836 if (rc)
1837 goto out_cache;
1838 rc = tiqdio_register_thinints();
1839 if (rc)
1840 goto out_ti;
1841 return 0;
1843 out_ti:
1844 tiqdio_free_memory();
1845 out_cache:
1846 qdio_setup_exit();
1847 out_debug:
1848 qdio_debug_exit();
1849 return rc;
1852 static void __exit exit_QDIO(void)
1854 tiqdio_unregister_thinints();
1855 tiqdio_free_memory();
1856 qdio_setup_exit();
1857 qdio_debug_exit();
1860 module_init(init_QDIO);
1861 module_exit(exit_QDIO);