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Linux 5.1.15
[linux/fpc-iii.git] / drivers / scsi / esas2r / esas2r_init.c
blob950cd92df2ffd7ac6da9555589c3141c2bd230d5
1 /*
2 * linux/drivers/scsi/esas2r/esas2r_init.c
3 * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers
4 *
5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
6 * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * NO WARRANTY
19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23 * solely responsible for determining the appropriateness of using and
24 * distributing the Program and assumes all risks associated with its
25 * exercise of rights under this Agreement, including but not limited to
26 * the risks and costs of program errors, damage to or loss of data,
27 * programs or equipment, and unavailability or interruption of operations.
28 *
29 * DISCLAIMER OF LIABILITY
30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37 *
38 * You should have received a copy of the GNU General Public License
39 * along with this program; if not, write to the Free Software
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41 * USA.
42 */
43
44 #include "esas2r.h"
45
46 static bool esas2r_initmem_alloc(struct esas2r_adapter *a,
47 struct esas2r_mem_desc *mem_desc,
48 u32 align)
49 {
50 mem_desc->esas2r_param = mem_desc->size + align;
51 mem_desc->virt_addr = NULL;
52 mem_desc->phys_addr = 0;
53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev,
54 (size_t)mem_desc->
55 esas2r_param,
56 (dma_addr_t *)&mem_desc->
57 phys_addr,
58 GFP_KERNEL);
59
60 if (mem_desc->esas2r_data == NULL) {
61 esas2r_log(ESAS2R_LOG_CRIT,
62 "failed to allocate %lu bytes of consistent memory!",
63 (long
64 unsigned
65 int)mem_desc->esas2r_param);
66 return false;
67 }
68
69 mem_desc->virt_addr = PTR_ALIGN(mem_desc->esas2r_data, align);
70 mem_desc->phys_addr = ALIGN(mem_desc->phys_addr, align);
71 memset(mem_desc->virt_addr, 0, mem_desc->size);
72 return true;
73 }
74
75 static void esas2r_initmem_free(struct esas2r_adapter *a,
76 struct esas2r_mem_desc *mem_desc)
77 {
78 if (mem_desc->virt_addr == NULL)
79 return;
80
81 /*
82 * Careful! phys_addr and virt_addr may have been adjusted from the
83 * original allocation in order to return the desired alignment. That
84 * means we have to use the original address (in esas2r_data) and size
85 * (esas2r_param) and calculate the original physical address based on
86 * the difference between the requested and actual allocation size.
87 */
88 if (mem_desc->phys_addr) {
89 int unalign = ((u8 *)mem_desc->virt_addr) -
90 ((u8 *)mem_desc->esas2r_data);
91
92 dma_free_coherent(&a->pcid->dev,
93 (size_t)mem_desc->esas2r_param,
94 mem_desc->esas2r_data,
95 (dma_addr_t)(mem_desc->phys_addr - unalign));
96 } else {
97 kfree(mem_desc->esas2r_data);
98 }
99
100 mem_desc->virt_addr = NULL;
101 }
102
103 static bool alloc_vda_req(struct esas2r_adapter *a,
104 struct esas2r_request *rq)
105 {
106 struct esas2r_mem_desc *memdesc = kzalloc(
107 sizeof(struct esas2r_mem_desc), GFP_KERNEL);
108
109 if (memdesc == NULL) {
110 esas2r_hdebug("could not alloc mem for vda request memdesc\n");
111 return false;
112 }
113
114 memdesc->size = sizeof(union atto_vda_req) +
115 ESAS2R_DATA_BUF_LEN;
116
117 if (!esas2r_initmem_alloc(a, memdesc, 256)) {
118 esas2r_hdebug("could not alloc mem for vda request\n");
119 kfree(memdesc);
120 return false;
121 }
122
123 a->num_vrqs++;
124 list_add(&memdesc->next_desc, &a->vrq_mds_head);
125
126 rq->vrq_md = memdesc;
127 rq->vrq = (union atto_vda_req *)memdesc->virt_addr;
128 rq->vrq->scsi.handle = a->num_vrqs;
129
130 return true;
131 }
132
133 static void esas2r_unmap_regions(struct esas2r_adapter *a)
134 {
135 if (a->regs)
136 iounmap((void __iomem *)a->regs);
137
138 a->regs = NULL;
139
140 pci_release_region(a->pcid, 2);
141
142 if (a->data_window)
143 iounmap((void __iomem *)a->data_window);
144
145 a->data_window = NULL;
146
147 pci_release_region(a->pcid, 0);
148 }
149
150 static int esas2r_map_regions(struct esas2r_adapter *a)
151 {
152 int error;
153
154 a->regs = NULL;
155 a->data_window = NULL;
156
157 error = pci_request_region(a->pcid, 2, a->name);
158 if (error != 0) {
159 esas2r_log(ESAS2R_LOG_CRIT,
160 "pci_request_region(2) failed, error %d",
161 error);
162
163 return error;
164 }
165
166 a->regs = (void __force *)ioremap(pci_resource_start(a->pcid, 2),
167 pci_resource_len(a->pcid, 2));
168 if (a->regs == NULL) {
169 esas2r_log(ESAS2R_LOG_CRIT,
170 "ioremap failed for regs mem region\n");
171 pci_release_region(a->pcid, 2);
172 return -EFAULT;
173 }
174
175 error = pci_request_region(a->pcid, 0, a->name);
176 if (error != 0) {
177 esas2r_log(ESAS2R_LOG_CRIT,
178 "pci_request_region(2) failed, error %d",
179 error);
180 esas2r_unmap_regions(a);
181 return error;
182 }
183
184 a->data_window = (void __force *)ioremap(pci_resource_start(a->pcid,
185 0),
186 pci_resource_len(a->pcid, 0));
187 if (a->data_window == NULL) {
188 esas2r_log(ESAS2R_LOG_CRIT,
189 "ioremap failed for data_window mem region\n");
190 esas2r_unmap_regions(a);
191 return -EFAULT;
192 }
193
194 return 0;
195 }
196
197 static void esas2r_setup_interrupts(struct esas2r_adapter *a, int intr_mode)
198 {
199 int i;
200
201 /* Set up interrupt mode based on the requested value */
202 switch (intr_mode) {
203 case INTR_MODE_LEGACY:
204 use_legacy_interrupts:
205 a->intr_mode = INTR_MODE_LEGACY;
206 break;
207
208 case INTR_MODE_MSI:
209 i = pci_enable_msi(a->pcid);
210 if (i != 0) {
211 esas2r_log(ESAS2R_LOG_WARN,
212 "failed to enable MSI for adapter %d, "
213 "falling back to legacy interrupts "
214 "(err=%d)", a->index,
215 i);
216 goto use_legacy_interrupts;
217 }
218 a->intr_mode = INTR_MODE_MSI;
219 set_bit(AF2_MSI_ENABLED, &a->flags2);
220 break;
221
222
223 default:
224 esas2r_log(ESAS2R_LOG_WARN,
225 "unknown interrupt_mode %d requested, "
226 "falling back to legacy interrupt",
227 interrupt_mode);
228 goto use_legacy_interrupts;
229 }
230 }
231
232 static void esas2r_claim_interrupts(struct esas2r_adapter *a)
233 {
234 unsigned long flags = 0;
235
236 if (a->intr_mode == INTR_MODE_LEGACY)
237 flags |= IRQF_SHARED;
238
239 esas2r_log(ESAS2R_LOG_INFO,
240 "esas2r_claim_interrupts irq=%d (%p, %s, %lx)",
241 a->pcid->irq, a, a->name, flags);
242
243 if (request_irq(a->pcid->irq,
244 (a->intr_mode ==
245 INTR_MODE_LEGACY) ? esas2r_interrupt :
246 esas2r_msi_interrupt,
247 flags,
248 a->name,
249 a)) {
250 esas2r_log(ESAS2R_LOG_CRIT, "unable to request IRQ %02X",
251 a->pcid->irq);
252 return;
253 }
254
255 set_bit(AF2_IRQ_CLAIMED, &a->flags2);
256 esas2r_log(ESAS2R_LOG_INFO,
257 "claimed IRQ %d flags: 0x%lx",
258 a->pcid->irq, flags);
259 }
260
261 int esas2r_init_adapter(struct Scsi_Host *host, struct pci_dev *pcid,
262 int index)
263 {
264 struct esas2r_adapter *a;
265 u64 bus_addr = 0;
266 int i;
267 void *next_uncached;
268 struct esas2r_request *first_request, *last_request;
269 bool dma64 = false;
270
271 if (index >= MAX_ADAPTERS) {
272 esas2r_log(ESAS2R_LOG_CRIT,
273 "tried to init invalid adapter index %u!",
274 index);
275 return 0;
276 }
277
278 if (esas2r_adapters[index]) {
279 esas2r_log(ESAS2R_LOG_CRIT,
280 "tried to init existing adapter index %u!",
281 index);
282 return 0;
283 }
284
285 a = (struct esas2r_adapter *)host->hostdata;
286 memset(a, 0, sizeof(struct esas2r_adapter));
287 a->pcid = pcid;
288 a->host = host;
289
290 if (sizeof(dma_addr_t) > 4 &&
291 dma_get_required_mask(&pcid->dev) > DMA_BIT_MASK(32) &&
292 !dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(64)))
293 dma64 = true;
294
295 if (!dma64 && dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(32))) {
296 esas2r_log(ESAS2R_LOG_CRIT, "failed to set DMA mask");
297 esas2r_kill_adapter(index);
298 return 0;
299 }
300
301 esas2r_log_dev(ESAS2R_LOG_INFO, &pcid->dev,
302 "%s-bit PCI addressing enabled\n", dma64 ? "64" : "32");
303
304 esas2r_adapters[index] = a;
305 sprintf(a->name, ESAS2R_DRVR_NAME "_%02d", index);
306 esas2r_debug("new adapter %p, name %s", a, a->name);
307 spin_lock_init(&a->request_lock);
308 spin_lock_init(&a->fw_event_lock);
309 mutex_init(&a->fm_api_mutex);
310 mutex_init(&a->fs_api_mutex);
311 sema_init(&a->nvram_semaphore, 1);
312
313 esas2r_fw_event_off(a);
314 snprintf(a->fw_event_q_name, ESAS2R_KOBJ_NAME_LEN, "esas2r/%d",
315 a->index);
316 a->fw_event_q = create_singlethread_workqueue(a->fw_event_q_name);
317
318 init_waitqueue_head(&a->buffered_ioctl_waiter);
319 init_waitqueue_head(&a->nvram_waiter);
320 init_waitqueue_head(&a->fm_api_waiter);
321 init_waitqueue_head(&a->fs_api_waiter);
322 init_waitqueue_head(&a->vda_waiter);
323
324 INIT_LIST_HEAD(&a->general_req.req_list);
325 INIT_LIST_HEAD(&a->active_list);
326 INIT_LIST_HEAD(&a->defer_list);
327 INIT_LIST_HEAD(&a->free_sg_list_head);
328 INIT_LIST_HEAD(&a->avail_request);
329 INIT_LIST_HEAD(&a->vrq_mds_head);
330 INIT_LIST_HEAD(&a->fw_event_list);
331
332 first_request = (struct esas2r_request *)((u8 *)(a + 1));
333
334 for (last_request = first_request, i = 1; i < num_requests;
335 last_request++, i++) {
336 INIT_LIST_HEAD(&last_request->req_list);
337 list_add_tail(&last_request->comp_list, &a->avail_request);
338 if (!alloc_vda_req(a, last_request)) {
339 esas2r_log(ESAS2R_LOG_CRIT,
340 "failed to allocate a VDA request!");
341 esas2r_kill_adapter(index);
342 return 0;
343 }
344 }
345
346 esas2r_debug("requests: %p to %p (%d, %d)", first_request,
347 last_request,
348 sizeof(*first_request),
349 num_requests);
350
351 if (esas2r_map_regions(a) != 0) {
352 esas2r_log(ESAS2R_LOG_CRIT, "could not map PCI regions!");
353 esas2r_kill_adapter(index);
354 return 0;
355 }
356
357 a->index = index;
358
359 /* interrupts will be disabled until we are done with init */
360 atomic_inc(&a->dis_ints_cnt);
361 atomic_inc(&a->disable_cnt);
362 set_bit(AF_CHPRST_PENDING, &a->flags);
363 set_bit(AF_DISC_PENDING, &a->flags);
364 set_bit(AF_FIRST_INIT, &a->flags);
365 set_bit(AF_LEGACY_SGE_MODE, &a->flags);
366
367 a->init_msg = ESAS2R_INIT_MSG_START;
368 a->max_vdareq_size = 128;
369 a->build_sgl = esas2r_build_sg_list_sge;
370
371 esas2r_setup_interrupts(a, interrupt_mode);
372
373 a->uncached_size = esas2r_get_uncached_size(a);
374 a->uncached = dma_alloc_coherent(&pcid->dev,
375 (size_t)a->uncached_size,
376 (dma_addr_t *)&bus_addr,
377 GFP_KERNEL);
378 if (a->uncached == NULL) {
379 esas2r_log(ESAS2R_LOG_CRIT,
380 "failed to allocate %d bytes of consistent memory!",
381 a->uncached_size);
382 esas2r_kill_adapter(index);
383 return 0;
384 }
385
386 a->uncached_phys = bus_addr;
387
388 esas2r_debug("%d bytes uncached memory allocated @ %p (%x:%x)",
389 a->uncached_size,
390 a->uncached,
391 upper_32_bits(bus_addr),
392 lower_32_bits(bus_addr));
393 memset(a->uncached, 0, a->uncached_size);
394 next_uncached = a->uncached;
395
396 if (!esas2r_init_adapter_struct(a,
397 &next_uncached)) {
398 esas2r_log(ESAS2R_LOG_CRIT,
399 "failed to initialize adapter structure (2)!");
400 esas2r_kill_adapter(index);
401 return 0;
402 }
403
404 tasklet_init(&a->tasklet,
405 esas2r_adapter_tasklet,
406 (unsigned long)a);
407
408 /*
409 * Disable chip interrupts to prevent spurious interrupts
410 * until we claim the IRQ.
411 */
412 esas2r_disable_chip_interrupts(a);
413 esas2r_check_adapter(a);
414
415 if (!esas2r_init_adapter_hw(a, true))
416 esas2r_log(ESAS2R_LOG_CRIT, "failed to initialize hardware!");
417 else
418 esas2r_debug("esas2r_init_adapter ok");
419
420 esas2r_claim_interrupts(a);
421
422 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2))
423 esas2r_enable_chip_interrupts(a);
424
425 set_bit(AF2_INIT_DONE, &a->flags2);
426 if (!test_bit(AF_DEGRADED_MODE, &a->flags))
427 esas2r_kickoff_timer(a);
428 esas2r_debug("esas2r_init_adapter done for %p (%d)",
429 a, a->disable_cnt);
430
431 return 1;
432 }
433
434 static void esas2r_adapter_power_down(struct esas2r_adapter *a,
435 int power_management)
436 {
437 struct esas2r_mem_desc *memdesc, *next;
438
439 if ((test_bit(AF2_INIT_DONE, &a->flags2))
440 && (!test_bit(AF_DEGRADED_MODE, &a->flags))) {
441 if (!power_management) {
442 del_timer_sync(&a->timer);
443 tasklet_kill(&a->tasklet);
444 }
445 esas2r_power_down(a);
446
447 /*
448 * There are versions of firmware that do not handle the sync
449 * cache command correctly. Stall here to ensure that the
450 * cache is lazily flushed.
451 */
452 mdelay(500);
453 esas2r_debug("chip halted");
454 }
455
456 /* Remove sysfs binary files */
457 if (a->sysfs_fw_created) {
458 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fw);
459 a->sysfs_fw_created = 0;
460 }
461
462 if (a->sysfs_fs_created) {
463 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fs);
464 a->sysfs_fs_created = 0;
465 }
466
467 if (a->sysfs_vda_created) {
468 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_vda);
469 a->sysfs_vda_created = 0;
470 }
471
472 if (a->sysfs_hw_created) {
473 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_hw);
474 a->sysfs_hw_created = 0;
475 }
476
477 if (a->sysfs_live_nvram_created) {
478 sysfs_remove_bin_file(&a->host->shost_dev.kobj,
479 &bin_attr_live_nvram);
480 a->sysfs_live_nvram_created = 0;
481 }
482
483 if (a->sysfs_default_nvram_created) {
484 sysfs_remove_bin_file(&a->host->shost_dev.kobj,
485 &bin_attr_default_nvram);
486 a->sysfs_default_nvram_created = 0;
487 }
488
489 /* Clean up interrupts */
490 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) {
491 esas2r_log_dev(ESAS2R_LOG_INFO,
492 &(a->pcid->dev),
493 "free_irq(%d) called", a->pcid->irq);
494
495 free_irq(a->pcid->irq, a);
496 esas2r_debug("IRQ released");
497 clear_bit(AF2_IRQ_CLAIMED, &a->flags2);
498 }
499
500 if (test_bit(AF2_MSI_ENABLED, &a->flags2)) {
501 pci_disable_msi(a->pcid);
502 clear_bit(AF2_MSI_ENABLED, &a->flags2);
503 esas2r_debug("MSI disabled");
504 }
505
506 if (a->inbound_list_md.virt_addr)
507 esas2r_initmem_free(a, &a->inbound_list_md);
508
509 if (a->outbound_list_md.virt_addr)
510 esas2r_initmem_free(a, &a->outbound_list_md);
511
512 list_for_each_entry_safe(memdesc, next, &a->free_sg_list_head,
513 next_desc) {
514 esas2r_initmem_free(a, memdesc);
515 }
516
517 /* Following frees everything allocated via alloc_vda_req */
518 list_for_each_entry_safe(memdesc, next, &a->vrq_mds_head, next_desc) {
519 esas2r_initmem_free(a, memdesc);
520 list_del(&memdesc->next_desc);
521 kfree(memdesc);
522 }
523
524 kfree(a->first_ae_req);
525 a->first_ae_req = NULL;
526
527 kfree(a->sg_list_mds);
528 a->sg_list_mds = NULL;
529
530 kfree(a->req_table);
531 a->req_table = NULL;
532
533 if (a->regs) {
534 esas2r_unmap_regions(a);
535 a->regs = NULL;
536 a->data_window = NULL;
537 esas2r_debug("regions unmapped");
538 }
539 }
540
541 /* Release/free allocated resources for specified adapters. */
542 void esas2r_kill_adapter(int i)
543 {
544 struct esas2r_adapter *a = esas2r_adapters[i];
545
546 if (a) {
547 unsigned long flags;
548 struct workqueue_struct *wq;
549 esas2r_debug("killing adapter %p [%d] ", a, i);
550 esas2r_fw_event_off(a);
551 esas2r_adapter_power_down(a, 0);
552 if (esas2r_buffered_ioctl &&
553 (a->pcid == esas2r_buffered_ioctl_pcid)) {
554 dma_free_coherent(&a->pcid->dev,
555 (size_t)esas2r_buffered_ioctl_size,
556 esas2r_buffered_ioctl,
557 esas2r_buffered_ioctl_addr);
558 esas2r_buffered_ioctl = NULL;
559 }
560
561 if (a->vda_buffer) {
562 dma_free_coherent(&a->pcid->dev,
563 (size_t)VDA_MAX_BUFFER_SIZE,
564 a->vda_buffer,
565 (dma_addr_t)a->ppvda_buffer);
566 a->vda_buffer = NULL;
567 }
568 if (a->fs_api_buffer) {
569 dma_free_coherent(&a->pcid->dev,
570 (size_t)a->fs_api_buffer_size,
571 a->fs_api_buffer,
572 (dma_addr_t)a->ppfs_api_buffer);
573 a->fs_api_buffer = NULL;
574 }
575
576 kfree(a->local_atto_ioctl);
577 a->local_atto_ioctl = NULL;
578
579 spin_lock_irqsave(&a->fw_event_lock, flags);
580 wq = a->fw_event_q;
581 a->fw_event_q = NULL;
582 spin_unlock_irqrestore(&a->fw_event_lock, flags);
583 if (wq)
584 destroy_workqueue(wq);
585
586 if (a->uncached) {
587 dma_free_coherent(&a->pcid->dev,
588 (size_t)a->uncached_size,
589 a->uncached,
590 (dma_addr_t)a->uncached_phys);
591 a->uncached = NULL;
592 esas2r_debug("uncached area freed");
593 }
594
595 esas2r_log_dev(ESAS2R_LOG_INFO,
596 &(a->pcid->dev),
597 "pci_disable_device() called. msix_enabled: %d "
598 "msi_enabled: %d irq: %d pin: %d",
599 a->pcid->msix_enabled,
600 a->pcid->msi_enabled,
601 a->pcid->irq,
602 a->pcid->pin);
603
604 esas2r_log_dev(ESAS2R_LOG_INFO,
605 &(a->pcid->dev),
606 "before pci_disable_device() enable_cnt: %d",
607 a->pcid->enable_cnt.counter);
608
609 pci_disable_device(a->pcid);
610 esas2r_log_dev(ESAS2R_LOG_INFO,
611 &(a->pcid->dev),
612 "after pci_disable_device() enable_cnt: %d",
613 a->pcid->enable_cnt.counter);
614
615 esas2r_log_dev(ESAS2R_LOG_INFO,
616 &(a->pcid->dev),
617 "pci_set_drv_data(%p, NULL) called",
618 a->pcid);
619
620 pci_set_drvdata(a->pcid, NULL);
621 esas2r_adapters[i] = NULL;
622
623 if (test_bit(AF2_INIT_DONE, &a->flags2)) {
624 clear_bit(AF2_INIT_DONE, &a->flags2);
625
626 set_bit(AF_DEGRADED_MODE, &a->flags);
627
628 esas2r_log_dev(ESAS2R_LOG_INFO,
629 &(a->host->shost_gendev),
630 "scsi_remove_host() called");
631
632 scsi_remove_host(a->host);
633
634 esas2r_log_dev(ESAS2R_LOG_INFO,
635 &(a->host->shost_gendev),
636 "scsi_host_put() called");
637
638 scsi_host_put(a->host);
639 }
640 }
641 }
642
643 int esas2r_suspend(struct pci_dev *pdev, pm_message_t state)
644 {
645 struct Scsi_Host *host = pci_get_drvdata(pdev);
646 u32 device_state;
647 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata;
648
649 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "suspending adapter()");
650 if (!a)
651 return -ENODEV;
652
653 esas2r_adapter_power_down(a, 1);
654 device_state = pci_choose_state(pdev, state);
655 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
656 "pci_save_state() called");
657 pci_save_state(pdev);
658 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
659 "pci_disable_device() called");
660 pci_disable_device(pdev);
661 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
662 "pci_set_power_state() called");
663 pci_set_power_state(pdev, device_state);
664 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "esas2r_suspend(): 0");
665 return 0;
666 }
667
668 int esas2r_resume(struct pci_dev *pdev)
669 {
670 struct Scsi_Host *host = pci_get_drvdata(pdev);
671 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata;
672 int rez;
673
674 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "resuming adapter()");
675 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
676 "pci_set_power_state(PCI_D0) "
677 "called");
678 pci_set_power_state(pdev, PCI_D0);
679 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
680 "pci_enable_wake(PCI_D0, 0) "
681 "called");
682 pci_enable_wake(pdev, PCI_D0, 0);
683 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
684 "pci_restore_state() called");
685 pci_restore_state(pdev);
686 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
687 "pci_enable_device() called");
688 rez = pci_enable_device(pdev);
689 pci_set_master(pdev);
690
691 if (!a) {
692 rez = -ENODEV;
693 goto error_exit;
694 }
695
696 if (esas2r_map_regions(a) != 0) {
697 esas2r_log(ESAS2R_LOG_CRIT, "could not re-map PCI regions!");
698 rez = -ENOMEM;
699 goto error_exit;
700 }
701
702 /* Set up interupt mode */
703 esas2r_setup_interrupts(a, a->intr_mode);
704
705 /*
706 * Disable chip interrupts to prevent spurious interrupts until we
707 * claim the IRQ.
708 */
709 esas2r_disable_chip_interrupts(a);
710 if (!esas2r_power_up(a, true)) {
711 esas2r_debug("yikes, esas2r_power_up failed");
712 rez = -ENOMEM;
713 goto error_exit;
714 }
715
716 esas2r_claim_interrupts(a);
717
718 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) {
719 /*
720 * Now that system interrupt(s) are claimed, we can enable
721 * chip interrupts.
722 */
723 esas2r_enable_chip_interrupts(a);
724 esas2r_kickoff_timer(a);
725 } else {
726 esas2r_debug("yikes, unable to claim IRQ");
727 esas2r_log(ESAS2R_LOG_CRIT, "could not re-claim IRQ!");
728 rez = -ENOMEM;
729 goto error_exit;
730 }
731
732 error_exit:
733 esas2r_log_dev(ESAS2R_LOG_CRIT, &(pdev->dev), "esas2r_resume(): %d",
734 rez);
735 return rez;
736 }
737
738 bool esas2r_set_degraded_mode(struct esas2r_adapter *a, char *error_str)
739 {
740 set_bit(AF_DEGRADED_MODE, &a->flags);
741 esas2r_log(ESAS2R_LOG_CRIT,
742 "setting adapter to degraded mode: %s\n", error_str);
743 return false;
744 }
745
746 u32 esas2r_get_uncached_size(struct esas2r_adapter *a)
747 {
748 return sizeof(struct esas2r_sas_nvram)
749 + ALIGN(ESAS2R_DISC_BUF_LEN, 8)
750 + ALIGN(sizeof(u32), 8) /* outbound list copy pointer */
751 + 8
752 + (num_sg_lists * (u16)sgl_page_size)
753 + ALIGN((num_requests + num_ae_requests + 1 +
754 ESAS2R_LIST_EXTRA) *
755 sizeof(struct esas2r_inbound_list_source_entry),
756 8)
757 + ALIGN((num_requests + num_ae_requests + 1 +
758 ESAS2R_LIST_EXTRA) *
759 sizeof(struct atto_vda_ob_rsp), 8)
760 + 256; /* VDA request and buffer align */
761 }
762
763 static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a)
764 {
765 int pcie_cap_reg;
766
767 pcie_cap_reg = pci_find_capability(a->pcid, PCI_CAP_ID_EXP);
768 if (pcie_cap_reg) {
769 u16 devcontrol;
770
771 pci_read_config_word(a->pcid, pcie_cap_reg + PCI_EXP_DEVCTL,
772 &devcontrol);
773
774 if ((devcontrol & PCI_EXP_DEVCTL_READRQ) >
775 PCI_EXP_DEVCTL_READRQ_512B) {
776 esas2r_log(ESAS2R_LOG_INFO,
777 "max read request size > 512B");
778
779 devcontrol &= ~PCI_EXP_DEVCTL_READRQ;
780 devcontrol |= PCI_EXP_DEVCTL_READRQ_512B;
781 pci_write_config_word(a->pcid,
782 pcie_cap_reg + PCI_EXP_DEVCTL,
783 devcontrol);
784 }
785 }
786 }
787
788 /*
789 * Determine the organization of the uncached data area and
790 * finish initializing the adapter structure
791 */
792 bool esas2r_init_adapter_struct(struct esas2r_adapter *a,
793 void **uncached_area)
794 {
795 u32 i;
796 u8 *high;
797 struct esas2r_inbound_list_source_entry *element;
798 struct esas2r_request *rq;
799 struct esas2r_mem_desc *sgl;
800
801 spin_lock_init(&a->sg_list_lock);
802 spin_lock_init(&a->mem_lock);
803 spin_lock_init(&a->queue_lock);
804
805 a->targetdb_end = &a->targetdb[ESAS2R_MAX_TARGETS];
806
807 if (!alloc_vda_req(a, &a->general_req)) {
808 esas2r_hdebug(
809 "failed to allocate a VDA request for the general req!");
810 return false;
811 }
812
813 /* allocate requests for asynchronous events */
814 a->first_ae_req =
815 kcalloc(num_ae_requests, sizeof(struct esas2r_request),
816 GFP_KERNEL);
817
818 if (a->first_ae_req == NULL) {
819 esas2r_log(ESAS2R_LOG_CRIT,
820 "failed to allocate memory for asynchronous events");
821 return false;
822 }
823
824 /* allocate the S/G list memory descriptors */
825 a->sg_list_mds = kcalloc(num_sg_lists, sizeof(struct esas2r_mem_desc),
826 GFP_KERNEL);
827
828 if (a->sg_list_mds == NULL) {
829 esas2r_log(ESAS2R_LOG_CRIT,
830 "failed to allocate memory for s/g list descriptors");
831 return false;
832 }
833
834 /* allocate the request table */
835 a->req_table =
836 kcalloc(num_requests + num_ae_requests + 1,
837 sizeof(struct esas2r_request *),
838 GFP_KERNEL);
839
840 if (a->req_table == NULL) {
841 esas2r_log(ESAS2R_LOG_CRIT,
842 "failed to allocate memory for the request table");
843 return false;
844 }
845
846 /* initialize PCI configuration space */
847 esas2r_init_pci_cfg_space(a);
848
849 /*
850 * the thunder_stream boards all have a serial flash part that has a
851 * different base address on the AHB bus.
852 */
853 if ((a->pcid->subsystem_vendor == ATTO_VENDOR_ID)
854 && (a->pcid->subsystem_device & ATTO_SSDID_TBT))
855 a->flags2 |= AF2_THUNDERBOLT;
856
857 if (test_bit(AF2_THUNDERBOLT, &a->flags2))
858 a->flags2 |= AF2_SERIAL_FLASH;
859
860 if (a->pcid->subsystem_device == ATTO_TLSH_1068)
861 a->flags2 |= AF2_THUNDERLINK;
862
863 /* Uncached Area */
864 high = (u8 *)*uncached_area;
865
866 /* initialize the scatter/gather table pages */
867
868 for (i = 0, sgl = a->sg_list_mds; i < num_sg_lists; i++, sgl++) {
869 sgl->size = sgl_page_size;
870
871 list_add_tail(&sgl->next_desc, &a->free_sg_list_head);
872
873 if (!esas2r_initmem_alloc(a, sgl, ESAS2R_SGL_ALIGN)) {
874 /* Allow the driver to load if the minimum count met. */
875 if (i < NUM_SGL_MIN)
876 return false;
877 break;
878 }
879 }
880
881 /* compute the size of the lists */
882 a->list_size = num_requests + ESAS2R_LIST_EXTRA;
883
884 /* allocate the inbound list */
885 a->inbound_list_md.size = a->list_size *
886 sizeof(struct
887 esas2r_inbound_list_source_entry);
888
889 if (!esas2r_initmem_alloc(a, &a->inbound_list_md, ESAS2R_LIST_ALIGN)) {
890 esas2r_hdebug("failed to allocate IB list");
891 return false;
892 }
893
894 /* allocate the outbound list */
895 a->outbound_list_md.size = a->list_size *
896 sizeof(struct atto_vda_ob_rsp);
897
898 if (!esas2r_initmem_alloc(a, &a->outbound_list_md,
899 ESAS2R_LIST_ALIGN)) {
900 esas2r_hdebug("failed to allocate IB list");
901 return false;
902 }
903
904 /* allocate the NVRAM structure */
905 a->nvram = (struct esas2r_sas_nvram *)high;
906 high += sizeof(struct esas2r_sas_nvram);
907
908 /* allocate the discovery buffer */
909 a->disc_buffer = high;
910 high += ESAS2R_DISC_BUF_LEN;
911 high = PTR_ALIGN(high, 8);
912
913 /* allocate the outbound list copy pointer */
914 a->outbound_copy = (u32 volatile *)high;
915 high += sizeof(u32);
916
917 if (!test_bit(AF_NVR_VALID, &a->flags))
918 esas2r_nvram_set_defaults(a);
919
920 /* update the caller's uncached memory area pointer */
921 *uncached_area = (void *)high;
922
923 /* initialize the allocated memory */
924 if (test_bit(AF_FIRST_INIT, &a->flags)) {
925 esas2r_targ_db_initialize(a);
926
927 /* prime parts of the inbound list */
928 element =
929 (struct esas2r_inbound_list_source_entry *)a->
930 inbound_list_md.
931 virt_addr;
932
933 for (i = 0; i < a->list_size; i++) {
934 element->address = 0;
935 element->reserved = 0;
936 element->length = cpu_to_le32(HWILSE_INTERFACE_F0
937 | (sizeof(union
938 atto_vda_req)
939 /
940 sizeof(u32)));
941 element++;
942 }
943
944 /* init the AE requests */
945 for (rq = a->first_ae_req, i = 0; i < num_ae_requests; rq++,
946 i++) {
947 INIT_LIST_HEAD(&rq->req_list);
948 if (!alloc_vda_req(a, rq)) {
949 esas2r_hdebug(
950 "failed to allocate a VDA request!");
951 return false;
952 }
953
954 esas2r_rq_init_request(rq, a);
955
956 /* override the completion function */
957 rq->comp_cb = esas2r_ae_complete;
958 }
959 }
960
961 return true;
962 }
963
964 /* This code will verify that the chip is operational. */
965 bool esas2r_check_adapter(struct esas2r_adapter *a)
966 {
967 u32 starttime;
968 u32 doorbell;
969 u64 ppaddr;
970 u32 dw;
971
972 /*
973 * if the chip reset detected flag is set, we can bypass a bunch of
974 * stuff.
975 */
976 if (test_bit(AF_CHPRST_DETECTED, &a->flags))
977 goto skip_chip_reset;
978
979 /*
980 * BEFORE WE DO ANYTHING, disable the chip interrupts! the boot driver
981 * may have left them enabled or we may be recovering from a fault.
982 */
983 esas2r_write_register_dword(a, MU_INT_MASK_OUT, ESAS2R_INT_DIS_MASK);
984 esas2r_flush_register_dword(a, MU_INT_MASK_OUT);
985
986 /*
987 * wait for the firmware to become ready by forcing an interrupt and
988 * waiting for a response.
989 */
990 starttime = jiffies_to_msecs(jiffies);
991
992 while (true) {
993 esas2r_force_interrupt(a);
994 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
995 if (doorbell == 0xFFFFFFFF) {
996 /*
997 * Give the firmware up to two seconds to enable
998 * register access after a reset.
999 */
1000 if ((jiffies_to_msecs(jiffies) - starttime) > 2000)
1001 return esas2r_set_degraded_mode(a,
1002 "unable to access registers");
1003 } else if (doorbell & DRBL_FORCE_INT) {
1004 u32 ver = (doorbell & DRBL_FW_VER_MSK);
1005
1006 /*
1007 * This driver supports version 0 and version 1 of
1008 * the API
1009 */
1010 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1011 doorbell);
1012
1013 if (ver == DRBL_FW_VER_0) {
1014 set_bit(AF_LEGACY_SGE_MODE, &a->flags);
1015
1016 a->max_vdareq_size = 128;
1017 a->build_sgl = esas2r_build_sg_list_sge;
1018 } else if (ver == DRBL_FW_VER_1) {
1019 clear_bit(AF_LEGACY_SGE_MODE, &a->flags);
1020
1021 a->max_vdareq_size = 1024;
1022 a->build_sgl = esas2r_build_sg_list_prd;
1023 } else {
1024 return esas2r_set_degraded_mode(a,
1025 "unknown firmware version");
1026 }
1027 break;
1028 }
1029
1030 schedule_timeout_interruptible(msecs_to_jiffies(100));
1031
1032 if ((jiffies_to_msecs(jiffies) - starttime) > 180000) {
1033 esas2r_hdebug("FW ready TMO");
1034 esas2r_bugon();
1035
1036 return esas2r_set_degraded_mode(a,
1037 "firmware start has timed out");
1038 }
1039 }
1040
1041 /* purge any asynchronous events since we will repost them later */
1042 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_DOWN);
1043 starttime = jiffies_to_msecs(jiffies);
1044
1045 while (true) {
1046 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1047 if (doorbell & DRBL_MSG_IFC_DOWN) {
1048 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1049 doorbell);
1050 break;
1051 }
1052
1053 schedule_timeout_interruptible(msecs_to_jiffies(50));
1054
1055 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1056 esas2r_hdebug("timeout waiting for interface down");
1057 break;
1058 }
1059 }
1060 skip_chip_reset:
1061 /*
1062 * first things first, before we go changing any of these registers
1063 * disable the communication lists.
1064 */
1065 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG);
1066 dw &= ~MU_ILC_ENABLE;
1067 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw);
1068 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG);
1069 dw &= ~MU_OLC_ENABLE;
1070 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw);
1071
1072 /* configure the communication list addresses */
1073 ppaddr = a->inbound_list_md.phys_addr;
1074 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_LO,
1075 lower_32_bits(ppaddr));
1076 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_HI,
1077 upper_32_bits(ppaddr));
1078 ppaddr = a->outbound_list_md.phys_addr;
1079 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_LO,
1080 lower_32_bits(ppaddr));
1081 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_HI,
1082 upper_32_bits(ppaddr));
1083 ppaddr = a->uncached_phys +
1084 ((u8 *)a->outbound_copy - a->uncached);
1085 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_LO,
1086 lower_32_bits(ppaddr));
1087 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_HI,
1088 upper_32_bits(ppaddr));
1089
1090 /* reset the read and write pointers */
1091 *a->outbound_copy =
1092 a->last_write =
1093 a->last_read = a->list_size - 1;
1094 set_bit(AF_COMM_LIST_TOGGLE, &a->flags);
1095 esas2r_write_register_dword(a, MU_IN_LIST_WRITE, MU_ILW_TOGGLE |
1096 a->last_write);
1097 esas2r_write_register_dword(a, MU_OUT_LIST_COPY, MU_OLC_TOGGLE |
1098 a->last_write);
1099 esas2r_write_register_dword(a, MU_IN_LIST_READ, MU_ILR_TOGGLE |
1100 a->last_write);
1101 esas2r_write_register_dword(a, MU_OUT_LIST_WRITE,
1102 MU_OLW_TOGGLE | a->last_write);
1103
1104 /* configure the interface select fields */
1105 dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG);
1106 dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST);
1107 esas2r_write_register_dword(a, MU_IN_LIST_IFC_CONFIG,
1108 (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR));
1109 dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG);
1110 dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE);
1111 esas2r_write_register_dword(a, MU_OUT_LIST_IFC_CONFIG,
1112 (dw | MU_OLIC_LIST_F0 |
1113 MU_OLIC_SOURCE_DDR));
1114
1115 /* finish configuring the communication lists */
1116 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG);
1117 dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK);
1118 dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC
1119 | (a->list_size << MU_ILC_NUMBER_SHIFT);
1120 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw);
1121 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG);
1122 dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK);
1123 dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT);
1124 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw);
1125
1126 /*
1127 * notify the firmware that we're done setting up the communication
1128 * list registers. wait here until the firmware is done configuring
1129 * its lists. it will signal that it is done by enabling the lists.
1130 */
1131 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_INIT);
1132 starttime = jiffies_to_msecs(jiffies);
1133
1134 while (true) {
1135 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1136 if (doorbell & DRBL_MSG_IFC_INIT) {
1137 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1138 doorbell);
1139 break;
1140 }
1141
1142 schedule_timeout_interruptible(msecs_to_jiffies(100));
1143
1144 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1145 esas2r_hdebug(
1146 "timeout waiting for communication list init");
1147 esas2r_bugon();
1148 return esas2r_set_degraded_mode(a,
1149 "timeout waiting for communication list init");
1150 }
1151 }
1152
1153 /*
1154 * flag whether the firmware supports the power down doorbell. we
1155 * determine this by reading the inbound doorbell enable mask.
1156 */
1157 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_IN_ENB);
1158 if (doorbell & DRBL_POWER_DOWN)
1159 set_bit(AF2_VDA_POWER_DOWN, &a->flags2);
1160 else
1161 clear_bit(AF2_VDA_POWER_DOWN, &a->flags2);
1162
1163 /*
1164 * enable assertion of outbound queue and doorbell interrupts in the
1165 * main interrupt cause register.
1166 */
1167 esas2r_write_register_dword(a, MU_OUT_LIST_INT_MASK, MU_OLIS_MASK);
1168 esas2r_write_register_dword(a, MU_DOORBELL_OUT_ENB, DRBL_ENB_MASK);
1169 return true;
1170 }
1171
1172 /* Process the initialization message just completed and format the next one. */
1173 static bool esas2r_format_init_msg(struct esas2r_adapter *a,
1174 struct esas2r_request *rq)
1175 {
1176 u32 msg = a->init_msg;
1177 struct atto_vda_cfg_init *ci;
1178
1179 a->init_msg = 0;
1180
1181 switch (msg) {
1182 case ESAS2R_INIT_MSG_START:
1183 case ESAS2R_INIT_MSG_REINIT:
1184 {
1185 esas2r_hdebug("CFG init");
1186 esas2r_build_cfg_req(a,
1187 rq,
1188 VDA_CFG_INIT,
1189 0,
1190 NULL);
1191 ci = (struct atto_vda_cfg_init *)&rq->vrq->cfg.data.init;
1192 ci->sgl_page_size = cpu_to_le32(sgl_page_size);
1193 /* firmware interface overflows in y2106 */
1194 ci->epoch_time = cpu_to_le32(ktime_get_real_seconds());
1195 rq->flags |= RF_FAILURE_OK;
1196 a->init_msg = ESAS2R_INIT_MSG_INIT;
1197 break;
1198 }
1199
1200 case ESAS2R_INIT_MSG_INIT:
1201 if (rq->req_stat == RS_SUCCESS) {
1202 u32 major;
1203 u32 minor;
1204 u16 fw_release;
1205
1206 a->fw_version = le16_to_cpu(
1207 rq->func_rsp.cfg_rsp.vda_version);
1208 a->fw_build = rq->func_rsp.cfg_rsp.fw_build;
1209 fw_release = le16_to_cpu(
1210 rq->func_rsp.cfg_rsp.fw_release);
1211 major = LOBYTE(fw_release);
1212 minor = HIBYTE(fw_release);
1213 a->fw_version += (major << 16) + (minor << 24);
1214 } else {
1215 esas2r_hdebug("FAILED");
1216 }
1217
1218 /*
1219 * the 2.71 and earlier releases of R6xx firmware did not error
1220 * unsupported config requests correctly.
1221 */
1222
1223 if ((test_bit(AF2_THUNDERBOLT, &a->flags2))
1224 || (be32_to_cpu(a->fw_version) > 0x00524702)) {
1225 esas2r_hdebug("CFG get init");
1226 esas2r_build_cfg_req(a,
1227 rq,
1228 VDA_CFG_GET_INIT2,
1229 sizeof(struct atto_vda_cfg_init),
1230 NULL);
1231
1232 rq->vrq->cfg.sg_list_offset = offsetof(
1233 struct atto_vda_cfg_req,
1234 data.sge);
1235 rq->vrq->cfg.data.prde.ctl_len =
1236 cpu_to_le32(sizeof(struct atto_vda_cfg_init));
1237 rq->vrq->cfg.data.prde.address = cpu_to_le64(
1238 rq->vrq_md->phys_addr +
1239 sizeof(union atto_vda_req));
1240 rq->flags |= RF_FAILURE_OK;
1241 a->init_msg = ESAS2R_INIT_MSG_GET_INIT;
1242 break;
1243 }
1244 /* fall through */
1245
1246 case ESAS2R_INIT_MSG_GET_INIT:
1247 if (msg == ESAS2R_INIT_MSG_GET_INIT) {
1248 ci = (struct atto_vda_cfg_init *)rq->data_buf;
1249 if (rq->req_stat == RS_SUCCESS) {
1250 a->num_targets_backend =
1251 le32_to_cpu(ci->num_targets_backend);
1252 a->ioctl_tunnel =
1253 le32_to_cpu(ci->ioctl_tunnel);
1254 } else {
1255 esas2r_hdebug("FAILED");
1256 }
1257 }
1258 /* fall through */
1259
1260 default:
1261 rq->req_stat = RS_SUCCESS;
1262 return false;
1263 }
1264 return true;
1265 }
1266
1267 /*
1268 * Perform initialization messages via the request queue. Messages are
1269 * performed with interrupts disabled.
1270 */
1271 bool esas2r_init_msgs(struct esas2r_adapter *a)
1272 {
1273 bool success = true;
1274 struct esas2r_request *rq = &a->general_req;
1275
1276 esas2r_rq_init_request(rq, a);
1277 rq->comp_cb = esas2r_dummy_complete;
1278
1279 if (a->init_msg == 0)
1280 a->init_msg = ESAS2R_INIT_MSG_REINIT;
1281
1282 while (a->init_msg) {
1283 if (esas2r_format_init_msg(a, rq)) {
1284 unsigned long flags;
1285 while (true) {
1286 spin_lock_irqsave(&a->queue_lock, flags);
1287 esas2r_start_vda_request(a, rq);
1288 spin_unlock_irqrestore(&a->queue_lock, flags);
1289 esas2r_wait_request(a, rq);
1290 if (rq->req_stat != RS_PENDING)
1291 break;
1292 }
1293 }
1294
1295 if (rq->req_stat == RS_SUCCESS
1296 || ((rq->flags & RF_FAILURE_OK)
1297 && rq->req_stat != RS_TIMEOUT))
1298 continue;
1299
1300 esas2r_log(ESAS2R_LOG_CRIT, "init message %x failed (%x, %x)",
1301 a->init_msg, rq->req_stat, rq->flags);
1302 a->init_msg = ESAS2R_INIT_MSG_START;
1303 success = false;
1304 break;
1305 }
1306
1307 esas2r_rq_destroy_request(rq, a);
1308 return success;
1309 }
1310
1311 /* Initialize the adapter chip */
1312 bool esas2r_init_adapter_hw(struct esas2r_adapter *a, bool init_poll)
1313 {
1314 bool rslt = false;
1315 struct esas2r_request *rq;
1316 u32 i;
1317
1318 if (test_bit(AF_DEGRADED_MODE, &a->flags))
1319 goto exit;
1320
1321 if (!test_bit(AF_NVR_VALID, &a->flags)) {
1322 if (!esas2r_nvram_read_direct(a))
1323 esas2r_log(ESAS2R_LOG_WARN,
1324 "invalid/missing NVRAM parameters");
1325 }
1326
1327 if (!esas2r_init_msgs(a)) {
1328 esas2r_set_degraded_mode(a, "init messages failed");
1329 goto exit;
1330 }
1331
1332 /* The firmware is ready. */
1333 clear_bit(AF_DEGRADED_MODE, &a->flags);
1334 clear_bit(AF_CHPRST_PENDING, &a->flags);
1335
1336 /* Post all the async event requests */
1337 for (i = 0, rq = a->first_ae_req; i < num_ae_requests; i++, rq++)
1338 esas2r_start_ae_request(a, rq);
1339
1340 if (!a->flash_rev[0])
1341 esas2r_read_flash_rev(a);
1342
1343 if (!a->image_type[0])
1344 esas2r_read_image_type(a);
1345
1346 if (a->fw_version == 0)
1347 a->fw_rev[0] = 0;
1348 else
1349 sprintf(a->fw_rev, "%1d.%02d",
1350 (int)LOBYTE(HIWORD(a->fw_version)),
1351 (int)HIBYTE(HIWORD(a->fw_version)));
1352
1353 esas2r_hdebug("firmware revision: %s", a->fw_rev);
1354
1355 if (test_bit(AF_CHPRST_DETECTED, &a->flags)
1356 && (test_bit(AF_FIRST_INIT, &a->flags))) {
1357 esas2r_enable_chip_interrupts(a);
1358 return true;
1359 }
1360
1361 /* initialize discovery */
1362 esas2r_disc_initialize(a);
1363
1364 /*
1365 * wait for the device wait time to expire here if requested. this is
1366 * usually requested during initial driver load and possibly when
1367 * resuming from a low power state. deferred device waiting will use
1368 * interrupts. chip reset recovery always defers device waiting to
1369 * avoid being in a TASKLET too long.
1370 */
1371 if (init_poll) {
1372 u32 currtime = a->disc_start_time;
1373 u32 nexttick = 100;
1374 u32 deltatime;
1375
1376 /*
1377 * Block Tasklets from getting scheduled and indicate this is
1378 * polled discovery.
1379 */
1380 set_bit(AF_TASKLET_SCHEDULED, &a->flags);
1381 set_bit(AF_DISC_POLLED, &a->flags);
1382
1383 /*
1384 * Temporarily bring the disable count to zero to enable
1385 * deferred processing. Note that the count is already zero
1386 * after the first initialization.
1387 */
1388 if (test_bit(AF_FIRST_INIT, &a->flags))
1389 atomic_dec(&a->disable_cnt);
1390
1391 while (test_bit(AF_DISC_PENDING, &a->flags)) {
1392 schedule_timeout_interruptible(msecs_to_jiffies(100));
1393
1394 /*
1395 * Determine the need for a timer tick based on the
1396 * delta time between this and the last iteration of
1397 * this loop. We don't use the absolute time because
1398 * then we would have to worry about when nexttick
1399 * wraps and currtime hasn't yet.
1400 */
1401 deltatime = jiffies_to_msecs(jiffies) - currtime;
1402 currtime += deltatime;
1403
1404 /*
1405 * Process any waiting discovery as long as the chip is
1406 * up. If a chip reset happens during initial polling,
1407 * we have to make sure the timer tick processes the
1408 * doorbell indicating the firmware is ready.
1409 */
1410 if (!test_bit(AF_CHPRST_PENDING, &a->flags))
1411 esas2r_disc_check_for_work(a);
1412
1413 /* Simulate a timer tick. */
1414 if (nexttick <= deltatime) {
1415
1416 /* Time for a timer tick */
1417 nexttick += 100;
1418 esas2r_timer_tick(a);
1419 }
1420
1421 if (nexttick > deltatime)
1422 nexttick -= deltatime;
1423
1424 /* Do any deferred processing */
1425 if (esas2r_is_tasklet_pending(a))
1426 esas2r_do_tasklet_tasks(a);
1427
1428 }
1429
1430 if (test_bit(AF_FIRST_INIT, &a->flags))
1431 atomic_inc(&a->disable_cnt);
1432
1433 clear_bit(AF_DISC_POLLED, &a->flags);
1434 clear_bit(AF_TASKLET_SCHEDULED, &a->flags);
1435 }
1436
1437
1438 esas2r_targ_db_report_changes(a);
1439
1440 /*
1441 * For cases where (a) the initialization messages processing may
1442 * handle an interrupt for a port event and a discovery is waiting, but
1443 * we are not waiting for devices, or (b) the device wait time has been
1444 * exhausted but there is still discovery pending, start any leftover
1445 * discovery in interrupt driven mode.
1446 */
1447 esas2r_disc_start_waiting(a);
1448
1449 /* Enable chip interrupts */
1450 a->int_mask = ESAS2R_INT_STS_MASK;
1451 esas2r_enable_chip_interrupts(a);
1452 esas2r_enable_heartbeat(a);
1453 rslt = true;
1454
1455 exit:
1456 /*
1457 * Regardless of whether initialization was successful, certain things
1458 * need to get done before we exit.
1459 */
1460
1461 if (test_bit(AF_CHPRST_DETECTED, &a->flags) &&
1462 test_bit(AF_FIRST_INIT, &a->flags)) {
1463 /*
1464 * Reinitialization was performed during the first
1465 * initialization. Only clear the chip reset flag so the
1466 * original device polling is not cancelled.
1467 */
1468 if (!rslt)
1469 clear_bit(AF_CHPRST_PENDING, &a->flags);
1470 } else {
1471 /* First initialization or a subsequent re-init is complete. */
1472 if (!rslt) {
1473 clear_bit(AF_CHPRST_PENDING, &a->flags);
1474 clear_bit(AF_DISC_PENDING, &a->flags);
1475 }
1476
1477
1478 /* Enable deferred processing after the first initialization. */
1479 if (test_bit(AF_FIRST_INIT, &a->flags)) {
1480 clear_bit(AF_FIRST_INIT, &a->flags);
1481
1482 if (atomic_dec_return(&a->disable_cnt) == 0)
1483 esas2r_do_deferred_processes(a);
1484 }
1485 }
1486
1487 return rslt;
1488 }
1489
1490 void esas2r_reset_adapter(struct esas2r_adapter *a)
1491 {
1492 set_bit(AF_OS_RESET, &a->flags);
1493 esas2r_local_reset_adapter(a);
1494 esas2r_schedule_tasklet(a);
1495 }
1496
1497 void esas2r_reset_chip(struct esas2r_adapter *a)
1498 {
1499 if (!esas2r_is_adapter_present(a))
1500 return;
1501
1502 /*
1503 * Before we reset the chip, save off the VDA core dump. The VDA core
1504 * dump is located in the upper 512KB of the onchip SRAM. Make sure
1505 * to not overwrite a previous crash that was saved.
1506 */
1507 if (test_bit(AF2_COREDUMP_AVAIL, &a->flags2) &&
1508 !test_bit(AF2_COREDUMP_SAVED, &a->flags2)) {
1509 esas2r_read_mem_block(a,
1510 a->fw_coredump_buff,
1511 MW_DATA_ADDR_SRAM + 0x80000,
1512 ESAS2R_FWCOREDUMP_SZ);
1513
1514 set_bit(AF2_COREDUMP_SAVED, &a->flags2);
1515 }
1516
1517 clear_bit(AF2_COREDUMP_AVAIL, &a->flags2);
1518
1519 /* Reset the chip */
1520 if (a->pcid->revision == MVR_FREY_B2)
1521 esas2r_write_register_dword(a, MU_CTL_STATUS_IN_B2,
1522 MU_CTL_IN_FULL_RST2);
1523 else
1524 esas2r_write_register_dword(a, MU_CTL_STATUS_IN,
1525 MU_CTL_IN_FULL_RST);
1526
1527
1528 /* Stall a little while to let the reset condition clear */
1529 mdelay(10);
1530 }
1531
1532 static void esas2r_power_down_notify_firmware(struct esas2r_adapter *a)
1533 {
1534 u32 starttime;
1535 u32 doorbell;
1536
1537 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_POWER_DOWN);
1538 starttime = jiffies_to_msecs(jiffies);
1539
1540 while (true) {
1541 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1542 if (doorbell & DRBL_POWER_DOWN) {
1543 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1544 doorbell);
1545 break;
1546 }
1547
1548 schedule_timeout_interruptible(msecs_to_jiffies(100));
1549
1550 if ((jiffies_to_msecs(jiffies) - starttime) > 30000) {
1551 esas2r_hdebug("Timeout waiting for power down");
1552 break;
1553 }
1554 }
1555 }
1556
1557 /*
1558 * Perform power management processing including managing device states, adapter
1559 * states, interrupts, and I/O.
1560 */
1561 void esas2r_power_down(struct esas2r_adapter *a)
1562 {
1563 set_bit(AF_POWER_MGT, &a->flags);
1564 set_bit(AF_POWER_DOWN, &a->flags);
1565
1566 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) {
1567 u32 starttime;
1568 u32 doorbell;
1569
1570 /*
1571 * We are currently running OK and will be reinitializing later.
1572 * increment the disable count to coordinate with
1573 * esas2r_init_adapter. We don't have to do this in degraded
1574 * mode since we never enabled interrupts in the first place.
1575 */
1576 esas2r_disable_chip_interrupts(a);
1577 esas2r_disable_heartbeat(a);
1578
1579 /* wait for any VDA activity to clear before continuing */
1580 esas2r_write_register_dword(a, MU_DOORBELL_IN,
1581 DRBL_MSG_IFC_DOWN);
1582 starttime = jiffies_to_msecs(jiffies);
1583
1584 while (true) {
1585 doorbell =
1586 esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1587 if (doorbell & DRBL_MSG_IFC_DOWN) {
1588 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1589 doorbell);
1590 break;
1591 }
1592
1593 schedule_timeout_interruptible(msecs_to_jiffies(100));
1594
1595 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1596 esas2r_hdebug(
1597 "timeout waiting for interface down");
1598 break;
1599 }
1600 }
1601
1602 /*
1603 * For versions of firmware that support it tell them the driver
1604 * is powering down.
1605 */
1606 if (test_bit(AF2_VDA_POWER_DOWN, &a->flags2))
1607 esas2r_power_down_notify_firmware(a);
1608 }
1609
1610 /* Suspend I/O processing. */
1611 set_bit(AF_OS_RESET, &a->flags);
1612 set_bit(AF_DISC_PENDING, &a->flags);
1613 set_bit(AF_CHPRST_PENDING, &a->flags);
1614
1615 esas2r_process_adapter_reset(a);
1616
1617 /* Remove devices now that I/O is cleaned up. */
1618 a->prev_dev_cnt = esas2r_targ_db_get_tgt_cnt(a);
1619 esas2r_targ_db_remove_all(a, false);
1620 }
1621
1622 /*
1623 * Perform power management processing including managing device states, adapter
1624 * states, interrupts, and I/O.
1625 */
1626 bool esas2r_power_up(struct esas2r_adapter *a, bool init_poll)
1627 {
1628 bool ret;
1629
1630 clear_bit(AF_POWER_DOWN, &a->flags);
1631 esas2r_init_pci_cfg_space(a);
1632 set_bit(AF_FIRST_INIT, &a->flags);
1633 atomic_inc(&a->disable_cnt);
1634
1635 /* reinitialize the adapter */
1636 ret = esas2r_check_adapter(a);
1637 if (!esas2r_init_adapter_hw(a, init_poll))
1638 ret = false;
1639
1640 /* send the reset asynchronous event */
1641 esas2r_send_reset_ae(a, true);
1642
1643 /* clear this flag after initialization. */
1644 clear_bit(AF_POWER_MGT, &a->flags);
1645 return ret;
1646 }
1647
1648 bool esas2r_is_adapter_present(struct esas2r_adapter *a)
1649 {
1650 if (test_bit(AF_NOT_PRESENT, &a->flags))
1651 return false;
1652
1653 if (esas2r_read_register_dword(a, MU_DOORBELL_OUT) == 0xFFFFFFFF) {
1654 set_bit(AF_NOT_PRESENT, &a->flags);
1655
1656 return false;
1657 }
1658 return true;
1659 }
1660
1661 const char *esas2r_get_model_name(struct esas2r_adapter *a)
1662 {
1663 switch (a->pcid->subsystem_device) {
1664 case ATTO_ESAS_R680:
1665 return "ATTO ExpressSAS R680";
1666
1667 case ATTO_ESAS_R608:
1668 return "ATTO ExpressSAS R608";
1669
1670 case ATTO_ESAS_R60F:
1671 return "ATTO ExpressSAS R60F";
1672
1673 case ATTO_ESAS_R6F0:
1674 return "ATTO ExpressSAS R6F0";
1675
1676 case ATTO_ESAS_R644:
1677 return "ATTO ExpressSAS R644";
1678
1679 case ATTO_ESAS_R648:
1680 return "ATTO ExpressSAS R648";
1681
1682 case ATTO_TSSC_3808:
1683 return "ATTO ThunderStream SC 3808D";
1684
1685 case ATTO_TSSC_3808E:
1686 return "ATTO ThunderStream SC 3808E";
1687
1688 case ATTO_TLSH_1068:
1689 return "ATTO ThunderLink SH 1068";
1690 }
1691
1692 return "ATTO SAS Controller";
1693 }
1694
1695 const char *esas2r_get_model_name_short(struct esas2r_adapter *a)
1696 {
1697 switch (a->pcid->subsystem_device) {
1698 case ATTO_ESAS_R680:
1699 return "R680";
1700
1701 case ATTO_ESAS_R608:
1702 return "R608";
1703
1704 case ATTO_ESAS_R60F:
1705 return "R60F";
1706
1707 case ATTO_ESAS_R6F0:
1708 return "R6F0";
1709
1710 case ATTO_ESAS_R644:
1711 return "R644";
1712
1713 case ATTO_ESAS_R648:
1714 return "R648";
1715
1716 case ATTO_TSSC_3808:
1717 return "SC 3808D";
1718
1719 case ATTO_TSSC_3808E:
1720 return "SC 3808E";
1721
1722 case ATTO_TLSH_1068:
1723 return "SH 1068";
1724 }
1725
1726 return "unknown";
1727 }
Linux with added FPC-III support