1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/linkage.h>
6 #include <asm/byteorder.h>
9 * These are the "generic" interfaces for doing new-style
10 * memory-mapped or PIO accesses. Architectures may do
11 * their own arch-optimized versions, these just act as
12 * wrappers around the old-style IO register access functions:
13 * read[bwl]/write[bwl]/in[bwl]/out[bwl]
15 * Don't include this directly, include it from <asm/io.h>.
19 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
20 * access or a MMIO access, these functions don't care. The info is
21 * encoded in the hardware mapping set up by the mapping functions
22 * (or the cookie itself, depending on implementation and hw).
24 * The generic routines just encode the PIO/MMIO as part of the
25 * cookie, and coldly assume that the MMIO IO mappings are not
26 * in the low address range. Architectures for which this is not
27 * true can't use this generic implementation.
29 extern unsigned int ioread8(void __iomem
*);
30 extern unsigned int ioread16(void __iomem
*);
31 extern unsigned int ioread16be(void __iomem
*);
32 extern unsigned int ioread32(void __iomem
*);
33 extern unsigned int ioread32be(void __iomem
*);
35 extern u64
ioread64(void __iomem
*);
36 extern u64
ioread64be(void __iomem
*);
40 #define ioread64_lo_hi ioread64_lo_hi
41 #define ioread64_hi_lo ioread64_hi_lo
42 #define ioread64be_lo_hi ioread64be_lo_hi
43 #define ioread64be_hi_lo ioread64be_hi_lo
44 extern u64
ioread64_lo_hi(void __iomem
*addr
);
45 extern u64
ioread64_hi_lo(void __iomem
*addr
);
46 extern u64
ioread64be_lo_hi(void __iomem
*addr
);
47 extern u64
ioread64be_hi_lo(void __iomem
*addr
);
50 extern void iowrite8(u8
, void __iomem
*);
51 extern void iowrite16(u16
, void __iomem
*);
52 extern void iowrite16be(u16
, void __iomem
*);
53 extern void iowrite32(u32
, void __iomem
*);
54 extern void iowrite32be(u32
, void __iomem
*);
56 extern void iowrite64(u64
, void __iomem
*);
57 extern void iowrite64be(u64
, void __iomem
*);
61 #define iowrite64_lo_hi iowrite64_lo_hi
62 #define iowrite64_hi_lo iowrite64_hi_lo
63 #define iowrite64be_lo_hi iowrite64be_lo_hi
64 #define iowrite64be_hi_lo iowrite64be_hi_lo
65 extern void iowrite64_lo_hi(u64 val
, void __iomem
*addr
);
66 extern void iowrite64_hi_lo(u64 val
, void __iomem
*addr
);
67 extern void iowrite64be_lo_hi(u64 val
, void __iomem
*addr
);
68 extern void iowrite64be_hi_lo(u64 val
, void __iomem
*addr
);
72 * "string" versions of the above. Note that they
73 * use native byte ordering for the accesses (on
74 * the assumption that IO and memory agree on a
75 * byte order, and CPU byteorder is irrelevant).
77 * They do _not_ update the port address. If you
78 * want MMIO that copies stuff laid out in MMIO
79 * memory across multiple ports, use "memcpy_toio()"
82 extern void ioread8_rep(void __iomem
*port
, void *buf
, unsigned long count
);
83 extern void ioread16_rep(void __iomem
*port
, void *buf
, unsigned long count
);
84 extern void ioread32_rep(void __iomem
*port
, void *buf
, unsigned long count
);
86 extern void iowrite8_rep(void __iomem
*port
, const void *buf
, unsigned long count
);
87 extern void iowrite16_rep(void __iomem
*port
, const void *buf
, unsigned long count
);
88 extern void iowrite32_rep(void __iomem
*port
, const void *buf
, unsigned long count
);
90 #ifdef CONFIG_HAS_IOPORT_MAP
91 /* Create a virtual mapping cookie for an IO port range */
92 extern void __iomem
*ioport_map(unsigned long port
, unsigned int nr
);
93 extern void ioport_unmap(void __iomem
*);
96 #ifndef ARCH_HAS_IOREMAP_WC
97 #define ioremap_wc ioremap_nocache
100 #ifndef ARCH_HAS_IOREMAP_WT
101 #define ioremap_wt ioremap_nocache
105 /* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
107 extern void pci_iounmap(struct pci_dev
*dev
, void __iomem
*);
108 #elif defined(CONFIG_GENERIC_IOMAP)
110 static inline void pci_iounmap(struct pci_dev
*dev
, void __iomem
*addr
)
114 #include <asm-generic/pci_iomap.h>