[AVR32] ATSTK1002: Update defconfig
[linux/fpc-iii.git] / drivers / char / drm / drm_os_linux.h
blobdaa69c9d8977b9cf8055c082eca364abd13b5635
1 /**
2 * \file drm_os_linux.h
3 * OS abstraction macros.
4 */
6 #include <linux/interrupt.h> /* For task queue support */
7 #include <linux/delay.h>
9 /** Current process ID */
10 #define DRM_CURRENTPID task_pid_nr(current)
11 #define DRM_SUSER(p) capable(CAP_SYS_ADMIN)
12 #define DRM_UDELAY(d) udelay(d)
13 /** Read a byte from a MMIO region */
14 #define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset))
15 /** Read a word from a MMIO region */
16 #define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset))
17 /** Read a dword from a MMIO region */
18 #define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset))
19 /** Write a byte into a MMIO region */
20 #define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset))
21 /** Write a word into a MMIO region */
22 #define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset))
23 /** Write a dword into a MMIO region */
24 #define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))
25 /** Read memory barrier */
26 #define DRM_READMEMORYBARRIER() rmb()
27 /** Write memory barrier */
28 #define DRM_WRITEMEMORYBARRIER() wmb()
29 /** Read/write memory barrier */
30 #define DRM_MEMORYBARRIER() mb()
32 /** IRQ handler arguments and return type and values */
33 #define DRM_IRQ_ARGS int irq, void *arg
35 /** AGP types */
36 #if __OS_HAS_AGP
37 #define DRM_AGP_MEM struct agp_memory
38 #define DRM_AGP_KERN struct agp_kern_info
39 #else
40 /* define some dummy types for non AGP supporting kernels */
41 struct no_agp_kern {
42 unsigned long aper_base;
43 unsigned long aper_size;
45 #define DRM_AGP_MEM int
46 #define DRM_AGP_KERN struct no_agp_kern
47 #endif
49 #if !(__OS_HAS_MTRR)
50 static __inline__ int mtrr_add(unsigned long base, unsigned long size,
51 unsigned int type, char increment)
53 return -ENODEV;
56 static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size)
58 return -ENODEV;
61 #define MTRR_TYPE_WRCOMB 1
63 #endif
65 /** Other copying of data to kernel space */
66 #define DRM_COPY_FROM_USER(arg1, arg2, arg3) \
67 copy_from_user(arg1, arg2, arg3)
68 /** Other copying of data from kernel space */
69 #define DRM_COPY_TO_USER(arg1, arg2, arg3) \
70 copy_to_user(arg1, arg2, arg3)
71 /* Macros for copyfrom user, but checking readability only once */
72 #define DRM_VERIFYAREA_READ( uaddr, size ) \
73 (access_ok( VERIFY_READ, uaddr, size ) ? 0 : -EFAULT)
74 #define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \
75 __copy_from_user(arg1, arg2, arg3)
76 #define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \
77 __copy_to_user(arg1, arg2, arg3)
78 #define DRM_GET_USER_UNCHECKED(val, uaddr) \
79 __get_user(val, uaddr)
81 #define DRM_HZ HZ
83 #define DRM_WAIT_ON( ret, queue, timeout, condition ) \
84 do { \
85 DECLARE_WAITQUEUE(entry, current); \
86 unsigned long end = jiffies + (timeout); \
87 add_wait_queue(&(queue), &entry); \
89 for (;;) { \
90 __set_current_state(TASK_INTERRUPTIBLE); \
91 if (condition) \
92 break; \
93 if (time_after_eq(jiffies, end)) { \
94 ret = -EBUSY; \
95 break; \
96 } \
97 schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \
98 if (signal_pending(current)) { \
99 ret = -EINTR; \
100 break; \
103 __set_current_state(TASK_RUNNING); \
104 remove_wait_queue(&(queue), &entry); \
105 } while (0)
107 #define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
108 #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )