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[linux/fpc-iii.git] / lib / swiotlb.c
blob3c365ab6cf5f47711cf45ab65a593a6738713491
1 /*
2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mm.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
33 #include <asm/io.h>
34 #include <asm/dma.h>
35 #include <asm/scatterlist.h>
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
41 #define CREATE_TRACE_POINTS
42 #include <trace/events/swiotlb.h>
44 #define OFFSET(val,align) ((unsigned long) \
45 ( (val) & ( (align) - 1)))
47 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
54 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
56 int swiotlb_force;
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
61 * API.
63 static phys_addr_t io_tlb_start, io_tlb_end;
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
69 static unsigned long io_tlb_nslabs;
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
74 static unsigned long io_tlb_overflow = 32*1024;
76 static phys_addr_t io_tlb_overflow_buffer;
79 * This is a free list describing the number of free entries available from
80 * each index
82 static unsigned int *io_tlb_list;
83 static unsigned int io_tlb_index;
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
89 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
90 static phys_addr_t *io_tlb_orig_addr;
93 * Protect the above data structures in the map and unmap calls
95 static DEFINE_SPINLOCK(io_tlb_lock);
97 static int late_alloc;
99 static int __init
100 setup_io_tlb_npages(char *str)
102 if (isdigit(*str)) {
103 io_tlb_nslabs = simple_strtoul(str, &str, 0);
104 /* avoid tail segment of size < IO_TLB_SEGSIZE */
105 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
107 if (*str == ',')
108 ++str;
109 if (!strcmp(str, "force"))
110 swiotlb_force = 1;
112 return 0;
114 early_param("swiotlb", setup_io_tlb_npages);
115 /* make io_tlb_overflow tunable too? */
117 unsigned long swiotlb_nr_tbl(void)
119 return io_tlb_nslabs;
121 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
123 /* default to 64MB */
124 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
125 unsigned long swiotlb_size_or_default(void)
127 unsigned long size;
129 size = io_tlb_nslabs << IO_TLB_SHIFT;
131 return size ? size : (IO_TLB_DEFAULT_SIZE);
134 /* Note that this doesn't work with highmem page */
135 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
136 volatile void *address)
138 return phys_to_dma(hwdev, virt_to_phys(address));
141 static bool no_iotlb_memory;
143 void swiotlb_print_info(void)
145 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
146 unsigned char *vstart, *vend;
148 if (no_iotlb_memory) {
149 pr_warn("software IO TLB: No low mem\n");
150 return;
153 vstart = phys_to_virt(io_tlb_start);
154 vend = phys_to_virt(io_tlb_end);
156 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
157 (unsigned long long)io_tlb_start,
158 (unsigned long long)io_tlb_end,
159 bytes >> 20, vstart, vend - 1);
162 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
164 void *v_overflow_buffer;
165 unsigned long i, bytes;
167 bytes = nslabs << IO_TLB_SHIFT;
169 io_tlb_nslabs = nslabs;
170 io_tlb_start = __pa(tlb);
171 io_tlb_end = io_tlb_start + bytes;
174 * Get the overflow emergency buffer
176 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
177 PAGE_ALIGN(io_tlb_overflow),
178 PAGE_SIZE);
179 if (!v_overflow_buffer)
180 return -ENOMEM;
182 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
185 * Allocate and initialize the free list array. This array is used
186 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
187 * between io_tlb_start and io_tlb_end.
189 io_tlb_list = memblock_virt_alloc(
190 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
191 PAGE_SIZE);
192 io_tlb_orig_addr = memblock_virt_alloc(
193 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
194 PAGE_SIZE);
195 for (i = 0; i < io_tlb_nslabs; i++) {
196 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
197 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
199 io_tlb_index = 0;
201 if (verbose)
202 swiotlb_print_info();
204 return 0;
208 * Statically reserve bounce buffer space and initialize bounce buffer data
209 * structures for the software IO TLB used to implement the DMA API.
211 void __init
212 swiotlb_init(int verbose)
214 size_t default_size = IO_TLB_DEFAULT_SIZE;
215 unsigned char *vstart;
216 unsigned long bytes;
218 if (!io_tlb_nslabs) {
219 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
220 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
223 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
225 /* Get IO TLB memory from the low pages */
226 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
227 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
228 return;
230 if (io_tlb_start)
231 memblock_free_early(io_tlb_start,
232 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
233 pr_warn("Cannot allocate SWIOTLB buffer");
234 no_iotlb_memory = true;
238 * Systems with larger DMA zones (those that don't support ISA) can
239 * initialize the swiotlb later using the slab allocator if needed.
240 * This should be just like above, but with some error catching.
243 swiotlb_late_init_with_default_size(size_t default_size)
245 unsigned long bytes, req_nslabs = io_tlb_nslabs;
246 unsigned char *vstart = NULL;
247 unsigned int order;
248 int rc = 0;
250 if (!io_tlb_nslabs) {
251 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
252 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
256 * Get IO TLB memory from the low pages
258 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
259 io_tlb_nslabs = SLABS_PER_PAGE << order;
260 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
262 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
263 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
264 order);
265 if (vstart)
266 break;
267 order--;
270 if (!vstart) {
271 io_tlb_nslabs = req_nslabs;
272 return -ENOMEM;
274 if (order != get_order(bytes)) {
275 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
276 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
277 io_tlb_nslabs = SLABS_PER_PAGE << order;
279 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
280 if (rc)
281 free_pages((unsigned long)vstart, order);
282 return rc;
286 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
288 unsigned long i, bytes;
289 unsigned char *v_overflow_buffer;
291 bytes = nslabs << IO_TLB_SHIFT;
293 io_tlb_nslabs = nslabs;
294 io_tlb_start = virt_to_phys(tlb);
295 io_tlb_end = io_tlb_start + bytes;
297 memset(tlb, 0, bytes);
300 * Get the overflow emergency buffer
302 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
303 get_order(io_tlb_overflow));
304 if (!v_overflow_buffer)
305 goto cleanup2;
307 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
310 * Allocate and initialize the free list array. This array is used
311 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
312 * between io_tlb_start and io_tlb_end.
314 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
315 get_order(io_tlb_nslabs * sizeof(int)));
316 if (!io_tlb_list)
317 goto cleanup3;
319 io_tlb_orig_addr = (phys_addr_t *)
320 __get_free_pages(GFP_KERNEL,
321 get_order(io_tlb_nslabs *
322 sizeof(phys_addr_t)));
323 if (!io_tlb_orig_addr)
324 goto cleanup4;
326 for (i = 0; i < io_tlb_nslabs; i++) {
327 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
328 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
330 io_tlb_index = 0;
332 swiotlb_print_info();
334 late_alloc = 1;
336 return 0;
338 cleanup4:
339 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
340 sizeof(int)));
341 io_tlb_list = NULL;
342 cleanup3:
343 free_pages((unsigned long)v_overflow_buffer,
344 get_order(io_tlb_overflow));
345 io_tlb_overflow_buffer = 0;
346 cleanup2:
347 io_tlb_end = 0;
348 io_tlb_start = 0;
349 io_tlb_nslabs = 0;
350 return -ENOMEM;
353 void __init swiotlb_free(void)
355 if (!io_tlb_orig_addr)
356 return;
358 if (late_alloc) {
359 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
360 get_order(io_tlb_overflow));
361 free_pages((unsigned long)io_tlb_orig_addr,
362 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
363 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
364 sizeof(int)));
365 free_pages((unsigned long)phys_to_virt(io_tlb_start),
366 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
367 } else {
368 memblock_free_late(io_tlb_overflow_buffer,
369 PAGE_ALIGN(io_tlb_overflow));
370 memblock_free_late(__pa(io_tlb_orig_addr),
371 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
372 memblock_free_late(__pa(io_tlb_list),
373 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
374 memblock_free_late(io_tlb_start,
375 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
377 io_tlb_nslabs = 0;
380 int is_swiotlb_buffer(phys_addr_t paddr)
382 return paddr >= io_tlb_start && paddr < io_tlb_end;
386 * Bounce: copy the swiotlb buffer back to the original dma location
388 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
389 size_t size, enum dma_data_direction dir)
391 unsigned long pfn = PFN_DOWN(orig_addr);
392 unsigned char *vaddr = phys_to_virt(tlb_addr);
394 if (PageHighMem(pfn_to_page(pfn))) {
395 /* The buffer does not have a mapping. Map it in and copy */
396 unsigned int offset = orig_addr & ~PAGE_MASK;
397 char *buffer;
398 unsigned int sz = 0;
399 unsigned long flags;
401 while (size) {
402 sz = min_t(size_t, PAGE_SIZE - offset, size);
404 local_irq_save(flags);
405 buffer = kmap_atomic(pfn_to_page(pfn));
406 if (dir == DMA_TO_DEVICE)
407 memcpy(vaddr, buffer + offset, sz);
408 else
409 memcpy(buffer + offset, vaddr, sz);
410 kunmap_atomic(buffer);
411 local_irq_restore(flags);
413 size -= sz;
414 pfn++;
415 vaddr += sz;
416 offset = 0;
418 } else if (dir == DMA_TO_DEVICE) {
419 memcpy(vaddr, phys_to_virt(orig_addr), size);
420 } else {
421 memcpy(phys_to_virt(orig_addr), vaddr, size);
425 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
426 dma_addr_t tbl_dma_addr,
427 phys_addr_t orig_addr, size_t size,
428 enum dma_data_direction dir)
430 unsigned long flags;
431 phys_addr_t tlb_addr;
432 unsigned int nslots, stride, index, wrap;
433 int i;
434 unsigned long mask;
435 unsigned long offset_slots;
436 unsigned long max_slots;
438 if (no_iotlb_memory)
439 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
441 mask = dma_get_seg_boundary(hwdev);
443 tbl_dma_addr &= mask;
445 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
448 * Carefully handle integer overflow which can occur when mask == ~0UL.
450 max_slots = mask + 1
451 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
452 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
455 * For mappings greater than a page, we limit the stride (and
456 * hence alignment) to a page size.
458 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
459 if (size > PAGE_SIZE)
460 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
461 else
462 stride = 1;
464 BUG_ON(!nslots);
467 * Find suitable number of IO TLB entries size that will fit this
468 * request and allocate a buffer from that IO TLB pool.
470 spin_lock_irqsave(&io_tlb_lock, flags);
471 index = ALIGN(io_tlb_index, stride);
472 if (index >= io_tlb_nslabs)
473 index = 0;
474 wrap = index;
476 do {
477 while (iommu_is_span_boundary(index, nslots, offset_slots,
478 max_slots)) {
479 index += stride;
480 if (index >= io_tlb_nslabs)
481 index = 0;
482 if (index == wrap)
483 goto not_found;
487 * If we find a slot that indicates we have 'nslots' number of
488 * contiguous buffers, we allocate the buffers from that slot
489 * and mark the entries as '0' indicating unavailable.
491 if (io_tlb_list[index] >= nslots) {
492 int count = 0;
494 for (i = index; i < (int) (index + nslots); i++)
495 io_tlb_list[i] = 0;
496 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
497 io_tlb_list[i] = ++count;
498 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
501 * Update the indices to avoid searching in the next
502 * round.
504 io_tlb_index = ((index + nslots) < io_tlb_nslabs
505 ? (index + nslots) : 0);
507 goto found;
509 index += stride;
510 if (index >= io_tlb_nslabs)
511 index = 0;
512 } while (index != wrap);
514 not_found:
515 spin_unlock_irqrestore(&io_tlb_lock, flags);
516 if (printk_ratelimit())
517 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
518 return SWIOTLB_MAP_ERROR;
519 found:
520 spin_unlock_irqrestore(&io_tlb_lock, flags);
523 * Save away the mapping from the original address to the DMA address.
524 * This is needed when we sync the memory. Then we sync the buffer if
525 * needed.
527 for (i = 0; i < nslots; i++)
528 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
529 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
530 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
532 return tlb_addr;
534 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
537 * Allocates bounce buffer and returns its kernel virtual address.
540 static phys_addr_t
541 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
542 enum dma_data_direction dir)
544 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
546 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
550 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
552 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
553 size_t size, enum dma_data_direction dir)
555 unsigned long flags;
556 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
557 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
558 phys_addr_t orig_addr = io_tlb_orig_addr[index];
561 * First, sync the memory before unmapping the entry
563 if (orig_addr != INVALID_PHYS_ADDR &&
564 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
565 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
568 * Return the buffer to the free list by setting the corresponding
569 * entries to indicate the number of contiguous entries available.
570 * While returning the entries to the free list, we merge the entries
571 * with slots below and above the pool being returned.
573 spin_lock_irqsave(&io_tlb_lock, flags);
575 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
576 io_tlb_list[index + nslots] : 0);
578 * Step 1: return the slots to the free list, merging the
579 * slots with superceeding slots
581 for (i = index + nslots - 1; i >= index; i--) {
582 io_tlb_list[i] = ++count;
583 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
586 * Step 2: merge the returned slots with the preceding slots,
587 * if available (non zero)
589 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
590 io_tlb_list[i] = ++count;
592 spin_unlock_irqrestore(&io_tlb_lock, flags);
594 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
596 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
597 size_t size, enum dma_data_direction dir,
598 enum dma_sync_target target)
600 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
601 phys_addr_t orig_addr = io_tlb_orig_addr[index];
603 if (orig_addr == INVALID_PHYS_ADDR)
604 return;
605 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
607 switch (target) {
608 case SYNC_FOR_CPU:
609 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
610 swiotlb_bounce(orig_addr, tlb_addr,
611 size, DMA_FROM_DEVICE);
612 else
613 BUG_ON(dir != DMA_TO_DEVICE);
614 break;
615 case SYNC_FOR_DEVICE:
616 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
617 swiotlb_bounce(orig_addr, tlb_addr,
618 size, DMA_TO_DEVICE);
619 else
620 BUG_ON(dir != DMA_FROM_DEVICE);
621 break;
622 default:
623 BUG();
626 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
628 void *
629 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
630 dma_addr_t *dma_handle, gfp_t flags)
632 dma_addr_t dev_addr;
633 void *ret;
634 int order = get_order(size);
635 u64 dma_mask = DMA_BIT_MASK(32);
637 if (hwdev && hwdev->coherent_dma_mask)
638 dma_mask = hwdev->coherent_dma_mask;
640 ret = (void *)__get_free_pages(flags, order);
641 if (ret) {
642 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
643 if (dev_addr + size - 1 > dma_mask) {
645 * The allocated memory isn't reachable by the device.
647 free_pages((unsigned long) ret, order);
648 ret = NULL;
651 if (!ret) {
653 * We are either out of memory or the device can't DMA to
654 * GFP_DMA memory; fall back on map_single(), which
655 * will grab memory from the lowest available address range.
657 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
658 if (paddr == SWIOTLB_MAP_ERROR)
659 return NULL;
661 ret = phys_to_virt(paddr);
662 dev_addr = phys_to_dma(hwdev, paddr);
664 /* Confirm address can be DMA'd by device */
665 if (dev_addr + size - 1 > dma_mask) {
666 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
667 (unsigned long long)dma_mask,
668 (unsigned long long)dev_addr);
670 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
671 swiotlb_tbl_unmap_single(hwdev, paddr,
672 size, DMA_TO_DEVICE);
673 return NULL;
677 *dma_handle = dev_addr;
678 memset(ret, 0, size);
680 return ret;
682 EXPORT_SYMBOL(swiotlb_alloc_coherent);
684 void
685 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
686 dma_addr_t dev_addr)
688 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
690 WARN_ON(irqs_disabled());
691 if (!is_swiotlb_buffer(paddr))
692 free_pages((unsigned long)vaddr, get_order(size));
693 else
694 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
695 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
697 EXPORT_SYMBOL(swiotlb_free_coherent);
699 static void
700 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
701 int do_panic)
704 * Ran out of IOMMU space for this operation. This is very bad.
705 * Unfortunately the drivers cannot handle this operation properly.
706 * unless they check for dma_mapping_error (most don't)
707 * When the mapping is small enough return a static buffer to limit
708 * the damage, or panic when the transfer is too big.
710 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
711 "device %s\n", size, dev ? dev_name(dev) : "?");
713 if (size <= io_tlb_overflow || !do_panic)
714 return;
716 if (dir == DMA_BIDIRECTIONAL)
717 panic("DMA: Random memory could be DMA accessed\n");
718 if (dir == DMA_FROM_DEVICE)
719 panic("DMA: Random memory could be DMA written\n");
720 if (dir == DMA_TO_DEVICE)
721 panic("DMA: Random memory could be DMA read\n");
725 * Map a single buffer of the indicated size for DMA in streaming mode. The
726 * physical address to use is returned.
728 * Once the device is given the dma address, the device owns this memory until
729 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
731 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
732 unsigned long offset, size_t size,
733 enum dma_data_direction dir,
734 struct dma_attrs *attrs)
736 phys_addr_t map, phys = page_to_phys(page) + offset;
737 dma_addr_t dev_addr = phys_to_dma(dev, phys);
739 BUG_ON(dir == DMA_NONE);
741 * If the address happens to be in the device's DMA window,
742 * we can safely return the device addr and not worry about bounce
743 * buffering it.
745 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
746 return dev_addr;
748 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
750 /* Oh well, have to allocate and map a bounce buffer. */
751 map = map_single(dev, phys, size, dir);
752 if (map == SWIOTLB_MAP_ERROR) {
753 swiotlb_full(dev, size, dir, 1);
754 return phys_to_dma(dev, io_tlb_overflow_buffer);
757 dev_addr = phys_to_dma(dev, map);
759 /* Ensure that the address returned is DMA'ble */
760 if (!dma_capable(dev, dev_addr, size)) {
761 swiotlb_tbl_unmap_single(dev, map, size, dir);
762 return phys_to_dma(dev, io_tlb_overflow_buffer);
765 return dev_addr;
767 EXPORT_SYMBOL_GPL(swiotlb_map_page);
770 * Unmap a single streaming mode DMA translation. The dma_addr and size must
771 * match what was provided for in a previous swiotlb_map_page call. All
772 * other usages are undefined.
774 * After this call, reads by the cpu to the buffer are guaranteed to see
775 * whatever the device wrote there.
777 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
778 size_t size, enum dma_data_direction dir)
780 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
782 BUG_ON(dir == DMA_NONE);
784 if (is_swiotlb_buffer(paddr)) {
785 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
786 return;
789 if (dir != DMA_FROM_DEVICE)
790 return;
793 * phys_to_virt doesn't work with hihgmem page but we could
794 * call dma_mark_clean() with hihgmem page here. However, we
795 * are fine since dma_mark_clean() is null on POWERPC. We can
796 * make dma_mark_clean() take a physical address if necessary.
798 dma_mark_clean(phys_to_virt(paddr), size);
801 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
802 size_t size, enum dma_data_direction dir,
803 struct dma_attrs *attrs)
805 unmap_single(hwdev, dev_addr, size, dir);
807 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
810 * Make physical memory consistent for a single streaming mode DMA translation
811 * after a transfer.
813 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
814 * using the cpu, yet do not wish to teardown the dma mapping, you must
815 * call this function before doing so. At the next point you give the dma
816 * address back to the card, you must first perform a
817 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
819 static void
820 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
821 size_t size, enum dma_data_direction dir,
822 enum dma_sync_target target)
824 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
826 BUG_ON(dir == DMA_NONE);
828 if (is_swiotlb_buffer(paddr)) {
829 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
830 return;
833 if (dir != DMA_FROM_DEVICE)
834 return;
836 dma_mark_clean(phys_to_virt(paddr), size);
839 void
840 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
841 size_t size, enum dma_data_direction dir)
843 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
845 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
847 void
848 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
849 size_t size, enum dma_data_direction dir)
851 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
853 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
856 * Map a set of buffers described by scatterlist in streaming mode for DMA.
857 * This is the scatter-gather version of the above swiotlb_map_page
858 * interface. Here the scatter gather list elements are each tagged with the
859 * appropriate dma address and length. They are obtained via
860 * sg_dma_{address,length}(SG).
862 * NOTE: An implementation may be able to use a smaller number of
863 * DMA address/length pairs than there are SG table elements.
864 * (for example via virtual mapping capabilities)
865 * The routine returns the number of addr/length pairs actually
866 * used, at most nents.
868 * Device ownership issues as mentioned above for swiotlb_map_page are the
869 * same here.
872 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
873 enum dma_data_direction dir, struct dma_attrs *attrs)
875 struct scatterlist *sg;
876 int i;
878 BUG_ON(dir == DMA_NONE);
880 for_each_sg(sgl, sg, nelems, i) {
881 phys_addr_t paddr = sg_phys(sg);
882 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
884 if (swiotlb_force ||
885 !dma_capable(hwdev, dev_addr, sg->length)) {
886 phys_addr_t map = map_single(hwdev, sg_phys(sg),
887 sg->length, dir);
888 if (map == SWIOTLB_MAP_ERROR) {
889 /* Don't panic here, we expect map_sg users
890 to do proper error handling. */
891 swiotlb_full(hwdev, sg->length, dir, 0);
892 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
893 attrs);
894 sg_dma_len(sgl) = 0;
895 return 0;
897 sg->dma_address = phys_to_dma(hwdev, map);
898 } else
899 sg->dma_address = dev_addr;
900 sg_dma_len(sg) = sg->length;
902 return nelems;
904 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
907 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
908 enum dma_data_direction dir)
910 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
912 EXPORT_SYMBOL(swiotlb_map_sg);
915 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
916 * concerning calls here are the same as for swiotlb_unmap_page() above.
918 void
919 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
920 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
922 struct scatterlist *sg;
923 int i;
925 BUG_ON(dir == DMA_NONE);
927 for_each_sg(sgl, sg, nelems, i)
928 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
931 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
933 void
934 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
935 enum dma_data_direction dir)
937 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
939 EXPORT_SYMBOL(swiotlb_unmap_sg);
942 * Make physical memory consistent for a set of streaming mode DMA translations
943 * after a transfer.
945 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
946 * and usage.
948 static void
949 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
950 int nelems, enum dma_data_direction dir,
951 enum dma_sync_target target)
953 struct scatterlist *sg;
954 int i;
956 for_each_sg(sgl, sg, nelems, i)
957 swiotlb_sync_single(hwdev, sg->dma_address,
958 sg_dma_len(sg), dir, target);
961 void
962 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
963 int nelems, enum dma_data_direction dir)
965 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
967 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
969 void
970 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
971 int nelems, enum dma_data_direction dir)
973 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
975 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
978 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
980 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
982 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
985 * Return whether the given device DMA address mask can be supported
986 * properly. For example, if your device can only drive the low 24-bits
987 * during bus mastering, then you would pass 0x00ffffff as the mask to
988 * this function.
991 swiotlb_dma_supported(struct device *hwdev, u64 mask)
993 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
995 EXPORT_SYMBOL(swiotlb_dma_supported);