2 * core routines for the asynchronous memory transfer/transform api
4 * Copyright © 2006, Intel Corporation.
6 * Dan Williams <dan.j.williams@intel.com>
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 #include <linux/rculist.h>
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/async_tx.h>
31 #ifdef CONFIG_DMA_ENGINE
32 static int __init
async_tx_init(void)
34 async_dmaengine_get();
36 printk(KERN_INFO
"async_tx: api initialized (async)\n");
41 static void __exit
async_tx_exit(void)
43 async_dmaengine_put();
46 module_init(async_tx_init
);
47 module_exit(async_tx_exit
);
50 * __async_tx_find_channel - find a channel to carry out the operation or let
51 * the transaction execute synchronously
52 * @submit: transaction dependency and submission modifiers
53 * @tx_type: transaction type
56 __async_tx_find_channel(struct async_submit_ctl
*submit
,
57 enum dma_transaction_type tx_type
)
59 struct dma_async_tx_descriptor
*depend_tx
= submit
->depend_tx
;
61 /* see if we can keep the chain on one channel */
63 dma_has_cap(tx_type
, depend_tx
->chan
->device
->cap_mask
))
64 return depend_tx
->chan
;
65 return async_dma_find_channel(tx_type
);
67 EXPORT_SYMBOL_GPL(__async_tx_find_channel
);
72 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
74 * @depend_tx: the operation that must finish before the new operation runs
75 * @tx: the new operation
78 async_tx_channel_switch(struct dma_async_tx_descriptor
*depend_tx
,
79 struct dma_async_tx_descriptor
*tx
)
81 struct dma_chan
*chan
= depend_tx
->chan
;
82 struct dma_device
*device
= chan
->device
;
83 struct dma_async_tx_descriptor
*intr_tx
= (void *) ~0;
85 /* first check to see if we can still append to depend_tx */
87 if (txd_parent(depend_tx
) && depend_tx
->chan
== tx
->chan
) {
88 txd_chain(depend_tx
, tx
);
91 txd_unlock(depend_tx
);
93 /* attached dependency, flush the parent channel */
95 device
->device_issue_pending(chan
);
99 /* see if we can schedule an interrupt
100 * otherwise poll for completion
102 if (dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
103 intr_tx
= device
->device_prep_dma_interrupt(chan
, 0);
108 intr_tx
->callback
= NULL
;
109 intr_tx
->callback_param
= NULL
;
110 /* safe to chain outside the lock since we know we are
113 txd_chain(intr_tx
, tx
);
115 /* check if we need to append */
117 if (txd_parent(depend_tx
)) {
118 txd_chain(depend_tx
, intr_tx
);
119 async_tx_ack(intr_tx
);
122 txd_unlock(depend_tx
);
125 txd_clear_parent(intr_tx
);
126 intr_tx
->tx_submit(intr_tx
);
127 async_tx_ack(intr_tx
);
129 device
->device_issue_pending(chan
);
131 if (dma_wait_for_async_tx(depend_tx
) != DMA_COMPLETE
)
132 panic("%s: DMA error waiting for depend_tx\n",
140 * submit_disposition - flags for routing an incoming operation
141 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
142 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
143 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
145 * while holding depend_tx->lock we must avoid submitting new operations
146 * to prevent a circular locking dependency with drivers that already
147 * hold a channel lock when calling async_tx_run_dependencies.
149 enum submit_disposition
{
151 ASYNC_TX_CHANNEL_SWITCH
,
152 ASYNC_TX_DIRECT_SUBMIT
,
156 async_tx_submit(struct dma_chan
*chan
, struct dma_async_tx_descriptor
*tx
,
157 struct async_submit_ctl
*submit
)
159 struct dma_async_tx_descriptor
*depend_tx
= submit
->depend_tx
;
161 tx
->callback
= submit
->cb_fn
;
162 tx
->callback_param
= submit
->cb_param
;
165 enum submit_disposition s
;
167 /* sanity check the dependency chain:
168 * 1/ if ack is already set then we cannot be sure
169 * we are referring to the correct operation
170 * 2/ dependencies are 1:1 i.e. two transactions can
171 * not depend on the same parent
173 BUG_ON(async_tx_test_ack(depend_tx
) || txd_next(depend_tx
) ||
176 /* the lock prevents async_tx_run_dependencies from missing
177 * the setting of ->next when ->parent != NULL
180 if (txd_parent(depend_tx
)) {
181 /* we have a parent so we can not submit directly
182 * if we are staying on the same channel: append
183 * else: channel switch
185 if (depend_tx
->chan
== chan
) {
186 txd_chain(depend_tx
, tx
);
187 s
= ASYNC_TX_SUBMITTED
;
189 s
= ASYNC_TX_CHANNEL_SWITCH
;
191 /* we do not have a parent so we may be able to submit
192 * directly if we are staying on the same channel
194 if (depend_tx
->chan
== chan
)
195 s
= ASYNC_TX_DIRECT_SUBMIT
;
197 s
= ASYNC_TX_CHANNEL_SWITCH
;
199 txd_unlock(depend_tx
);
202 case ASYNC_TX_SUBMITTED
:
204 case ASYNC_TX_CHANNEL_SWITCH
:
205 async_tx_channel_switch(depend_tx
, tx
);
207 case ASYNC_TX_DIRECT_SUBMIT
:
208 txd_clear_parent(tx
);
213 txd_clear_parent(tx
);
217 if (submit
->flags
& ASYNC_TX_ACK
)
221 async_tx_ack(depend_tx
);
223 EXPORT_SYMBOL_GPL(async_tx_submit
);
226 * async_trigger_callback - schedules the callback function to be run
227 * @submit: submission and completion parameters
229 * honored flags: ASYNC_TX_ACK
231 * The callback is run after any dependent operations have completed.
233 struct dma_async_tx_descriptor
*
234 async_trigger_callback(struct async_submit_ctl
*submit
)
236 struct dma_chan
*chan
;
237 struct dma_device
*device
;
238 struct dma_async_tx_descriptor
*tx
;
239 struct dma_async_tx_descriptor
*depend_tx
= submit
->depend_tx
;
242 chan
= depend_tx
->chan
;
243 device
= chan
->device
;
245 /* see if we can schedule an interrupt
246 * otherwise poll for completion
248 if (device
&& !dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
251 tx
= device
? device
->device_prep_dma_interrupt(chan
, 0) : NULL
;
256 pr_debug("%s: (async)\n", __func__
);
258 async_tx_submit(chan
, tx
, submit
);
260 pr_debug("%s: (sync)\n", __func__
);
262 /* wait for any prerequisite operations */
263 async_tx_quiesce(&submit
->depend_tx
);
265 async_tx_sync_epilog(submit
);
270 EXPORT_SYMBOL_GPL(async_trigger_callback
);
273 * async_tx_quiesce - ensure tx is complete and freeable upon return
274 * @tx - transaction to quiesce
276 void async_tx_quiesce(struct dma_async_tx_descriptor
**tx
)
279 /* if ack is already set then we cannot be sure
280 * we are referring to the correct operation
282 BUG_ON(async_tx_test_ack(*tx
));
283 if (dma_wait_for_async_tx(*tx
) != DMA_COMPLETE
)
284 panic("%s: DMA error waiting for transaction\n",
290 EXPORT_SYMBOL_GPL(async_tx_quiesce
);
292 MODULE_AUTHOR("Intel Corporation");
293 MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
294 MODULE_LICENSE("GPL");