2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22 #include <linux/platform_data/atmel.h>
24 #include <linux/of_device.h>
25 #include <linux/of_gpio.h>
26 #include <video/of_display_timing.h>
27 #include <linux/regulator/consumer.h>
28 #include <video/videomode.h>
32 #include <video/atmel_lcdc.h>
34 struct atmel_lcdfb_config
{
35 bool have_alt_pixclock
;
37 bool have_intensity_bit
;
40 /* LCD Controller info data structure, stored in device platform_data */
41 struct atmel_lcdfb_info
{
46 struct work_struct task
;
48 unsigned int smem_len
;
49 struct platform_device
*pdev
;
53 struct backlight_device
*backlight
;
57 u32 pseudo_palette
[16];
58 bool have_intensity_bit
;
60 struct atmel_lcdfb_pdata pdata
;
62 struct atmel_lcdfb_config
*config
;
63 struct regulator
*reg_lcd
;
66 struct atmel_lcdfb_power_ctrl_gpio
{
70 struct list_head list
;
73 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
74 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
76 /* configurable parameters */
77 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
78 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
79 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
81 static struct atmel_lcdfb_config at91sam9261_config
= {
83 .have_intensity_bit
= true,
86 static struct atmel_lcdfb_config at91sam9263_config
= {
87 .have_intensity_bit
= true,
90 static struct atmel_lcdfb_config at91sam9g10_config
= {
94 static struct atmel_lcdfb_config at91sam9g45_config
= {
95 .have_alt_pixclock
= true,
98 static struct atmel_lcdfb_config at91sam9g45es_config
= {
101 static struct atmel_lcdfb_config at91sam9rl_config
= {
102 .have_intensity_bit
= true,
105 static struct atmel_lcdfb_config at32ap_config
= {
109 static const struct platform_device_id atmel_lcdfb_devtypes
[] = {
111 .name
= "at91sam9261-lcdfb",
112 .driver_data
= (unsigned long)&at91sam9261_config
,
114 .name
= "at91sam9263-lcdfb",
115 .driver_data
= (unsigned long)&at91sam9263_config
,
117 .name
= "at91sam9g10-lcdfb",
118 .driver_data
= (unsigned long)&at91sam9g10_config
,
120 .name
= "at91sam9g45-lcdfb",
121 .driver_data
= (unsigned long)&at91sam9g45_config
,
123 .name
= "at91sam9g45es-lcdfb",
124 .driver_data
= (unsigned long)&at91sam9g45es_config
,
126 .name
= "at91sam9rl-lcdfb",
127 .driver_data
= (unsigned long)&at91sam9rl_config
,
129 .name
= "at32ap-lcdfb",
130 .driver_data
= (unsigned long)&at32ap_config
,
135 MODULE_DEVICE_TABLE(platform
, atmel_lcdfb_devtypes
);
137 static struct atmel_lcdfb_config
*
138 atmel_lcdfb_get_config(struct platform_device
*pdev
)
142 data
= platform_get_device_id(pdev
)->driver_data
;
144 return (struct atmel_lcdfb_config
*)data
;
147 #if defined(CONFIG_ARCH_AT91)
148 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
149 | FBINFO_PARTIAL_PAN_OK \
150 | FBINFO_HWACCEL_YPAN)
152 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
153 struct fb_var_screeninfo
*var
,
154 struct fb_info
*info
)
158 #elif defined(CONFIG_AVR32)
159 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
160 | FBINFO_PARTIAL_PAN_OK \
161 | FBINFO_HWACCEL_XPAN \
162 | FBINFO_HWACCEL_YPAN)
164 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
165 struct fb_var_screeninfo
*var
,
166 struct fb_info
*info
)
171 pixeloff
= (var
->xoffset
* info
->var
.bits_per_pixel
) & 0x1f;
173 dma2dcfg
= (info
->var
.xres_virtual
- info
->var
.xres
)
174 * info
->var
.bits_per_pixel
/ 8;
175 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
176 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
178 /* Update configuration */
179 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
180 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
181 | ATMEL_LCDC_DMAUPDT
);
185 static u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
186 | ATMEL_LCDC_POL_POSITIVE
187 | ATMEL_LCDC_ENA_PWMENABLE
;
189 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
191 /* some bl->props field just changed */
192 static int atmel_bl_update_status(struct backlight_device
*bl
)
194 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
195 int power
= sinfo
->bl_power
;
196 int brightness
= bl
->props
.brightness
;
198 /* REVISIT there may be a meaningful difference between
199 * fb_blank and power ... there seem to be some cases
200 * this doesn't handle correctly.
202 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
203 power
= bl
->props
.fb_blank
;
204 else if (bl
->props
.power
!= sinfo
->bl_power
)
205 power
= bl
->props
.power
;
207 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
208 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
209 else if (power
!= FB_BLANK_UNBLANK
)
212 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
213 if (contrast_ctr
& ATMEL_LCDC_POL_POSITIVE
)
214 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
215 brightness
? contrast_ctr
: 0);
217 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
219 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
224 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
226 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
228 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
231 static const struct backlight_ops atmel_lcdc_bl_ops
= {
232 .update_status
= atmel_bl_update_status
,
233 .get_brightness
= atmel_bl_get_brightness
,
236 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
238 struct backlight_properties props
;
239 struct backlight_device
*bl
;
241 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
243 if (sinfo
->backlight
)
246 memset(&props
, 0, sizeof(struct backlight_properties
));
247 props
.type
= BACKLIGHT_RAW
;
248 props
.max_brightness
= 0xff;
249 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
, sinfo
,
250 &atmel_lcdc_bl_ops
, &props
);
252 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
256 sinfo
->backlight
= bl
;
258 bl
->props
.power
= FB_BLANK_UNBLANK
;
259 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
260 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
263 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
265 if (!sinfo
->backlight
)
268 if (sinfo
->backlight
->ops
) {
269 sinfo
->backlight
->props
.power
= FB_BLANK_POWERDOWN
;
270 sinfo
->backlight
->ops
->update_status(sinfo
->backlight
);
272 backlight_device_unregister(sinfo
->backlight
);
277 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
279 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
282 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
288 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
290 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
292 /* contrast pwm can be 'inverted' */
293 if (pdata
->lcdcon_pol_negative
)
294 contrast_ctr
&= ~(ATMEL_LCDC_POL_POSITIVE
);
296 /* have some default contrast/backlight settings */
297 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
298 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
300 if (pdata
->lcdcon_is_backlight
)
301 init_backlight(sinfo
);
304 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info
*sinfo
, int on
)
307 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
309 if (pdata
->atmel_lcdfb_power_control
)
310 pdata
->atmel_lcdfb_power_control(pdata
, on
);
311 else if (sinfo
->reg_lcd
) {
313 ret
= regulator_enable(sinfo
->reg_lcd
);
315 dev_err(&sinfo
->pdev
->dev
,
316 "lcd regulator enable failed: %d\n", ret
);
318 ret
= regulator_disable(sinfo
->reg_lcd
);
320 dev_err(&sinfo
->pdev
->dev
,
321 "lcd regulator disable failed: %d\n", ret
);
326 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata
= {
327 .type
= FB_TYPE_PACKED_PIXELS
,
328 .visual
= FB_VISUAL_TRUECOLOR
,
332 .accel
= FB_ACCEL_NONE
,
335 static unsigned long compute_hozval(struct atmel_lcdfb_info
*sinfo
,
338 unsigned long lcdcon2
;
341 if (!sinfo
->config
->have_hozval
)
344 lcdcon2
= lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
);
346 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
348 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
351 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
352 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
353 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
354 value
= DIV_ROUND_UP(value
, 4);
356 value
= DIV_ROUND_UP(value
, 8);
362 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info
*sinfo
)
364 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
366 /* Turn off the LCD controller and the DMA controller */
367 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
368 pdata
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
370 /* Wait for the LCDC core to become idle */
371 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
374 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
377 static void atmel_lcdfb_stop(struct atmel_lcdfb_info
*sinfo
)
379 atmel_lcdfb_stop_nowait(sinfo
);
381 /* Wait for DMA engine to become idle... */
382 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
386 static void atmel_lcdfb_start(struct atmel_lcdfb_info
*sinfo
)
388 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
390 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, pdata
->default_dmacon
);
391 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
392 (pdata
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
)
396 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
397 struct fb_var_screeninfo
*var
)
399 struct atmel_lcdfb_info
*sinfo
= info
->par
;
400 struct fb_fix_screeninfo
*fix
= &info
->fix
;
401 unsigned long dma_addr
;
403 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
404 + var
->xoffset
* info
->var
.bits_per_pixel
/ 8);
408 /* Set framebuffer DMA base address and pixel offset */
409 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
411 atmel_lcdfb_update_dma2d(sinfo
, var
, info
);
414 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
416 struct fb_info
*info
= sinfo
->info
;
418 dma_free_writecombine(info
->device
, info
->fix
.smem_len
,
419 info
->screen_base
, info
->fix
.smem_start
);
423 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
424 * @sinfo: the frame buffer to allocate memory for
426 * This function is called only from the atmel_lcdfb_probe()
427 * so no locking by fb_info->mm_lock around smem_len setting is needed.
429 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
431 struct fb_info
*info
= sinfo
->info
;
432 struct fb_var_screeninfo
*var
= &info
->var
;
433 unsigned int smem_len
;
435 smem_len
= (var
->xres_virtual
* var
->yres_virtual
436 * ((var
->bits_per_pixel
+ 7) / 8));
437 info
->fix
.smem_len
= max(smem_len
, sinfo
->smem_len
);
439 info
->screen_base
= dma_alloc_writecombine(info
->device
, info
->fix
.smem_len
,
440 (dma_addr_t
*)&info
->fix
.smem_start
, GFP_KERNEL
);
442 if (!info
->screen_base
) {
446 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
451 static const struct fb_videomode
*atmel_lcdfb_choose_mode(struct fb_var_screeninfo
*var
,
452 struct fb_info
*info
)
454 struct fb_videomode varfbmode
;
455 const struct fb_videomode
*fbmode
= NULL
;
457 fb_var_to_videomode(&varfbmode
, var
);
458 fbmode
= fb_find_nearest_mode(&varfbmode
, &info
->modelist
);
460 fb_videomode_to_var(var
, fbmode
);
466 * atmel_lcdfb_check_var - Validates a var passed in.
467 * @var: frame buffer variable screen structure
468 * @info: frame buffer structure that represents a single frame buffer
470 * Checks to see if the hardware supports the state requested by
471 * var passed in. This function does not alter the hardware
472 * state!!! This means the data stored in struct fb_info and
473 * struct atmel_lcdfb_info do not change. This includes the var
474 * inside of struct fb_info. Do NOT change these. This function
475 * can be called on its own if we intent to only test a mode and
476 * not actually set it. The stuff in modedb.c is a example of
477 * this. If the var passed in is slightly off by what the
478 * hardware can support then we alter the var PASSED in to what
479 * we can do. If the hardware doesn't support mode change a
480 * -EINVAL will be returned by the upper layers. You don't need
481 * to implement this function then. If you hardware doesn't
482 * support changing the resolution then this function is not
483 * needed. In this case the driver would just provide a var that
484 * represents the static state the screen is in.
486 * Returns negative errno on error, or zero on success.
488 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
489 struct fb_info
*info
)
491 struct device
*dev
= info
->device
;
492 struct atmel_lcdfb_info
*sinfo
= info
->par
;
493 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
494 unsigned long clk_value_khz
;
496 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
498 dev_dbg(dev
, "%s:\n", __func__
);
500 if (!(var
->pixclock
&& var
->bits_per_pixel
)) {
501 /* choose a suitable mode if possible */
502 if (!atmel_lcdfb_choose_mode(var
, info
)) {
503 dev_err(dev
, "needed value not specified\n");
508 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
509 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
510 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
511 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
513 if (PICOS2KHZ(var
->pixclock
) > clk_value_khz
) {
514 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
518 /* Do not allow to have real resoulution larger than virtual */
519 if (var
->xres
> var
->xres_virtual
)
520 var
->xres_virtual
= var
->xres
;
522 if (var
->yres
> var
->yres_virtual
)
523 var
->yres_virtual
= var
->yres
;
525 /* Force same alignment for each line */
526 var
->xres
= (var
->xres
+ 3) & ~3UL;
527 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
529 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
530 var
->transp
.msb_right
= 0;
531 var
->transp
.offset
= var
->transp
.length
= 0;
532 var
->xoffset
= var
->yoffset
= 0;
534 if (info
->fix
.smem_len
) {
535 unsigned int smem_len
= (var
->xres_virtual
* var
->yres_virtual
536 * ((var
->bits_per_pixel
+ 7) / 8));
537 if (smem_len
> info
->fix
.smem_len
) {
538 dev_err(dev
, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
539 info
->fix
.smem_len
, smem_len
);
544 /* Saturate vertical and horizontal timings at maximum values */
545 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
546 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
547 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
548 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
549 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
551 var
->right_margin
= min_t(u32
, var
->right_margin
,
552 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
553 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
554 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
555 var
->left_margin
= min_t(u32
, var
->left_margin
,
558 /* Some parameters can't be zero */
559 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
560 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
561 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
562 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
564 switch (var
->bits_per_pixel
) {
569 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
570 var
->red
.length
= var
->green
.length
= var
->blue
.length
571 = var
->bits_per_pixel
;
574 /* Older SOCs use IBGR:555 rather than BGR:565. */
575 if (sinfo
->config
->have_intensity_bit
)
576 var
->green
.length
= 5;
578 var
->green
.length
= 6;
580 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
582 var
->red
.offset
= var
->green
.length
+ 5;
583 var
->blue
.offset
= 0;
587 var
->blue
.offset
= var
->green
.length
+ 5;
589 var
->green
.offset
= 5;
590 var
->red
.length
= var
->blue
.length
= 5;
593 var
->transp
.offset
= 24;
594 var
->transp
.length
= 8;
597 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
599 var
->red
.offset
= 16;
600 var
->blue
.offset
= 0;
604 var
->blue
.offset
= 16;
606 var
->green
.offset
= 8;
607 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
610 dev_err(dev
, "color depth %d not supported\n",
611 var
->bits_per_pixel
);
621 static void atmel_lcdfb_reset(struct atmel_lcdfb_info
*sinfo
)
625 atmel_lcdfb_stop(sinfo
);
626 atmel_lcdfb_start(sinfo
);
630 * atmel_lcdfb_set_par - Alters the hardware state.
631 * @info: frame buffer structure that represents a single frame buffer
633 * Using the fb_var_screeninfo in fb_info we set the resolution
634 * of the this particular framebuffer. This function alters the
635 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
636 * not alter var in fb_info since we are using that data. This
637 * means we depend on the data in var inside fb_info to be
638 * supported by the hardware. atmel_lcdfb_check_var is always called
639 * before atmel_lcdfb_set_par to ensure this. Again if you can't
640 * change the resolution you don't need this function.
643 static int atmel_lcdfb_set_par(struct fb_info
*info
)
645 struct atmel_lcdfb_info
*sinfo
= info
->par
;
646 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
647 unsigned long hozval_linesz
;
649 unsigned long clk_value_khz
;
650 unsigned long bits_per_line
;
651 unsigned long pix_factor
= 2;
655 dev_dbg(info
->device
, "%s:\n", __func__
);
656 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
657 info
->var
.xres
, info
->var
.yres
,
658 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
660 atmel_lcdfb_stop_nowait(sinfo
);
662 if (info
->var
.bits_per_pixel
== 1)
663 info
->fix
.visual
= FB_VISUAL_MONO01
;
664 else if (info
->var
.bits_per_pixel
<= 8)
665 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
667 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
669 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
670 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
672 /* Re-initialize the DMA engine... */
673 dev_dbg(info
->device
, " * update DMA engine\n");
674 atmel_lcdfb_update_dma(info
, &info
->var
);
676 /* ...set frame size and burst length = 8 words (?) */
677 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
678 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
679 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
681 /* Now, the LCDC core... */
683 /* Set pixel clock */
684 if (sinfo
->config
->have_alt_pixclock
)
687 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
689 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
691 if (value
< pix_factor
) {
692 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
693 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
695 value
= (value
/ pix_factor
) - 1;
696 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n",
698 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
,
699 value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
701 KHZ2PICOS(clk_value_khz
/ (pix_factor
* (value
+ 1)));
702 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
703 PICOS2KHZ(info
->var
.pixclock
));
707 /* Initialize control register 2 */
708 value
= pdata
->default_lcdcon2
;
710 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
711 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
712 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
713 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
715 switch (info
->var
.bits_per_pixel
) {
716 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
717 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
718 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
719 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
720 case 15: /* fall through */
721 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
722 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
723 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
724 default: BUG(); break;
726 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
727 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
729 /* Vertical timing */
730 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
731 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
732 value
|= info
->var
.lower_margin
;
733 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
734 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
736 /* Horizontal timing */
737 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
738 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
739 value
|= (info
->var
.left_margin
- 1);
740 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
741 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
743 /* Horizontal value (aka line size) */
744 hozval_linesz
= compute_hozval(sinfo
, info
->var
.xres
);
747 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
748 value
|= info
->var
.yres
- 1;
749 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
750 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
752 /* FIFO Threshold: Use formula from data sheet */
753 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
754 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
756 /* Toggle LCD_MODE every frame */
757 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
759 /* Disable all interrupts */
760 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
761 /* Enable FIFO & DMA errors */
762 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
| ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
764 /* ...wait for DMA engine to become idle... */
765 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
768 atmel_lcdfb_start(sinfo
);
770 dev_dbg(info
->device
, " * DONE\n");
775 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
778 chan
>>= 16 - bf
->length
;
779 return chan
<< bf
->offset
;
783 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
784 * @regno: Which register in the CLUT we are programming
785 * @red: The red value which can be up to 16 bits wide
786 * @green: The green value which can be up to 16 bits wide
787 * @blue: The blue value which can be up to 16 bits wide.
788 * @transp: If supported the alpha value which can be up to 16 bits wide.
789 * @info: frame buffer info structure
791 * Set a single color register. The values supplied have a 16 bit
792 * magnitude which needs to be scaled in this function for the hardware.
793 * Things to take into consideration are how many color registers, if
794 * any, are supported with the current color visual. With truecolor mode
795 * no color palettes are supported. Here a pseudo palette is created
796 * which we store the value in pseudo_palette in struct fb_info. For
797 * pseudocolor mode we have a limited color palette. To deal with this
798 * we can program what color is displayed for a particular pixel value.
799 * DirectColor is similar in that we can program each color field. If
800 * we have a static colormap we don't need to implement this function.
802 * Returns negative errno on error, or zero on success. In an
803 * ideal world, this would have been the case, but as it turns
804 * out, the other drivers return 1 on failure, so that's what
807 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
808 unsigned int green
, unsigned int blue
,
809 unsigned int transp
, struct fb_info
*info
)
811 struct atmel_lcdfb_info
*sinfo
= info
->par
;
812 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
817 if (info
->var
.grayscale
)
818 red
= green
= blue
= (19595 * red
+ 38470 * green
819 + 7471 * blue
) >> 16;
821 switch (info
->fix
.visual
) {
822 case FB_VISUAL_TRUECOLOR
:
824 pal
= info
->pseudo_palette
;
826 val
= chan_to_field(red
, &info
->var
.red
);
827 val
|= chan_to_field(green
, &info
->var
.green
);
828 val
|= chan_to_field(blue
, &info
->var
.blue
);
835 case FB_VISUAL_PSEUDOCOLOR
:
837 if (sinfo
->config
->have_intensity_bit
) {
838 /* old style I+BGR:555 */
839 val
= ((red
>> 11) & 0x001f);
840 val
|= ((green
>> 6) & 0x03e0);
841 val
|= ((blue
>> 1) & 0x7c00);
844 * TODO: intensity bit. Maybe something like
845 * ~(red[10] ^ green[10] ^ blue[10]) & 1
848 /* new style BGR:565 / RGB:565 */
849 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
850 val
= ((blue
>> 11) & 0x001f);
851 val
|= ((red
>> 0) & 0xf800);
853 val
= ((red
>> 11) & 0x001f);
854 val
|= ((blue
>> 0) & 0xf800);
857 val
|= ((green
>> 5) & 0x07e0);
860 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
865 case FB_VISUAL_MONO01
:
867 val
= (regno
== 0) ? 0x00 : 0x1F;
868 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
878 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
879 struct fb_info
*info
)
881 dev_dbg(info
->device
, "%s\n", __func__
);
883 atmel_lcdfb_update_dma(info
, var
);
888 static int atmel_lcdfb_blank(int blank_mode
, struct fb_info
*info
)
890 struct atmel_lcdfb_info
*sinfo
= info
->par
;
892 switch (blank_mode
) {
893 case FB_BLANK_UNBLANK
:
894 case FB_BLANK_NORMAL
:
895 atmel_lcdfb_start(sinfo
);
897 case FB_BLANK_VSYNC_SUSPEND
:
898 case FB_BLANK_HSYNC_SUSPEND
:
900 case FB_BLANK_POWERDOWN
:
901 atmel_lcdfb_stop(sinfo
);
907 /* let fbcon do a soft blank for us */
908 return ((blank_mode
== FB_BLANK_NORMAL
) ? 1 : 0);
911 static struct fb_ops atmel_lcdfb_ops
= {
912 .owner
= THIS_MODULE
,
913 .fb_check_var
= atmel_lcdfb_check_var
,
914 .fb_set_par
= atmel_lcdfb_set_par
,
915 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
916 .fb_blank
= atmel_lcdfb_blank
,
917 .fb_pan_display
= atmel_lcdfb_pan_display
,
918 .fb_fillrect
= cfb_fillrect
,
919 .fb_copyarea
= cfb_copyarea
,
920 .fb_imageblit
= cfb_imageblit
,
923 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
925 struct fb_info
*info
= dev_id
;
926 struct atmel_lcdfb_info
*sinfo
= info
->par
;
929 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
930 if (status
& ATMEL_LCDC_UFLWI
) {
931 dev_warn(info
->device
, "FIFO underflow %#x\n", status
);
932 /* reset DMA and FIFO to avoid screen shifting */
933 schedule_work(&sinfo
->task
);
935 lcdc_writel(sinfo
, ATMEL_LCDC_ICR
, status
);
940 * LCD controller task (to reset the LCD)
942 static void atmel_lcdfb_task(struct work_struct
*work
)
944 struct atmel_lcdfb_info
*sinfo
=
945 container_of(work
, struct atmel_lcdfb_info
, task
);
947 atmel_lcdfb_reset(sinfo
);
950 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
952 struct fb_info
*info
= sinfo
->info
;
955 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
957 dev_info(info
->device
,
958 "%luKiB frame buffer at %08lx (mapped at %p)\n",
959 (unsigned long)info
->fix
.smem_len
/ 1024,
960 (unsigned long)info
->fix
.smem_start
,
963 /* Allocate colormap */
964 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
966 dev_err(info
->device
, "Alloc color map failed\n");
971 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
973 clk_prepare_enable(sinfo
->bus_clk
);
974 clk_prepare_enable(sinfo
->lcdc_clk
);
977 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
979 clk_disable_unprepare(sinfo
->bus_clk
);
980 clk_disable_unprepare(sinfo
->lcdc_clk
);
984 static const struct of_device_id atmel_lcdfb_dt_ids
[] = {
985 { .compatible
= "atmel,at91sam9261-lcdc" , .data
= &at91sam9261_config
, },
986 { .compatible
= "atmel,at91sam9263-lcdc" , .data
= &at91sam9263_config
, },
987 { .compatible
= "atmel,at91sam9g10-lcdc" , .data
= &at91sam9g10_config
, },
988 { .compatible
= "atmel,at91sam9g45-lcdc" , .data
= &at91sam9g45_config
, },
989 { .compatible
= "atmel,at91sam9g45es-lcdc" , .data
= &at91sam9g45es_config
, },
990 { .compatible
= "atmel,at91sam9rl-lcdc" , .data
= &at91sam9rl_config
, },
991 { .compatible
= "atmel,at32ap-lcdc" , .data
= &at32ap_config
, },
995 MODULE_DEVICE_TABLE(of
, atmel_lcdfb_dt_ids
);
997 static const char *atmel_lcdfb_wiring_modes
[] = {
998 [ATMEL_LCDC_WIRING_BGR
] = "BRG",
999 [ATMEL_LCDC_WIRING_RGB
] = "RGB",
1002 const int atmel_lcdfb_get_of_wiring_modes(struct device_node
*np
)
1007 err
= of_property_read_string(np
, "atmel,lcd-wiring-mode", &mode
);
1009 return ATMEL_LCDC_WIRING_BGR
;
1011 for (i
= 0; i
< ARRAY_SIZE(atmel_lcdfb_wiring_modes
); i
++)
1012 if (!strcasecmp(mode
, atmel_lcdfb_wiring_modes
[i
]))
1018 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata
*pdata
, int on
)
1020 struct atmel_lcdfb_power_ctrl_gpio
*og
;
1022 list_for_each_entry(og
, &pdata
->pwr_gpios
, list
)
1023 gpio_set_value(og
->gpio
, on
);
1026 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info
*sinfo
)
1028 struct fb_info
*info
= sinfo
->info
;
1029 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
1030 struct fb_var_screeninfo
*var
= &info
->var
;
1031 struct device
*dev
= &sinfo
->pdev
->dev
;
1032 struct device_node
*np
=dev
->of_node
;
1033 struct device_node
*display_np
;
1034 struct device_node
*timings_np
;
1035 struct display_timings
*timings
;
1036 enum of_gpio_flags flags
;
1037 struct atmel_lcdfb_power_ctrl_gpio
*og
;
1038 bool is_gpio_power
= false;
1042 sinfo
->config
= (struct atmel_lcdfb_config
*)
1043 of_match_device(atmel_lcdfb_dt_ids
, dev
)->data
;
1045 display_np
= of_parse_phandle(np
, "display", 0);
1047 dev_err(dev
, "failed to find display phandle\n");
1051 ret
= of_property_read_u32(display_np
, "bits-per-pixel", &var
->bits_per_pixel
);
1053 dev_err(dev
, "failed to get property bits-per-pixel\n");
1054 goto put_display_node
;
1057 ret
= of_property_read_u32(display_np
, "atmel,guard-time", &pdata
->guard_time
);
1059 dev_err(dev
, "failed to get property atmel,guard-time\n");
1060 goto put_display_node
;
1063 ret
= of_property_read_u32(display_np
, "atmel,lcdcon2", &pdata
->default_lcdcon2
);
1065 dev_err(dev
, "failed to get property atmel,lcdcon2\n");
1066 goto put_display_node
;
1069 ret
= of_property_read_u32(display_np
, "atmel,dmacon", &pdata
->default_dmacon
);
1071 dev_err(dev
, "failed to get property bits-per-pixel\n");
1072 goto put_display_node
;
1075 INIT_LIST_HEAD(&pdata
->pwr_gpios
);
1077 for (i
= 0; i
< of_gpio_named_count(display_np
, "atmel,power-control-gpio"); i
++) {
1078 gpio
= of_get_named_gpio_flags(display_np
, "atmel,power-control-gpio",
1083 og
= devm_kzalloc(dev
, sizeof(*og
), GFP_KERNEL
);
1085 goto put_display_node
;
1088 og
->active_low
= flags
& OF_GPIO_ACTIVE_LOW
;
1089 is_gpio_power
= true;
1090 ret
= devm_gpio_request(dev
, gpio
, "lcd-power-control-gpio");
1092 dev_err(dev
, "request gpio %d failed\n", gpio
);
1093 goto put_display_node
;
1096 ret
= gpio_direction_output(gpio
, og
->active_low
);
1098 dev_err(dev
, "set direction output gpio %d failed\n", gpio
);
1099 goto put_display_node
;
1101 list_add(&og
->list
, &pdata
->pwr_gpios
);
1105 pdata
->atmel_lcdfb_power_control
= atmel_lcdfb_power_control_gpio
;
1107 ret
= atmel_lcdfb_get_of_wiring_modes(display_np
);
1109 dev_err(dev
, "invalid atmel,lcd-wiring-mode\n");
1110 goto put_display_node
;
1112 pdata
->lcd_wiring_mode
= ret
;
1114 pdata
->lcdcon_is_backlight
= of_property_read_bool(display_np
, "atmel,lcdcon-backlight");
1115 pdata
->lcdcon_pol_negative
= of_property_read_bool(display_np
, "atmel,lcdcon-backlight-inverted");
1117 timings
= of_get_display_timings(display_np
);
1119 dev_err(dev
, "failed to get display timings\n");
1121 goto put_display_node
;
1124 timings_np
= of_find_node_by_name(display_np
, "display-timings");
1126 dev_err(dev
, "failed to find display-timings node\n");
1128 goto put_display_node
;
1131 for (i
= 0; i
< of_get_child_count(timings_np
); i
++) {
1132 struct videomode vm
;
1133 struct fb_videomode fb_vm
;
1135 ret
= videomode_from_timings(timings
, &vm
, i
);
1137 goto put_timings_node
;
1138 ret
= fb_videomode_from_videomode(&vm
, &fb_vm
);
1140 goto put_timings_node
;
1142 fb_add_videomode(&fb_vm
, &info
->modelist
);
1148 of_node_put(timings_np
);
1150 of_node_put(display_np
);
1154 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info
*sinfo
)
1160 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
1162 struct device
*dev
= &pdev
->dev
;
1163 struct fb_info
*info
;
1164 struct atmel_lcdfb_info
*sinfo
;
1165 struct atmel_lcdfb_pdata
*pdata
= NULL
;
1166 struct resource
*regs
= NULL
;
1167 struct resource
*map
= NULL
;
1168 struct fb_modelist
*modelist
;
1171 dev_dbg(dev
, "%s BEGIN\n", __func__
);
1174 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
1176 dev_err(dev
, "cannot allocate memory\n");
1184 INIT_LIST_HEAD(&info
->modelist
);
1186 if (pdev
->dev
.of_node
) {
1187 ret
= atmel_lcdfb_of_init(sinfo
);
1190 } else if (dev_get_platdata(dev
)) {
1191 struct fb_monspecs
*monspecs
;
1194 pdata
= dev_get_platdata(dev
);
1195 monspecs
= pdata
->default_monspecs
;
1196 sinfo
->pdata
= *pdata
;
1198 for (i
= 0; i
< monspecs
->modedb_len
; i
++)
1199 fb_add_videomode(&monspecs
->modedb
[i
], &info
->modelist
);
1201 sinfo
->config
= atmel_lcdfb_get_config(pdev
);
1203 info
->var
.bits_per_pixel
= pdata
->default_bpp
? pdata
->default_bpp
: 16;
1204 memcpy(&info
->monspecs
, pdata
->default_monspecs
, sizeof(info
->monspecs
));
1206 dev_err(dev
, "cannot get default configuration\n");
1213 sinfo
->reg_lcd
= devm_regulator_get(&pdev
->dev
, "lcd");
1214 if (IS_ERR(sinfo
->reg_lcd
))
1215 sinfo
->reg_lcd
= NULL
;
1217 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
1218 info
->pseudo_palette
= sinfo
->pseudo_palette
;
1219 info
->fbops
= &atmel_lcdfb_ops
;
1221 info
->fix
= atmel_lcdfb_fix
;
1222 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
1224 /* Enable LCDC Clocks */
1225 sinfo
->bus_clk
= clk_get(dev
, "hclk");
1226 if (IS_ERR(sinfo
->bus_clk
)) {
1227 ret
= PTR_ERR(sinfo
->bus_clk
);
1230 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
1231 if (IS_ERR(sinfo
->lcdc_clk
)) {
1232 ret
= PTR_ERR(sinfo
->lcdc_clk
);
1235 atmel_lcdfb_start_clock(sinfo
);
1237 modelist
= list_first_entry(&info
->modelist
,
1238 struct fb_modelist
, list
);
1239 fb_videomode_to_var(&info
->var
, &modelist
->mode
);
1241 atmel_lcdfb_check_var(&info
->var
, info
);
1243 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1245 dev_err(dev
, "resources unusable\n");
1250 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
1251 if (sinfo
->irq_base
< 0) {
1252 dev_err(dev
, "unable to get irq\n");
1253 ret
= sinfo
->irq_base
;
1257 /* Initialize video memory */
1258 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1260 /* use a pre-allocated memory buffer */
1261 info
->fix
.smem_start
= map
->start
;
1262 info
->fix
.smem_len
= resource_size(map
);
1263 if (!request_mem_region(info
->fix
.smem_start
,
1264 info
->fix
.smem_len
, pdev
->name
)) {
1269 info
->screen_base
= ioremap(info
->fix
.smem_start
, info
->fix
.smem_len
);
1270 if (!info
->screen_base
) {
1272 goto release_intmem
;
1276 * Don't clear the framebuffer -- someone may have set
1277 * up a splash image.
1280 /* allocate memory buffer */
1281 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
1283 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
1288 /* LCDC registers */
1289 info
->fix
.mmio_start
= regs
->start
;
1290 info
->fix
.mmio_len
= resource_size(regs
);
1292 if (!request_mem_region(info
->fix
.mmio_start
,
1293 info
->fix
.mmio_len
, pdev
->name
)) {
1298 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1300 dev_err(dev
, "cannot map LCDC registers\n");
1305 /* Initialize PWM for contrast or backlight ("off") */
1306 init_contrast(sinfo
);
1309 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
1311 dev_err(dev
, "request_irq failed: %d\n", ret
);
1315 /* Some operations on the LCDC might sleep and
1316 * require a preemptible task context */
1317 INIT_WORK(&sinfo
->task
, atmel_lcdfb_task
);
1319 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
1321 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
1322 goto unregister_irqs
;
1325 ret
= atmel_lcdfb_set_par(info
);
1327 dev_err(dev
, "set par failed: %d\n", ret
);
1328 goto unregister_irqs
;
1331 dev_set_drvdata(dev
, info
);
1334 * Tell the world that we're ready to go
1336 ret
= register_framebuffer(info
);
1338 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
1342 /* Power up the LCDC screen */
1343 atmel_lcdfb_power_control(sinfo
, 1);
1345 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1346 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
1351 dev_set_drvdata(dev
, NULL
);
1352 fb_dealloc_cmap(&info
->cmap
);
1354 cancel_work_sync(&sinfo
->task
);
1355 free_irq(sinfo
->irq_base
, info
);
1357 exit_backlight(sinfo
);
1358 iounmap(sinfo
->mmio
);
1360 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1363 iounmap(info
->screen_base
);
1365 atmel_lcdfb_free_video_memory(sinfo
);
1369 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1371 atmel_lcdfb_stop_clock(sinfo
);
1372 clk_put(sinfo
->lcdc_clk
);
1374 clk_put(sinfo
->bus_clk
);
1376 framebuffer_release(info
);
1378 dev_dbg(dev
, "%s FAILED\n", __func__
);
1382 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
1384 struct device
*dev
= &pdev
->dev
;
1385 struct fb_info
*info
= dev_get_drvdata(dev
);
1386 struct atmel_lcdfb_info
*sinfo
;
1387 struct atmel_lcdfb_pdata
*pdata
;
1389 if (!info
|| !info
->par
)
1392 pdata
= &sinfo
->pdata
;
1394 cancel_work_sync(&sinfo
->task
);
1395 exit_backlight(sinfo
);
1396 atmel_lcdfb_power_control(sinfo
, 0);
1397 unregister_framebuffer(info
);
1398 atmel_lcdfb_stop_clock(sinfo
);
1399 clk_put(sinfo
->lcdc_clk
);
1400 clk_put(sinfo
->bus_clk
);
1401 fb_dealloc_cmap(&info
->cmap
);
1402 free_irq(sinfo
->irq_base
, info
);
1403 iounmap(sinfo
->mmio
);
1404 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1405 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
1406 iounmap(info
->screen_base
);
1407 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1409 atmel_lcdfb_free_video_memory(sinfo
);
1412 framebuffer_release(info
);
1419 static int atmel_lcdfb_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1421 struct fb_info
*info
= platform_get_drvdata(pdev
);
1422 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1425 * We don't want to handle interrupts while the clock is
1426 * stopped. It may take forever.
1428 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
1430 sinfo
->saved_lcdcon
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_CTR
);
1431 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, 0);
1432 atmel_lcdfb_power_control(sinfo
, 0);
1433 atmel_lcdfb_stop(sinfo
);
1434 atmel_lcdfb_stop_clock(sinfo
);
1439 static int atmel_lcdfb_resume(struct platform_device
*pdev
)
1441 struct fb_info
*info
= platform_get_drvdata(pdev
);
1442 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1444 atmel_lcdfb_start_clock(sinfo
);
1445 atmel_lcdfb_start(sinfo
);
1446 atmel_lcdfb_power_control(sinfo
, 1);
1447 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, sinfo
->saved_lcdcon
);
1449 /* Enable FIFO & DMA errors */
1450 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
1451 | ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
1457 #define atmel_lcdfb_suspend NULL
1458 #define atmel_lcdfb_resume NULL
1461 static struct platform_driver atmel_lcdfb_driver
= {
1462 .remove
= __exit_p(atmel_lcdfb_remove
),
1463 .suspend
= atmel_lcdfb_suspend
,
1464 .resume
= atmel_lcdfb_resume
,
1465 .id_table
= atmel_lcdfb_devtypes
,
1467 .name
= "atmel_lcdfb",
1468 .of_match_table
= of_match_ptr(atmel_lcdfb_dt_ids
),
1472 module_platform_driver_probe(atmel_lcdfb_driver
, atmel_lcdfb_probe
);
1474 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1475 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1476 MODULE_LICENSE("GPL");