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cxl: Fix typo in debug print
[linux/fpc-iii.git] / drivers / video / fbdev / matrox / matroxfb_base.c
blob62539ca1cfa909e1ffc3e74b4e9b74a60e26be1f
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writing this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 #include <linux/version.h>
103
104 #include "matroxfb_base.h"
105 #include "matroxfb_misc.h"
106 #include "matroxfb_accel.h"
107 #include "matroxfb_DAC1064.h"
108 #include "matroxfb_Ti3026.h"
109 #include "matroxfb_maven.h"
110 #include "matroxfb_crtc2.h"
111 #include "matroxfb_g450.h"
112 #include <linux/matroxfb.h>
113 #include <linux/interrupt.h>
114 #include <linux/slab.h>
115 #include <linux/uaccess.h>
116
117 #ifdef CONFIG_PPC_PMAC
118 #include <asm/machdep.h>
119 unsigned char nvram_read_byte(int);
120 static int default_vmode = VMODE_NVRAM;
121 static int default_cmode = CMODE_NVRAM;
122 #endif
123
124 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125
126 /* --------------------------------------------------------------------- */
127
128 /*
129 * card parameters
130 */
131
132 /* --------------------------------------------------------------------- */
133
134 static struct fb_var_screeninfo vesafb_defined = {
135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136 0,0, /* virtual -> visible no offset */
137 8, /* depth -> load bits_per_pixel */
138 0, /* greyscale ? */
139 {0,0,0}, /* R */
140 {0,0,0}, /* G */
141 {0,0,0}, /* B */
142 {0,0,0}, /* transparency */
143 0, /* standard pixel format */
144 FB_ACTIVATE_NOW,
145 -1,-1,
146 FB_ACCELF_TEXT, /* accel flags */
147 39721L,48L,16L,33L,10L,
148 96L,2L,~0, /* No sync info */
149 FB_VMODE_NONINTERLACED,
150 };
151
152
153
154 /* --------------------------------------------------------------------- */
155 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
156 {
157 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
158
159 /* Make sure that displays are compatible */
160 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
161 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
162 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
163 ) {
164 switch (minfo->fbcon.var.bits_per_pixel) {
165 case 16:
166 case 32:
167 pos = pos * 8;
168 if (info->interlaced) {
169 mga_outl(0x3C2C, pos);
170 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
171 } else {
172 mga_outl(0x3C28, pos);
173 }
174 break;
175 }
176 }
177 }
178
179 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
180 {
181 if (minfo->crtc1.panpos >= 0) {
182 unsigned long flags;
183 int panpos;
184
185 matroxfb_DAC_lock_irqsave(flags);
186 panpos = minfo->crtc1.panpos;
187 if (panpos >= 0) {
188 unsigned int extvga_reg;
189
190 minfo->crtc1.panpos = -1; /* No update pending anymore */
191 extvga_reg = mga_inb(M_EXTVGA_INDEX);
192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193 if (extvga_reg != 0x00) {
194 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 }
196 }
197 matroxfb_DAC_unlock_irqrestore(flags);
198 }
199 }
200
201 static irqreturn_t matrox_irq(int irq, void *dev_id)
202 {
203 u_int32_t status;
204 int handled = 0;
205 struct matrox_fb_info *minfo = dev_id;
206
207 status = mga_inl(M_STATUS);
208
209 if (status & 0x20) {
210 mga_outl(M_ICLEAR, 0x20);
211 minfo->crtc1.vsync.cnt++;
212 matroxfb_crtc1_panpos(minfo);
213 wake_up_interruptible(&minfo->crtc1.vsync.wait);
214 handled = 1;
215 }
216 if (status & 0x200) {
217 mga_outl(M_ICLEAR, 0x200);
218 minfo->crtc2.vsync.cnt++;
219 wake_up_interruptible(&minfo->crtc2.vsync.wait);
220 handled = 1;
221 }
222 return IRQ_RETVAL(handled);
223 }
224
225 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
226 {
227 u_int32_t bm;
228
229 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
230 bm = 0x220;
231 else
232 bm = 0x020;
233
234 if (!test_and_set_bit(0, &minfo->irq_flags)) {
235 if (request_irq(minfo->pcidev->irq, matrox_irq,
236 IRQF_SHARED, "matroxfb", minfo)) {
237 clear_bit(0, &minfo->irq_flags);
238 return -EINVAL;
239 }
240 /* Clear any pending field interrupts */
241 mga_outl(M_ICLEAR, bm);
242 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243 } else if (reenable) {
244 u_int32_t ien;
245
246 ien = mga_inl(M_IEN);
247 if ((ien & bm) != bm) {
248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249 mga_outl(M_IEN, ien | bm);
250 }
251 }
252 return 0;
253 }
254
255 static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
256 {
257 if (test_and_clear_bit(0, &minfo->irq_flags)) {
258 /* Flush pending pan-at-vbl request... */
259 matroxfb_crtc1_panpos(minfo);
260 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
262 else
263 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
264 free_irq(minfo->pcidev->irq, minfo);
265 }
266 }
267
268 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
269 {
270 struct matrox_vsync *vs;
271 unsigned int cnt;
272 int ret;
273
274 switch (crtc) {
275 case 0:
276 vs = &minfo->crtc1.vsync;
277 break;
278 case 1:
279 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
280 return -ENODEV;
281 }
282 vs = &minfo->crtc2.vsync;
283 break;
284 default:
285 return -ENODEV;
286 }
287 ret = matroxfb_enable_irq(minfo, 0);
288 if (ret) {
289 return ret;
290 }
291
292 cnt = vs->cnt;
293 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
294 if (ret < 0) {
295 return ret;
296 }
297 if (ret == 0) {
298 matroxfb_enable_irq(minfo, 1);
299 return -ETIMEDOUT;
300 }
301 return 0;
302 }
303
304 /* --------------------------------------------------------------------- */
305
306 static void matrox_pan_var(struct matrox_fb_info *minfo,
307 struct fb_var_screeninfo *var)
308 {
309 unsigned int pos;
310 unsigned short p0, p1, p2;
311 unsigned int p3;
312 int vbl;
313 unsigned long flags;
314
315 CRITFLAGS
316
317 DBG(__func__)
318
319 if (minfo->dead)
320 return;
321
322 minfo->fbcon.var.xoffset = var->xoffset;
323 minfo->fbcon.var.yoffset = var->yoffset;
324 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
325 pos += minfo->curr.ydstorg.chunks;
326 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
327 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
328 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
329 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
330
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
333
334 CRITBEGIN
335
336 matroxfb_DAC_lock_irqsave(flags);
337 mga_setr(M_CRTC_INDEX, 0x0D, p0);
338 mga_setr(M_CRTC_INDEX, 0x0C, p1);
339 if (minfo->devflags.support32MB)
340 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
341 if (vbl) {
342 minfo->crtc1.panpos = p2;
343 } else {
344 /* Abort any pending change */
345 minfo->crtc1.panpos = -1;
346 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
347 }
348 matroxfb_DAC_unlock_irqrestore(flags);
349
350 update_crtc2(minfo, pos);
351
352 CRITEND
353 }
354
355 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
356 {
357 /* Currently we are holding big kernel lock on all dead & usecount updates.
358 * Destroy everything after all users release it. Especially do not unregister
359 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
360 * for device unplugged when in use.
361 * In future we should point mmio.vbase & video.vbase somewhere where we can
362 * write data without causing too much damage...
363 */
364
365 minfo->dead = 1;
366 if (minfo->usecount) {
367 /* destroy it later */
368 return;
369 }
370 matroxfb_unregister_device(minfo);
371 unregister_framebuffer(&minfo->fbcon);
372 matroxfb_g450_shutdown(minfo);
373 #ifdef CONFIG_MTRR
374 if (minfo->mtrr.vram_valid)
375 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
376 #endif
377 mga_iounmap(minfo->mmio.vbase);
378 mga_iounmap(minfo->video.vbase);
379 release_mem_region(minfo->video.base, minfo->video.len_maximum);
380 release_mem_region(minfo->mmio.base, 16384);
381 kfree(minfo);
382 }
383
384 /*
385 * Open/Release the frame buffer device
386 */
387
388 static int matroxfb_open(struct fb_info *info, int user)
389 {
390 struct matrox_fb_info *minfo = info2minfo(info);
391
392 DBG_LOOP(__func__)
393
394 if (minfo->dead) {
395 return -ENXIO;
396 }
397 minfo->usecount++;
398 if (user) {
399 minfo->userusecount++;
400 }
401 return(0);
402 }
403
404 static int matroxfb_release(struct fb_info *info, int user)
405 {
406 struct matrox_fb_info *minfo = info2minfo(info);
407
408 DBG_LOOP(__func__)
409
410 if (user) {
411 if (0 == --minfo->userusecount) {
412 matroxfb_disable_irq(minfo);
413 }
414 }
415 if (!(--minfo->usecount) && minfo->dead) {
416 matroxfb_remove(minfo, 0);
417 }
418 return(0);
419 }
420
421 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
422 struct fb_info* info) {
423 struct matrox_fb_info *minfo = info2minfo(info);
424
425 DBG(__func__)
426
427 matrox_pan_var(minfo, var);
428 return 0;
429 }
430
431 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
432 int bpp)
433 {
434 int bppshft2;
435
436 DBG(__func__)
437
438 bppshft2 = bpp;
439 if (!bppshft2) {
440 return 8;
441 }
442 if (isInterleave(minfo))
443 bppshft2 >>= 1;
444 if (minfo->devflags.video64bits)
445 bppshft2 >>= 1;
446 return bppshft2;
447 }
448
449 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
450 int xres, int bpp)
451 {
452 int over;
453 int rounding;
454
455 DBG(__func__)
456
457 switch (bpp) {
458 case 0: return xres;
459 case 4: rounding = 128;
460 break;
461 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
462 break;
463 case 16: rounding = 32;
464 break;
465 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
466 break;
467 default: rounding = 16;
468 /* on G400, 16 really does not work */
469 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
470 rounding = 32;
471 break;
472 }
473 if (isInterleave(minfo)) {
474 rounding *= 2;
475 }
476 over = xres % rounding;
477 if (over)
478 xres += rounding-over;
479 return xres;
480 }
481
482 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
483 int bpp)
484 {
485 const int* width;
486 int xres_new;
487
488 DBG(__func__)
489
490 if (!bpp) return xres;
491
492 width = minfo->capable.vxres;
493
494 if (minfo->devflags.precise_width) {
495 while (*width) {
496 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
497 break;
498 }
499 width++;
500 }
501 xres_new = *width;
502 } else {
503 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
504 }
505 return xres_new;
506 }
507
508 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
509
510 DBG(__func__)
511
512 switch (var->bits_per_pixel) {
513 case 4:
514 return 16; /* pseudocolor... 16 entries HW palette */
515 case 8:
516 return 256; /* pseudocolor... 256 entries HW palette */
517 case 16:
518 return 16; /* directcolor... 16 entries SW palette */
519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
520 case 24:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 case 32:
524 return 16; /* directcolor... 16 entries SW palette */
525 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
526 }
527 return 16; /* return something reasonable... or panic()? */
528 }
529
530 static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
531 struct fb_var_screeninfo *var, int *visual,
532 int *video_cmap_len, unsigned int* ydstorg)
533 {
534 struct RGBT {
535 unsigned char bpp;
536 struct {
537 unsigned char offset,
538 length;
539 } red,
540 green,
541 blue,
542 transp;
543 signed char visual;
544 };
545 static const struct RGBT table[]= {
546 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
547 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
548 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
550 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
551 };
552 struct RGBT const *rgbt;
553 unsigned int bpp = var->bits_per_pixel;
554 unsigned int vramlen;
555 unsigned int memlen;
556
557 DBG(__func__)
558
559 switch (bpp) {
560 case 4: if (!minfo->capable.cfb4) return -EINVAL;
561 break;
562 case 8: break;
563 case 16: break;
564 case 24: break;
565 case 32: break;
566 default: return -EINVAL;
567 }
568 *ydstorg = 0;
569 vramlen = minfo->video.len_usable;
570 if (var->yres_virtual < var->yres)
571 var->yres_virtual = var->yres;
572 if (var->xres_virtual < var->xres)
573 var->xres_virtual = var->xres;
574
575 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
576 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
577 if (memlen > vramlen) {
578 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
579 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
580 }
581 /* There is hardware bug that no line can cross 4MB boundary */
582 /* give up for CFB24, it is impossible to easy workaround it */
583 /* for other try to do something */
584 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
585 if (bpp == 24) {
586 /* sorry */
587 } else {
588 unsigned int linelen;
589 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
590 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
591 unsigned int max_yres;
592
593 while (m1) {
594 int t;
595
596 while (m2 >= m1) m2 -= m1;
597 t = m1;
598 m1 = m2;
599 m2 = t;
600 }
601 m2 = linelen * PAGE_SIZE / m2;
602 *ydstorg = m2 = 0x400000 % m2;
603 max_yres = (vramlen - m2) / linelen;
604 if (var->yres_virtual > max_yres)
605 var->yres_virtual = max_yres;
606 }
607 }
608 /* YDSTLEN contains only signed 16bit value */
609 if (var->yres_virtual > 32767)
610 var->yres_virtual = 32767;
611 /* we must round yres/xres down, we already rounded y/xres_virtual up
612 if it was possible. We should return -EINVAL, but I disagree */
613 if (var->yres_virtual < var->yres)
614 var->yres = var->yres_virtual;
615 if (var->xres_virtual < var->xres)
616 var->xres = var->xres_virtual;
617 if (var->xoffset + var->xres > var->xres_virtual)
618 var->xoffset = var->xres_virtual - var->xres;
619 if (var->yoffset + var->yres > var->yres_virtual)
620 var->yoffset = var->yres_virtual - var->yres;
621
622 if (bpp == 16 && var->green.length == 5) {
623 bpp--; /* an artificial value - 15 */
624 }
625
626 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
627 #define SETCLR(clr)\
628 var->clr.offset = rgbt->clr.offset;\
629 var->clr.length = rgbt->clr.length
630 SETCLR(red);
631 SETCLR(green);
632 SETCLR(blue);
633 SETCLR(transp);
634 #undef SETCLR
635 *visual = rgbt->visual;
636
637 if (bpp > 8)
638 dprintk("matroxfb: truecolor: "
639 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
640 var->transp.length, var->red.length, var->green.length, var->blue.length,
641 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
642
643 *video_cmap_len = matroxfb_get_cmap_len(var);
644 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
645 var->xres_virtual, var->yres_virtual);
646 return 0;
647 }
648
649 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
650 unsigned blue, unsigned transp,
651 struct fb_info *fb_info)
652 {
653 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
654
655 DBG(__func__)
656
657 /*
658 * Set a single color register. The values supplied are
659 * already rounded down to the hardware's capabilities
660 * (according to the entries in the `var' structure). Return
661 * != 0 for invalid regno.
662 */
663
664 if (regno >= minfo->curr.cmap_len)
665 return 1;
666
667 if (minfo->fbcon.var.grayscale) {
668 /* gray = 0.30*R + 0.59*G + 0.11*B */
669 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
670 }
671
672 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
673 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
674 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
675 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
676
677 switch (minfo->fbcon.var.bits_per_pixel) {
678 case 4:
679 case 8:
680 mga_outb(M_DAC_REG, regno);
681 mga_outb(M_DAC_VAL, red);
682 mga_outb(M_DAC_VAL, green);
683 mga_outb(M_DAC_VAL, blue);
684 break;
685 case 16:
686 if (regno >= 16)
687 break;
688 {
689 u_int16_t col =
690 (red << minfo->fbcon.var.red.offset) |
691 (green << minfo->fbcon.var.green.offset) |
692 (blue << minfo->fbcon.var.blue.offset) |
693 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
694 minfo->cmap[regno] = col | (col << 16);
695 }
696 break;
697 case 24:
698 case 32:
699 if (regno >= 16)
700 break;
701 minfo->cmap[regno] =
702 (red << minfo->fbcon.var.red.offset) |
703 (green << minfo->fbcon.var.green.offset) |
704 (blue << minfo->fbcon.var.blue.offset) |
705 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
706 break;
707 }
708 return 0;
709 }
710
711 static void matroxfb_init_fix(struct matrox_fb_info *minfo)
712 {
713 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
714 DBG(__func__)
715
716 strcpy(fix->id,"MATROX");
717
718 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
719 fix->ypanstep = 1;
720 fix->ywrapstep = 0;
721 fix->mmio_start = minfo->mmio.base;
722 fix->mmio_len = minfo->mmio.len;
723 fix->accel = minfo->devflags.accelerator;
724 }
725
726 static void matroxfb_update_fix(struct matrox_fb_info *minfo)
727 {
728 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
729 DBG(__func__)
730
731 mutex_lock(&minfo->fbcon.mm_lock);
732 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
733 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
734 mutex_unlock(&minfo->fbcon.mm_lock);
735 }
736
737 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
738 {
739 int err;
740 int visual;
741 int cmap_len;
742 unsigned int ydstorg;
743 struct matrox_fb_info *minfo = info2minfo(info);
744
745 if (minfo->dead) {
746 return -ENXIO;
747 }
748 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
749 return err;
750 return 0;
751 }
752
753 static int matroxfb_set_par(struct fb_info *info)
754 {
755 int err;
756 int visual;
757 int cmap_len;
758 unsigned int ydstorg;
759 struct fb_var_screeninfo *var;
760 struct matrox_fb_info *minfo = info2minfo(info);
761
762 DBG(__func__)
763
764 if (minfo->dead) {
765 return -ENXIO;
766 }
767
768 var = &info->var;
769 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
770 return err;
771 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
772 matroxfb_update_fix(minfo);
773 minfo->fbcon.fix.visual = visual;
774 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
775 minfo->fbcon.fix.type_aux = 0;
776 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
777 {
778 unsigned int pos;
779
780 minfo->curr.cmap_len = cmap_len;
781 ydstorg += minfo->devflags.ydstorg;
782 minfo->curr.ydstorg.bytes = ydstorg;
783 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
784 if (var->bits_per_pixel == 4)
785 minfo->curr.ydstorg.pixels = ydstorg;
786 else
787 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
788 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
789 { struct my_timming mt;
790 struct matrox_hw_state* hw;
791 int out;
792
793 matroxfb_var2my(var, &mt);
794 mt.crtc = MATROXFB_SRC_CRTC1;
795 /* CRTC1 delays */
796 switch (var->bits_per_pixel) {
797 case 0: mt.delay = 31 + 0; break;
798 case 16: mt.delay = 21 + 8; break;
799 case 24: mt.delay = 17 + 8; break;
800 case 32: mt.delay = 16 + 8; break;
801 default: mt.delay = 31 + 8; break;
802 }
803
804 hw = &minfo->hw;
805
806 down_read(&minfo->altout.lock);
807 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
808 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
809 minfo->outputs[out].output->compute) {
810 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
811 }
812 }
813 up_read(&minfo->altout.lock);
814 minfo->crtc1.pixclock = mt.pixclock;
815 minfo->crtc1.mnp = mt.mnp;
816 minfo->hw_switch->init(minfo, &mt);
817 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
818 pos += minfo->curr.ydstorg.chunks;
819
820 hw->CRTC[0x0D] = pos & 0xFF;
821 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
822 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
823 hw->CRTCEXT[8] = pos >> 21;
824 minfo->hw_switch->restore(minfo);
825 update_crtc2(minfo, pos);
826 down_read(&minfo->altout.lock);
827 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
828 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
829 minfo->outputs[out].output->program) {
830 minfo->outputs[out].output->program(minfo->outputs[out].data);
831 }
832 }
833 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
834 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
835 minfo->outputs[out].output->start) {
836 minfo->outputs[out].output->start(minfo->outputs[out].data);
837 }
838 }
839 up_read(&minfo->altout.lock);
840 matrox_cfbX_init(minfo);
841 }
842 }
843 minfo->initialized = 1;
844 return 0;
845 }
846
847 static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
848 struct fb_vblank *vblank)
849 {
850 unsigned int sts1;
851
852 matroxfb_enable_irq(minfo, 0);
853 memset(vblank, 0, sizeof(*vblank));
854 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
855 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
856 sts1 = mga_inb(M_INSTS1);
857 vblank->vcount = mga_inl(M_VCOUNT);
858 /* BTW, on my PIII/450 with G400, reading M_INSTS1
859 byte makes this call about 12% slower (1.70 vs. 2.05 us
860 per ioctl()) */
861 if (sts1 & 1)
862 vblank->flags |= FB_VBLANK_HBLANKING;
863 if (sts1 & 8)
864 vblank->flags |= FB_VBLANK_VSYNCING;
865 if (vblank->vcount >= minfo->fbcon.var.yres)
866 vblank->flags |= FB_VBLANK_VBLANKING;
867 if (test_bit(0, &minfo->irq_flags)) {
868 vblank->flags |= FB_VBLANK_HAVE_COUNT;
869 /* Only one writer, aligned int value...
870 it should work without lock and without atomic_t */
871 vblank->count = minfo->crtc1.vsync.cnt;
872 }
873 return 0;
874 }
875
876 static struct matrox_altout panellink_output = {
877 .name = "Panellink output",
878 };
879
880 static int matroxfb_ioctl(struct fb_info *info,
881 unsigned int cmd, unsigned long arg)
882 {
883 void __user *argp = (void __user *)arg;
884 struct matrox_fb_info *minfo = info2minfo(info);
885
886 DBG(__func__)
887
888 if (minfo->dead) {
889 return -ENXIO;
890 }
891
892 switch (cmd) {
893 case FBIOGET_VBLANK:
894 {
895 struct fb_vblank vblank;
896 int err;
897
898 err = matroxfb_get_vblank(minfo, &vblank);
899 if (err)
900 return err;
901 if (copy_to_user(argp, &vblank, sizeof(vblank)))
902 return -EFAULT;
903 return 0;
904 }
905 case FBIO_WAITFORVSYNC:
906 {
907 u_int32_t crt;
908
909 if (get_user(crt, (u_int32_t __user *)arg))
910 return -EFAULT;
911
912 return matroxfb_wait_for_sync(minfo, crt);
913 }
914 case MATROXFB_SET_OUTPUT_MODE:
915 {
916 struct matroxioc_output_mode mom;
917 struct matrox_altout *oproc;
918 int val;
919
920 if (copy_from_user(&mom, argp, sizeof(mom)))
921 return -EFAULT;
922 if (mom.output >= MATROXFB_MAX_OUTPUTS)
923 return -ENXIO;
924 down_read(&minfo->altout.lock);
925 oproc = minfo->outputs[mom.output].output;
926 if (!oproc) {
927 val = -ENXIO;
928 } else if (!oproc->verifymode) {
929 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
930 val = 0;
931 } else {
932 val = -EINVAL;
933 }
934 } else {
935 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
936 }
937 if (!val) {
938 if (minfo->outputs[mom.output].mode != mom.mode) {
939 minfo->outputs[mom.output].mode = mom.mode;
940 val = 1;
941 }
942 }
943 up_read(&minfo->altout.lock);
944 if (val != 1)
945 return val;
946 switch (minfo->outputs[mom.output].src) {
947 case MATROXFB_SRC_CRTC1:
948 matroxfb_set_par(info);
949 break;
950 case MATROXFB_SRC_CRTC2:
951 {
952 struct matroxfb_dh_fb_info* crtc2;
953
954 down_read(&minfo->crtc2.lock);
955 crtc2 = minfo->crtc2.info;
956 if (crtc2)
957 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
958 up_read(&minfo->crtc2.lock);
959 }
960 break;
961 }
962 return 0;
963 }
964 case MATROXFB_GET_OUTPUT_MODE:
965 {
966 struct matroxioc_output_mode mom;
967 struct matrox_altout *oproc;
968 int val;
969
970 if (copy_from_user(&mom, argp, sizeof(mom)))
971 return -EFAULT;
972 if (mom.output >= MATROXFB_MAX_OUTPUTS)
973 return -ENXIO;
974 down_read(&minfo->altout.lock);
975 oproc = minfo->outputs[mom.output].output;
976 if (!oproc) {
977 val = -ENXIO;
978 } else {
979 mom.mode = minfo->outputs[mom.output].mode;
980 val = 0;
981 }
982 up_read(&minfo->altout.lock);
983 if (val)
984 return val;
985 if (copy_to_user(argp, &mom, sizeof(mom)))
986 return -EFAULT;
987 return 0;
988 }
989 case MATROXFB_SET_OUTPUT_CONNECTION:
990 {
991 u_int32_t tmp;
992 int i;
993 int changes;
994
995 if (copy_from_user(&tmp, argp, sizeof(tmp)))
996 return -EFAULT;
997 for (i = 0; i < 32; i++) {
998 if (tmp & (1 << i)) {
999 if (i >= MATROXFB_MAX_OUTPUTS)
1000 return -ENXIO;
1001 if (!minfo->outputs[i].output)
1002 return -ENXIO;
1003 switch (minfo->outputs[i].src) {
1004 case MATROXFB_SRC_NONE:
1005 case MATROXFB_SRC_CRTC1:
1006 break;
1007 default:
1008 return -EBUSY;
1009 }
1010 }
1011 }
1012 if (minfo->devflags.panellink) {
1013 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1014 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1015 return -EINVAL;
1016 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1017 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1018 return -EBUSY;
1019 }
1020 }
1021 }
1022 }
1023 changes = 0;
1024 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1025 if (tmp & (1 << i)) {
1026 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1027 changes = 1;
1028 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1029 }
1030 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1031 changes = 1;
1032 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1033 }
1034 }
1035 if (!changes)
1036 return 0;
1037 matroxfb_set_par(info);
1038 return 0;
1039 }
1040 case MATROXFB_GET_OUTPUT_CONNECTION:
1041 {
1042 u_int32_t conn = 0;
1043 int i;
1044
1045 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1046 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1047 conn |= 1 << i;
1048 }
1049 }
1050 if (put_user(conn, (u_int32_t __user *)arg))
1051 return -EFAULT;
1052 return 0;
1053 }
1054 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1055 {
1056 u_int32_t conn = 0;
1057 int i;
1058
1059 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1060 if (minfo->outputs[i].output) {
1061 switch (minfo->outputs[i].src) {
1062 case MATROXFB_SRC_NONE:
1063 case MATROXFB_SRC_CRTC1:
1064 conn |= 1 << i;
1065 break;
1066 }
1067 }
1068 }
1069 if (minfo->devflags.panellink) {
1070 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1071 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1072 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1073 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1074 }
1075 if (put_user(conn, (u_int32_t __user *)arg))
1076 return -EFAULT;
1077 return 0;
1078 }
1079 case MATROXFB_GET_ALL_OUTPUTS:
1080 {
1081 u_int32_t conn = 0;
1082 int i;
1083
1084 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1085 if (minfo->outputs[i].output) {
1086 conn |= 1 << i;
1087 }
1088 }
1089 if (put_user(conn, (u_int32_t __user *)arg))
1090 return -EFAULT;
1091 return 0;
1092 }
1093 case VIDIOC_QUERYCAP:
1094 {
1095 struct v4l2_capability r;
1096
1097 memset(&r, 0, sizeof(r));
1098 strcpy(r.driver, "matroxfb");
1099 strcpy(r.card, "Matrox");
1100 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1101 r.version = KERNEL_VERSION(1,0,0);
1102 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1103 if (copy_to_user(argp, &r, sizeof(r)))
1104 return -EFAULT;
1105 return 0;
1106
1107 }
1108 case VIDIOC_QUERYCTRL:
1109 {
1110 struct v4l2_queryctrl qctrl;
1111 int err;
1112
1113 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1114 return -EFAULT;
1115
1116 down_read(&minfo->altout.lock);
1117 if (!minfo->outputs[1].output) {
1118 err = -ENXIO;
1119 } else if (minfo->outputs[1].output->getqueryctrl) {
1120 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1121 } else {
1122 err = -EINVAL;
1123 }
1124 up_read(&minfo->altout.lock);
1125 if (err >= 0 &&
1126 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1127 return -EFAULT;
1128 return err;
1129 }
1130 case VIDIOC_G_CTRL:
1131 {
1132 struct v4l2_control ctrl;
1133 int err;
1134
1135 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1136 return -EFAULT;
1137
1138 down_read(&minfo->altout.lock);
1139 if (!minfo->outputs[1].output) {
1140 err = -ENXIO;
1141 } else if (minfo->outputs[1].output->getctrl) {
1142 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1143 } else {
1144 err = -EINVAL;
1145 }
1146 up_read(&minfo->altout.lock);
1147 if (err >= 0 &&
1148 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1149 return -EFAULT;
1150 return err;
1151 }
1152 case VIDIOC_S_CTRL:
1153 {
1154 struct v4l2_control ctrl;
1155 int err;
1156
1157 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1158 return -EFAULT;
1159
1160 down_read(&minfo->altout.lock);
1161 if (!minfo->outputs[1].output) {
1162 err = -ENXIO;
1163 } else if (minfo->outputs[1].output->setctrl) {
1164 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1165 } else {
1166 err = -EINVAL;
1167 }
1168 up_read(&minfo->altout.lock);
1169 return err;
1170 }
1171 }
1172 return -ENOTTY;
1173 }
1174
1175 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1176
1177 static int matroxfb_blank(int blank, struct fb_info *info)
1178 {
1179 int seq;
1180 int crtc;
1181 CRITFLAGS
1182 struct matrox_fb_info *minfo = info2minfo(info);
1183
1184 DBG(__func__)
1185
1186 if (minfo->dead)
1187 return 1;
1188
1189 switch (blank) {
1190 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1191 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1192 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1193 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1194 default: seq = 0x00; crtc = 0x00; break;
1195 }
1196
1197 CRITBEGIN
1198
1199 mga_outb(M_SEQ_INDEX, 1);
1200 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1201 mga_outb(M_EXTVGA_INDEX, 1);
1202 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1203
1204 CRITEND
1205 return 0;
1206 }
1207
1208 static struct fb_ops matroxfb_ops = {
1209 .owner = THIS_MODULE,
1210 .fb_open = matroxfb_open,
1211 .fb_release = matroxfb_release,
1212 .fb_check_var = matroxfb_check_var,
1213 .fb_set_par = matroxfb_set_par,
1214 .fb_setcolreg = matroxfb_setcolreg,
1215 .fb_pan_display =matroxfb_pan_display,
1216 .fb_blank = matroxfb_blank,
1217 .fb_ioctl = matroxfb_ioctl,
1218 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1219 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1220 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1221 /* .fb_cursor = <set by matrox_cfbX_init>, */
1222 };
1223
1224 #define RSDepth(X) (((X) >> 8) & 0x0F)
1225 #define RS8bpp 0x1
1226 #define RS15bpp 0x2
1227 #define RS16bpp 0x3
1228 #define RS32bpp 0x4
1229 #define RS4bpp 0x5
1230 #define RS24bpp 0x6
1231 #define RSText 0x7
1232 #define RSText8 0x8
1233 /* 9-F */
1234 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1235 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1236 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1237 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1238 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1239 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1240 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1241 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1242 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1243 };
1244
1245 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1246 static unsigned int mem; /* "matroxfb:mem:xxxxxM" */
1247 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1248 static int inv24; /* "matroxfb:inv24" */
1249 static int cross4MB = -1; /* "matroxfb:cross4MB" */
1250 static int disabled; /* "matroxfb:disabled" */
1251 static int noaccel; /* "matroxfb:noaccel" */
1252 static int nopan; /* "matroxfb:nopan" */
1253 static int no_pci_retry; /* "matroxfb:nopciretry" */
1254 static int novga; /* "matroxfb:novga" */
1255 static int nobios; /* "matroxfb:nobios" */
1256 static int noinit = 1; /* "matroxfb:init" */
1257 static int inverse; /* "matroxfb:inverse" */
1258 static int sgram; /* "matroxfb:sgram" */
1259 #ifdef CONFIG_MTRR
1260 static int mtrr = 1; /* "matroxfb:nomtrr" */
1261 #endif
1262 static int grayscale; /* "matroxfb:grayscale" */
1263 static int dev = -1; /* "matroxfb:dev:xxxxx" */
1264 static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */
1265 static int depth = -1; /* "matroxfb:depth:xxxxx" */
1266 static unsigned int xres; /* "matroxfb:xres:xxxxx" */
1267 static unsigned int yres; /* "matroxfb:yres:xxxxx" */
1268 static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */
1269 static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */
1270 static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */
1271 static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */
1272 static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */
1273 static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */
1274 static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */
1275 static int sync = -1; /* "matroxfb:sync:xxxxx" */
1276 static unsigned int fv; /* "matroxfb:fv:xxxxx" */
1277 static unsigned int fh; /* "matroxfb:fh:xxxxxk" */
1278 static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */
1279 static int dfp; /* "matroxfb:dfp */
1280 static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1281 static int memtype = -1; /* "matroxfb:memtype:xxx" */
1282 static char outputs[8]; /* "matroxfb:outputs:xxx" */
1283
1284 #ifndef MODULE
1285 static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */
1286 #endif
1287
1288 static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1289 unsigned int maxSize, unsigned int *realSize)
1290 {
1291 vaddr_t vm;
1292 unsigned int offs;
1293 unsigned int offs2;
1294 unsigned char orig;
1295 unsigned char bytes[32];
1296 unsigned char* tmp;
1297
1298 DBG(__func__)
1299
1300 vm = minfo->video.vbase;
1301 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1302 /* at least 2MB */
1303 if (maxSize < 0x0200000) return 0;
1304 if (maxSize > 0x2000000) maxSize = 0x2000000;
1305
1306 mga_outb(M_EXTVGA_INDEX, 0x03);
1307 orig = mga_inb(M_EXTVGA_DATA);
1308 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1309
1310 tmp = bytes;
1311 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1312 *tmp++ = mga_readb(vm, offs);
1313 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1314 mga_writeb(vm, offs, 0x02);
1315 mga_outb(M_CACHEFLUSH, 0x00);
1316 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1317 if (mga_readb(vm, offs) != 0x02)
1318 break;
1319 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1320 if (mga_readb(vm, offs))
1321 break;
1322 }
1323 tmp = bytes;
1324 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1325 mga_writeb(vm, offs2, *tmp++);
1326
1327 mga_outb(M_EXTVGA_INDEX, 0x03);
1328 mga_outb(M_EXTVGA_DATA, orig);
1329
1330 *realSize = offs - 0x100000;
1331 #ifdef CONFIG_FB_MATROX_MILLENIUM
1332 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1333 #endif
1334 return 1;
1335 }
1336
1337 struct video_board {
1338 int maxvram;
1339 int maxdisplayable;
1340 int accelID;
1341 struct matrox_switch* lowlevel;
1342 };
1343 #ifdef CONFIG_FB_MATROX_MILLENIUM
1344 static struct video_board vbMillennium = {
1345 .maxvram = 0x0800000,
1346 .maxdisplayable = 0x0800000,
1347 .accelID = FB_ACCEL_MATROX_MGA2064W,
1348 .lowlevel = &matrox_millennium
1349 };
1350
1351 static struct video_board vbMillennium2 = {
1352 .maxvram = 0x1000000,
1353 .maxdisplayable = 0x0800000,
1354 .accelID = FB_ACCEL_MATROX_MGA2164W,
1355 .lowlevel = &matrox_millennium
1356 };
1357
1358 static struct video_board vbMillennium2A = {
1359 .maxvram = 0x1000000,
1360 .maxdisplayable = 0x0800000,
1361 .accelID = FB_ACCEL_MATROX_MGA2164W_AGP,
1362 .lowlevel = &matrox_millennium
1363 };
1364 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1365 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1366 static struct video_board vbMystique = {
1367 .maxvram = 0x0800000,
1368 .maxdisplayable = 0x0800000,
1369 .accelID = FB_ACCEL_MATROX_MGA1064SG,
1370 .lowlevel = &matrox_mystique
1371 };
1372 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1373 #ifdef CONFIG_FB_MATROX_G
1374 static struct video_board vbG100 = {
1375 .maxvram = 0x0800000,
1376 .maxdisplayable = 0x0800000,
1377 .accelID = FB_ACCEL_MATROX_MGAG100,
1378 .lowlevel = &matrox_G100
1379 };
1380
1381 static struct video_board vbG200 = {
1382 .maxvram = 0x1000000,
1383 .maxdisplayable = 0x1000000,
1384 .accelID = FB_ACCEL_MATROX_MGAG200,
1385 .lowlevel = &matrox_G100
1386 };
1387 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1388 whole 32MB */
1389 static struct video_board vbG400 = {
1390 .maxvram = 0x2000000,
1391 .maxdisplayable = 0x1000000,
1392 .accelID = FB_ACCEL_MATROX_MGAG400,
1393 .lowlevel = &matrox_G100
1394 };
1395 #endif
1396
1397 #define DEVF_VIDEO64BIT 0x0001
1398 #define DEVF_SWAPS 0x0002
1399 #define DEVF_SRCORG 0x0004
1400 #define DEVF_DUALHEAD 0x0008
1401 #define DEVF_CROSS4MB 0x0010
1402 #define DEVF_TEXT4B 0x0020
1403 /* #define DEVF_recycled 0x0040 */
1404 /* #define DEVF_recycled 0x0080 */
1405 #define DEVF_SUPPORT32MB 0x0100
1406 #define DEVF_ANY_VXRES 0x0200
1407 #define DEVF_TEXT16B 0x0400
1408 #define DEVF_CRTC2 0x0800
1409 #define DEVF_MAVEN_CAPABLE 0x1000
1410 #define DEVF_PANELLINK_CAPABLE 0x2000
1411 #define DEVF_G450DAC 0x4000
1412
1413 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1414 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1415 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1416 #define DEVF_G200 (DEVF_G2CORE)
1417 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1418 /* if you'll find how to drive DFP... */
1419 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1420 #define DEVF_G550 (DEVF_G450)
1421
1422 static struct board {
1423 unsigned short vendor, device, rev, svid, sid;
1424 unsigned int flags;
1425 unsigned int maxclk;
1426 enum mga_chip chip;
1427 struct video_board* base;
1428 const char* name;
1429 } dev_list[] = {
1430 #ifdef CONFIG_FB_MATROX_MILLENIUM
1431 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1432 0, 0,
1433 DEVF_TEXT4B,
1434 230000,
1435 MGA_2064,
1436 &vbMillennium,
1437 "Millennium (PCI)"},
1438 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1439 0, 0,
1440 DEVF_SWAPS,
1441 220000,
1442 MGA_2164,
1443 &vbMillennium2,
1444 "Millennium II (PCI)"},
1445 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1446 0, 0,
1447 DEVF_SWAPS,
1448 250000,
1449 MGA_2164,
1450 &vbMillennium2A,
1451 "Millennium II (AGP)"},
1452 #endif
1453 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1454 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1455 0, 0,
1456 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1457 180000,
1458 MGA_1064,
1459 &vbMystique,
1460 "Mystique (PCI)"},
1461 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1462 0, 0,
1463 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1464 220000,
1465 MGA_1164,
1466 &vbMystique,
1467 "Mystique 220 (PCI)"},
1468 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1469 0, 0,
1470 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1471 180000,
1472 MGA_1064,
1473 &vbMystique,
1474 "Mystique (AGP)"},
1475 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1476 0, 0,
1477 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1478 220000,
1479 MGA_1164,
1480 &vbMystique,
1481 "Mystique 220 (AGP)"},
1482 #endif
1483 #ifdef CONFIG_FB_MATROX_G
1484 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1485 0, 0,
1486 DEVF_G100,
1487 230000,
1488 MGA_G100,
1489 &vbG100,
1490 "MGA-G100 (PCI)"},
1491 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1492 0, 0,
1493 DEVF_G100,
1494 230000,
1495 MGA_G100,
1496 &vbG100,
1497 "MGA-G100 (AGP)"},
1498 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1499 0, 0,
1500 DEVF_G200,
1501 250000,
1502 MGA_G200,
1503 &vbG200,
1504 "MGA-G200 (PCI)"},
1505 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1506 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1507 DEVF_G200,
1508 220000,
1509 MGA_G200,
1510 &vbG200,
1511 "MGA-G200 (AGP)"},
1512 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1513 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1514 DEVF_G200,
1515 230000,
1516 MGA_G200,
1517 &vbG200,
1518 "Mystique G200 (AGP)"},
1519 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1520 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1521 DEVF_G200,
1522 250000,
1523 MGA_G200,
1524 &vbG200,
1525 "Millennium G200 (AGP)"},
1526 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1527 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1528 DEVF_G200,
1529 230000,
1530 MGA_G200,
1531 &vbG200,
1532 "Marvel G200 (AGP)"},
1533 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1534 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1535 DEVF_G200,
1536 230000,
1537 MGA_G200,
1538 &vbG200,
1539 "MGA-G200 (AGP)"},
1540 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1541 0, 0,
1542 DEVF_G200,
1543 230000,
1544 MGA_G200,
1545 &vbG200,
1546 "G200 (AGP)"},
1547 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1548 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1549 DEVF_G400,
1550 360000,
1551 MGA_G400,
1552 &vbG400,
1553 "Millennium G400 MAX (AGP)"},
1554 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1555 0, 0,
1556 DEVF_G400,
1557 300000,
1558 MGA_G400,
1559 &vbG400,
1560 "G400 (AGP)"},
1561 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1562 0, 0,
1563 DEVF_G450,
1564 360000,
1565 MGA_G450,
1566 &vbG400,
1567 "G450"},
1568 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1569 0, 0,
1570 DEVF_G550,
1571 360000,
1572 MGA_G550,
1573 &vbG400,
1574 "G550"},
1575 #endif
1576 {0, 0, 0xFF,
1577 0, 0,
1578 0,
1579 0,
1580 0,
1581 NULL,
1582 NULL}};
1583
1584 #ifndef MODULE
1585 static struct fb_videomode defaultmode = {
1586 /* 640x480 @ 60Hz, 31.5 kHz */
1587 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1588 0, FB_VMODE_NONINTERLACED
1589 };
1590 #endif /* !MODULE */
1591
1592 static int hotplug = 0;
1593
1594 static void setDefaultOutputs(struct matrox_fb_info *minfo)
1595 {
1596 unsigned int i;
1597 const char* ptr;
1598
1599 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1600 if (minfo->devflags.g450dac) {
1601 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1602 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1603 } else if (dfp) {
1604 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1605 }
1606 ptr = outputs;
1607 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1608 char c = *ptr++;
1609
1610 if (c == 0) {
1611 break;
1612 }
1613 if (c == '0') {
1614 minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1615 } else if (c == '1') {
1616 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1617 } else if (c == '2' && minfo->devflags.crtc2) {
1618 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1619 } else {
1620 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1621 break;
1622 }
1623 }
1624 /* Nullify this option for subsequent adapters */
1625 outputs[0] = 0;
1626 }
1627
1628 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1629 {
1630 unsigned long ctrlptr_phys = 0;
1631 unsigned long video_base_phys = 0;
1632 unsigned int memsize;
1633 int err;
1634
1635 static struct pci_device_id intel_82437[] = {
1636 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1637 { },
1638 };
1639
1640 DBG(__func__)
1641
1642 /* set default values... */
1643 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1644
1645 minfo->hw_switch = b->base->lowlevel;
1646 minfo->devflags.accelerator = b->base->accelID;
1647 minfo->max_pixel_clock = b->maxclk;
1648
1649 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1650 minfo->capable.plnwt = 1;
1651 minfo->chip = b->chip;
1652 minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1653 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1654 if (b->flags & DEVF_TEXT4B) {
1655 minfo->devflags.vgastep = 4;
1656 minfo->devflags.textmode = 4;
1657 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1658 } else if (b->flags & DEVF_TEXT16B) {
1659 minfo->devflags.vgastep = 16;
1660 minfo->devflags.textmode = 1;
1661 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1662 } else {
1663 minfo->devflags.vgastep = 8;
1664 minfo->devflags.textmode = 1;
1665 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1666 }
1667 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1668 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1669 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1670 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1671 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1672 minfo->devflags.dfp_type = dfp_type;
1673 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1674 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1675 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1676 setDefaultOutputs(minfo);
1677 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1678 minfo->outputs[2].data = minfo;
1679 minfo->outputs[2].output = &panellink_output;
1680 minfo->outputs[2].src = minfo->outputs[2].default_src;
1681 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1682 minfo->devflags.panellink = 1;
1683 }
1684
1685 if (minfo->capable.cross4MB < 0)
1686 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1687 if (b->flags & DEVF_SWAPS) {
1688 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1689 video_base_phys = pci_resource_start(minfo->pcidev, 0);
1690 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1691 } else {
1692 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1693 video_base_phys = pci_resource_start(minfo->pcidev, 1);
1694 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1695 }
1696 err = -EINVAL;
1697 if (!ctrlptr_phys) {
1698 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1699 goto fail;
1700 }
1701 if (!video_base_phys) {
1702 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1703 goto fail;
1704 }
1705 memsize = b->base->maxvram;
1706 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1707 goto fail;
1708 }
1709 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1710 goto failCtrlMR;
1711 }
1712 minfo->video.len_maximum = memsize;
1713 /* convert mem (autodetect k, M) */
1714 if (mem < 1024) mem *= 1024;
1715 if (mem < 0x00100000) mem *= 1024;
1716
1717 if (mem && (mem < memsize))
1718 memsize = mem;
1719 err = -ENOMEM;
1720 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &minfo->mmio.vbase)) {
1721 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1722 goto failVideoMR;
1723 }
1724 minfo->mmio.base = ctrlptr_phys;
1725 minfo->mmio.len = 16384;
1726 minfo->video.base = video_base_phys;
1727 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &minfo->video.vbase)) {
1728 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1729 video_base_phys, memsize);
1730 goto failCtrlIO;
1731 }
1732 {
1733 u_int32_t cmd;
1734 u_int32_t mga_option;
1735
1736 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1737 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1738 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1739 mga_option |= MX_OPTION_BSWAP;
1740 /* disable palette snooping */
1741 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1742 if (pci_dev_present(intel_82437)) {
1743 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1744 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1745 }
1746 mga_option |= 0x20000000;
1747 minfo->devflags.nopciretry = 1;
1748 }
1749 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1750 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1751 minfo->hw.MXoptionReg = mga_option;
1752
1753 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1754 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1755 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1756 }
1757
1758 err = -ENXIO;
1759 matroxfb_read_pins(minfo);
1760 if (minfo->hw_switch->preinit(minfo)) {
1761 goto failVideoIO;
1762 }
1763
1764 err = -ENOMEM;
1765 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1766 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1767 goto failVideoIO;
1768 }
1769 minfo->devflags.ydstorg = 0;
1770
1771 minfo->video.base = video_base_phys;
1772 minfo->video.len_usable = minfo->video.len;
1773 if (minfo->video.len_usable > b->base->maxdisplayable)
1774 minfo->video.len_usable = b->base->maxdisplayable;
1775 #ifdef CONFIG_MTRR
1776 if (mtrr) {
1777 minfo->mtrr.vram = mtrr_add(video_base_phys, minfo->video.len, MTRR_TYPE_WRCOMB, 1);
1778 minfo->mtrr.vram_valid = 1;
1779 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1780 }
1781 #endif /* CONFIG_MTRR */
1782
1783 if (!minfo->devflags.novga)
1784 request_region(0x3C0, 32, "matrox");
1785 matroxfb_g450_connect(minfo);
1786 minfo->hw_switch->reset(minfo);
1787
1788 minfo->fbcon.monspecs.hfmin = 0;
1789 minfo->fbcon.monspecs.hfmax = fh;
1790 minfo->fbcon.monspecs.vfmin = 0;
1791 minfo->fbcon.monspecs.vfmax = fv;
1792 minfo->fbcon.monspecs.dpms = 0; /* TBD */
1793
1794 /* static settings */
1795 vesafb_defined.red = colors[depth-1].red;
1796 vesafb_defined.green = colors[depth-1].green;
1797 vesafb_defined.blue = colors[depth-1].blue;
1798 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1799 vesafb_defined.grayscale = grayscale;
1800 vesafb_defined.vmode = 0;
1801 if (noaccel)
1802 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1803
1804 minfo->fbops = matroxfb_ops;
1805 minfo->fbcon.fbops = &minfo->fbops;
1806 minfo->fbcon.pseudo_palette = minfo->cmap;
1807 /* after __init time we are like module... no logo */
1808 minfo->fbcon.flags = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1809 minfo->fbcon.flags |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1810 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1811 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1812 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1813 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1814 FBINFO_HWACCEL_YPAN | /* And vertical panning */
1815 FBINFO_READS_FAST;
1816 minfo->video.len_usable &= PAGE_MASK;
1817 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1818
1819 #ifndef MODULE
1820 /* mode database is marked __init!!! */
1821 if (!hotplug) {
1822 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1823 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1824 }
1825 #endif /* !MODULE */
1826
1827 /* mode modifiers */
1828 if (hslen)
1829 vesafb_defined.hsync_len = hslen;
1830 if (vslen)
1831 vesafb_defined.vsync_len = vslen;
1832 if (left != ~0)
1833 vesafb_defined.left_margin = left;
1834 if (right != ~0)
1835 vesafb_defined.right_margin = right;
1836 if (upper != ~0)
1837 vesafb_defined.upper_margin = upper;
1838 if (lower != ~0)
1839 vesafb_defined.lower_margin = lower;
1840 if (xres)
1841 vesafb_defined.xres = xres;
1842 if (yres)
1843 vesafb_defined.yres = yres;
1844 if (sync != -1)
1845 vesafb_defined.sync = sync;
1846 else if (vesafb_defined.sync == ~0) {
1847 vesafb_defined.sync = 0;
1848 if (yres < 400)
1849 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1850 else if (yres < 480)
1851 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1852 }
1853
1854 /* fv, fh, maxclk limits was specified */
1855 {
1856 unsigned int tmp;
1857
1858 if (fv) {
1859 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1860 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1861 if ((tmp < fh) || (fh == 0)) fh = tmp;
1862 }
1863 if (fh) {
1864 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1865 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1866 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1867 }
1868 tmp = (maxclk + 499) / 500;
1869 if (tmp) {
1870 tmp = (2000000000 + tmp) / tmp;
1871 if (tmp > pixclock) pixclock = tmp;
1872 }
1873 }
1874 if (pixclock) {
1875 if (pixclock < 2000) /* > 500MHz */
1876 pixclock = 4000; /* 250MHz */
1877 if (pixclock > 1000000)
1878 pixclock = 1000000; /* 1MHz */
1879 vesafb_defined.pixclock = pixclock;
1880 }
1881
1882 /* FIXME: Where to move this?! */
1883 #if defined(CONFIG_PPC_PMAC)
1884 #ifndef MODULE
1885 if (machine_is(powermac)) {
1886 struct fb_var_screeninfo var;
1887 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1888 default_vmode = VMODE_640_480_60;
1889 #ifdef CONFIG_NVRAM
1890 if (default_cmode == CMODE_NVRAM)
1891 default_cmode = nvram_read_byte(NV_CMODE);
1892 #endif
1893 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1894 default_cmode = CMODE_8;
1895 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1896 var.accel_flags = vesafb_defined.accel_flags;
1897 var.xoffset = var.yoffset = 0;
1898 /* Note: mac_vmode_to_var() does not set all parameters */
1899 vesafb_defined = var;
1900 }
1901 }
1902 #endif /* !MODULE */
1903 #endif /* CONFIG_PPC_PMAC */
1904 vesafb_defined.xres_virtual = vesafb_defined.xres;
1905 if (nopan) {
1906 vesafb_defined.yres_virtual = vesafb_defined.yres;
1907 } else {
1908 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1909 to yres_virtual * xres_virtual < 2^32 */
1910 }
1911 matroxfb_init_fix(minfo);
1912 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1913 /* Normalize values (namely yres_virtual) */
1914 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1915 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1916 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1917 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1918 * anyway. But we at least tried... */
1919 minfo->fbcon.var = vesafb_defined;
1920 err = -EINVAL;
1921
1922 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1923 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1924 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1925 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1926 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1927
1928 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1929 * and we do not want currcon == 0 for subsequent framebuffers */
1930
1931 minfo->fbcon.device = &minfo->pcidev->dev;
1932 if (register_framebuffer(&minfo->fbcon) < 0) {
1933 goto failVideoIO;
1934 }
1935 fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id);
1936
1937 /* there is no console on this fb... but we have to initialize hardware
1938 * until someone tells me what is proper thing to do */
1939 if (!minfo->initialized) {
1940 fb_info(&minfo->fbcon, "initializing hardware\n");
1941 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1942 * already before, so register_framebuffer works correctly. */
1943 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1944 fb_set_var(&minfo->fbcon, &vesafb_defined);
1945 }
1946
1947 return 0;
1948 failVideoIO:;
1949 matroxfb_g450_shutdown(minfo);
1950 mga_iounmap(minfo->video.vbase);
1951 failCtrlIO:;
1952 mga_iounmap(minfo->mmio.vbase);
1953 failVideoMR:;
1954 release_mem_region(video_base_phys, minfo->video.len_maximum);
1955 failCtrlMR:;
1956 release_mem_region(ctrlptr_phys, 16384);
1957 fail:;
1958 return err;
1959 }
1960
1961 static LIST_HEAD(matroxfb_list);
1962 static LIST_HEAD(matroxfb_driver_list);
1963
1964 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1965 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1966 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1967 struct matrox_fb_info* minfo;
1968
1969 list_add(&drv->node, &matroxfb_driver_list);
1970 for (minfo = matroxfb_l(matroxfb_list.next);
1971 minfo != matroxfb_l(&matroxfb_list);
1972 minfo = matroxfb_l(minfo->next_fb.next)) {
1973 void* p;
1974
1975 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1976 continue;
1977 p = drv->probe(minfo);
1978 if (p) {
1979 minfo->drivers_data[minfo->drivers_count] = p;
1980 minfo->drivers[minfo->drivers_count++] = drv;
1981 }
1982 }
1983 return 0;
1984 }
1985
1986 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1987 struct matrox_fb_info* minfo;
1988
1989 list_del(&drv->node);
1990 for (minfo = matroxfb_l(matroxfb_list.next);
1991 minfo != matroxfb_l(&matroxfb_list);
1992 minfo = matroxfb_l(minfo->next_fb.next)) {
1993 int i;
1994
1995 for (i = 0; i < minfo->drivers_count; ) {
1996 if (minfo->drivers[i] == drv) {
1997 if (drv && drv->remove)
1998 drv->remove(minfo, minfo->drivers_data[i]);
1999 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
2000 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
2001 } else
2002 i++;
2003 }
2004 }
2005 }
2006
2007 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
2008 struct matroxfb_driver* drv;
2009 int i = 0;
2010 list_add(&minfo->next_fb, &matroxfb_list);
2011 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
2012 drv != matroxfb_driver_l(&matroxfb_driver_list);
2013 drv = matroxfb_driver_l(drv->node.next)) {
2014 if (drv && drv->probe) {
2015 void *p = drv->probe(minfo);
2016 if (p) {
2017 minfo->drivers_data[i] = p;
2018 minfo->drivers[i++] = drv;
2019 if (i == MATROXFB_MAX_FB_DRIVERS)
2020 break;
2021 }
2022 }
2023 }
2024 minfo->drivers_count = i;
2025 }
2026
2027 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
2028 int i;
2029
2030 list_del(&minfo->next_fb);
2031 for (i = 0; i < minfo->drivers_count; i++) {
2032 struct matroxfb_driver* drv = minfo->drivers[i];
2033
2034 if (drv && drv->remove)
2035 drv->remove(minfo, minfo->drivers_data[i]);
2036 }
2037 }
2038
2039 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2040 struct board* b;
2041 u_int16_t svid;
2042 u_int16_t sid;
2043 struct matrox_fb_info* minfo;
2044 int err;
2045 u_int32_t cmd;
2046 DBG(__func__)
2047
2048 svid = pdev->subsystem_vendor;
2049 sid = pdev->subsystem_device;
2050 for (b = dev_list; b->vendor; b++) {
2051 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2052 if (b->svid)
2053 if ((b->svid != svid) || (b->sid != sid)) continue;
2054 break;
2055 }
2056 /* not match... */
2057 if (!b->vendor)
2058 return -ENODEV;
2059 if (dev > 0) {
2060 /* not requested one... */
2061 dev--;
2062 return -ENODEV;
2063 }
2064 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2065 if (pci_enable_device(pdev)) {
2066 return -1;
2067 }
2068
2069 minfo = kzalloc(sizeof(*minfo), GFP_KERNEL);
2070 if (!minfo)
2071 return -1;
2072
2073 minfo->pcidev = pdev;
2074 minfo->dead = 0;
2075 minfo->usecount = 0;
2076 minfo->userusecount = 0;
2077
2078 pci_set_drvdata(pdev, minfo);
2079 /* DEVFLAGS */
2080 minfo->devflags.memtype = memtype;
2081 if (memtype != -1)
2082 noinit = 0;
2083 if (cmd & PCI_COMMAND_MEMORY) {
2084 minfo->devflags.novga = novga;
2085 minfo->devflags.nobios = nobios;
2086 minfo->devflags.noinit = noinit;
2087 /* subsequent heads always needs initialization and must not enable BIOS */
2088 novga = 1;
2089 nobios = 1;
2090 noinit = 0;
2091 } else {
2092 minfo->devflags.novga = 1;
2093 minfo->devflags.nobios = 1;
2094 minfo->devflags.noinit = 0;
2095 }
2096
2097 minfo->devflags.nopciretry = no_pci_retry;
2098 minfo->devflags.mga_24bpp_fix = inv24;
2099 minfo->devflags.precise_width = option_precise_width;
2100 minfo->devflags.sgram = sgram;
2101 minfo->capable.cross4MB = cross4MB;
2102
2103 spin_lock_init(&minfo->lock.DAC);
2104 spin_lock_init(&minfo->lock.accel);
2105 init_rwsem(&minfo->crtc2.lock);
2106 init_rwsem(&minfo->altout.lock);
2107 mutex_init(&minfo->fbcon.mm_lock);
2108 minfo->irq_flags = 0;
2109 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2110 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2111 minfo->crtc1.panpos = -1;
2112
2113 err = initMatrox2(minfo, b);
2114 if (!err) {
2115 matroxfb_register_device(minfo);
2116 return 0;
2117 }
2118 kfree(minfo);
2119 return -1;
2120 }
2121
2122 static void pci_remove_matrox(struct pci_dev* pdev) {
2123 struct matrox_fb_info* minfo;
2124
2125 minfo = pci_get_drvdata(pdev);
2126 matroxfb_remove(minfo, 1);
2127 }
2128
2129 static struct pci_device_id matroxfb_devices[] = {
2130 #ifdef CONFIG_FB_MATROX_MILLENIUM
2131 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2132 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2133 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2134 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2135 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2136 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2137 #endif
2138 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2139 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2140 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2141 #endif
2142 #ifdef CONFIG_FB_MATROX_G
2143 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2144 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2145 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2147 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2148 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2149 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2151 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2153 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2155 #endif
2156 {0, 0,
2157 0, 0, 0, 0, 0}
2158 };
2159
2160 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2161
2162
2163 static struct pci_driver matroxfb_driver = {
2164 .name = "matroxfb",
2165 .id_table = matroxfb_devices,
2166 .probe = matroxfb_probe,
2167 .remove = pci_remove_matrox,
2168 };
2169
2170 /* **************************** init-time only **************************** */
2171
2172 #define RSResolution(X) ((X) & 0x0F)
2173 #define RS640x400 1
2174 #define RS640x480 2
2175 #define RS800x600 3
2176 #define RS1024x768 4
2177 #define RS1280x1024 5
2178 #define RS1600x1200 6
2179 #define RS768x576 7
2180 #define RS960x720 8
2181 #define RS1152x864 9
2182 #define RS1408x1056 10
2183 #define RS640x350 11
2184 #define RS1056x344 12 /* 132 x 43 text */
2185 #define RS1056x400 13 /* 132 x 50 text */
2186 #define RS1056x480 14 /* 132 x 60 text */
2187 #define RSNoxNo 15
2188 /* 10-FF */
2189 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2190 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2191 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2192 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2193 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2194 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2195 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2196 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2197 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2198 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2199 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2200 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2201 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2202 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2203 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2204 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2205 };
2206
2207 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2208 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2209 /* default must be first */
2210 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2211 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2212 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2213 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2214 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2215 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2216 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2217 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2218 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2219 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2220 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2221 { 0x110, RSCreate(RS640x480, RS15bpp) },
2222 { 0x181, RSCreate(RS768x576, RS15bpp) },
2223 { 0x113, RSCreate(RS800x600, RS15bpp) },
2224 { 0x189, RSCreate(RS960x720, RS15bpp) },
2225 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2226 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2227 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2228 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2229 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2230 { 0x111, RSCreate(RS640x480, RS16bpp) },
2231 { 0x182, RSCreate(RS768x576, RS16bpp) },
2232 { 0x114, RSCreate(RS800x600, RS16bpp) },
2233 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2234 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2235 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2236 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2237 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2238 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2239 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2240 { 0x184, RSCreate(RS768x576, RS24bpp) },
2241 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2242 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2243 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2244 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2245 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2246 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2247 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2248 { 0x112, RSCreate(RS640x480, RS32bpp) },
2249 { 0x183, RSCreate(RS768x576, RS32bpp) },
2250 { 0x115, RSCreate(RS800x600, RS32bpp) },
2251 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2252 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2253 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2254 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2255 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2256 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2257 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2258 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2259 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2260 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2261 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2262 { 0, 0 }};
2263
2264 static void __init matroxfb_init_params(void) {
2265 /* fh from kHz to Hz */
2266 if (fh < 1000)
2267 fh *= 1000; /* 1kHz minimum */
2268 /* maxclk */
2269 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2270 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2271 /* fix VESA number */
2272 if (vesa != ~0)
2273 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2274
2275 /* static settings */
2276 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2277 if (RSptr->vesa == vesa) break;
2278 }
2279 if (!RSptr->vesa) {
2280 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2281 RSptr = vesamap;
2282 }
2283 {
2284 int res = RSResolution(RSptr->info)-1;
2285 if (left == ~0)
2286 left = timmings[res].left;
2287 if (!xres)
2288 xres = timmings[res].xres;
2289 if (right == ~0)
2290 right = timmings[res].right;
2291 if (!hslen)
2292 hslen = timmings[res].hslen;
2293 if (upper == ~0)
2294 upper = timmings[res].upper;
2295 if (!yres)
2296 yres = timmings[res].yres;
2297 if (lower == ~0)
2298 lower = timmings[res].lower;
2299 if (!vslen)
2300 vslen = timmings[res].vslen;
2301 if (!(fv||fh||maxclk||pixclock))
2302 fv = timmings[res].vfreq;
2303 if (depth == -1)
2304 depth = RSDepth(RSptr->info);
2305 }
2306 }
2307
2308 static int __init matrox_init(void) {
2309 int err;
2310
2311 matroxfb_init_params();
2312 err = pci_register_driver(&matroxfb_driver);
2313 dev = -1; /* accept all new devices... */
2314 return err;
2315 }
2316
2317 /* **************************** exit-time only **************************** */
2318
2319 static void __exit matrox_done(void) {
2320 pci_unregister_driver(&matroxfb_driver);
2321 }
2322
2323 #ifndef MODULE
2324
2325 /* ************************* init in-kernel code ************************** */
2326
2327 static int __init matroxfb_setup(char *options) {
2328 char *this_opt;
2329
2330 DBG(__func__)
2331
2332 if (!options || !*options)
2333 return 0;
2334
2335 while ((this_opt = strsep(&options, ",")) != NULL) {
2336 if (!*this_opt) continue;
2337
2338 dprintk("matroxfb_setup: option %s\n", this_opt);
2339
2340 if (!strncmp(this_opt, "dev:", 4))
2341 dev = simple_strtoul(this_opt+4, NULL, 0);
2342 else if (!strncmp(this_opt, "depth:", 6)) {
2343 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2344 case 0: depth = RSText; break;
2345 case 4: depth = RS4bpp; break;
2346 case 8: depth = RS8bpp; break;
2347 case 15:depth = RS15bpp; break;
2348 case 16:depth = RS16bpp; break;
2349 case 24:depth = RS24bpp; break;
2350 case 32:depth = RS32bpp; break;
2351 default:
2352 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2353 }
2354 } else if (!strncmp(this_opt, "xres:", 5))
2355 xres = simple_strtoul(this_opt+5, NULL, 0);
2356 else if (!strncmp(this_opt, "yres:", 5))
2357 yres = simple_strtoul(this_opt+5, NULL, 0);
2358 else if (!strncmp(this_opt, "vslen:", 6))
2359 vslen = simple_strtoul(this_opt+6, NULL, 0);
2360 else if (!strncmp(this_opt, "hslen:", 6))
2361 hslen = simple_strtoul(this_opt+6, NULL, 0);
2362 else if (!strncmp(this_opt, "left:", 5))
2363 left = simple_strtoul(this_opt+5, NULL, 0);
2364 else if (!strncmp(this_opt, "right:", 6))
2365 right = simple_strtoul(this_opt+6, NULL, 0);
2366 else if (!strncmp(this_opt, "upper:", 6))
2367 upper = simple_strtoul(this_opt+6, NULL, 0);
2368 else if (!strncmp(this_opt, "lower:", 6))
2369 lower = simple_strtoul(this_opt+6, NULL, 0);
2370 else if (!strncmp(this_opt, "pixclock:", 9))
2371 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2372 else if (!strncmp(this_opt, "sync:", 5))
2373 sync = simple_strtoul(this_opt+5, NULL, 0);
2374 else if (!strncmp(this_opt, "vesa:", 5))
2375 vesa = simple_strtoul(this_opt+5, NULL, 0);
2376 else if (!strncmp(this_opt, "maxclk:", 7))
2377 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2378 else if (!strncmp(this_opt, "fh:", 3))
2379 fh = simple_strtoul(this_opt+3, NULL, 0);
2380 else if (!strncmp(this_opt, "fv:", 3))
2381 fv = simple_strtoul(this_opt+3, NULL, 0);
2382 else if (!strncmp(this_opt, "mem:", 4))
2383 mem = simple_strtoul(this_opt+4, NULL, 0);
2384 else if (!strncmp(this_opt, "mode:", 5))
2385 strlcpy(videomode, this_opt+5, sizeof(videomode));
2386 else if (!strncmp(this_opt, "outputs:", 8))
2387 strlcpy(outputs, this_opt+8, sizeof(outputs));
2388 else if (!strncmp(this_opt, "dfp:", 4)) {
2389 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2390 dfp = 1;
2391 }
2392 #ifdef CONFIG_PPC_PMAC
2393 else if (!strncmp(this_opt, "vmode:", 6)) {
2394 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2395 if (vmode > 0 && vmode <= VMODE_MAX)
2396 default_vmode = vmode;
2397 } else if (!strncmp(this_opt, "cmode:", 6)) {
2398 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2399 switch (cmode) {
2400 case 0:
2401 case 8:
2402 default_cmode = CMODE_8;
2403 break;
2404 case 15:
2405 case 16:
2406 default_cmode = CMODE_16;
2407 break;
2408 case 24:
2409 case 32:
2410 default_cmode = CMODE_32;
2411 break;
2412 }
2413 }
2414 #endif
2415 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2416 disabled = 1;
2417 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2418 disabled = 0;
2419 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2420 sgram = 1;
2421 else if (!strcmp(this_opt, "sdram"))
2422 sgram = 0;
2423 else if (!strncmp(this_opt, "memtype:", 8))
2424 memtype = simple_strtoul(this_opt+8, NULL, 0);
2425 else {
2426 int value = 1;
2427
2428 if (!strncmp(this_opt, "no", 2)) {
2429 value = 0;
2430 this_opt += 2;
2431 }
2432 if (! strcmp(this_opt, "inverse"))
2433 inverse = value;
2434 else if (!strcmp(this_opt, "accel"))
2435 noaccel = !value;
2436 else if (!strcmp(this_opt, "pan"))
2437 nopan = !value;
2438 else if (!strcmp(this_opt, "pciretry"))
2439 no_pci_retry = !value;
2440 else if (!strcmp(this_opt, "vga"))
2441 novga = !value;
2442 else if (!strcmp(this_opt, "bios"))
2443 nobios = !value;
2444 else if (!strcmp(this_opt, "init"))
2445 noinit = !value;
2446 #ifdef CONFIG_MTRR
2447 else if (!strcmp(this_opt, "mtrr"))
2448 mtrr = value;
2449 #endif
2450 else if (!strcmp(this_opt, "inv24"))
2451 inv24 = value;
2452 else if (!strcmp(this_opt, "cross4MB"))
2453 cross4MB = value;
2454 else if (!strcmp(this_opt, "grayscale"))
2455 grayscale = value;
2456 else if (!strcmp(this_opt, "dfp"))
2457 dfp = value;
2458 else {
2459 strlcpy(videomode, this_opt, sizeof(videomode));
2460 }
2461 }
2462 }
2463 return 0;
2464 }
2465
2466 static int __initdata initialized = 0;
2467
2468 static int __init matroxfb_init(void)
2469 {
2470 char *option = NULL;
2471 int err = 0;
2472
2473 DBG(__func__)
2474
2475 if (fb_get_options("matroxfb", &option))
2476 return -ENODEV;
2477 matroxfb_setup(option);
2478
2479 if (disabled)
2480 return -ENXIO;
2481 if (!initialized) {
2482 initialized = 1;
2483 err = matrox_init();
2484 }
2485 hotplug = 1;
2486 /* never return failure, user can hotplug matrox later... */
2487 return err;
2488 }
2489
2490 module_init(matroxfb_init);
2491
2492 #else
2493
2494 /* *************************** init module code **************************** */
2495
2496 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2497 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2498 MODULE_LICENSE("GPL");
2499
2500 module_param(mem, int, 0);
2501 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2502 module_param(disabled, int, 0);
2503 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2504 module_param(noaccel, int, 0);
2505 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2506 module_param(nopan, int, 0);
2507 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2508 module_param(no_pci_retry, int, 0);
2509 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2510 module_param(novga, int, 0);
2511 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2512 module_param(nobios, int, 0);
2513 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2514 module_param(noinit, int, 0);
2515 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2516 module_param(memtype, int, 0);
2517 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2518 #ifdef CONFIG_MTRR
2519 module_param(mtrr, int, 0);
2520 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2521 #endif
2522 module_param(sgram, int, 0);
2523 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2524 module_param(inv24, int, 0);
2525 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2526 module_param(inverse, int, 0);
2527 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2528 module_param(dev, int, 0);
2529 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2530 module_param(vesa, int, 0);
2531 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2532 module_param(xres, int, 0);
2533 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2534 module_param(yres, int, 0);
2535 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2536 module_param(upper, int, 0);
2537 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2538 module_param(lower, int, 0);
2539 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2540 module_param(vslen, int, 0);
2541 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2542 module_param(left, int, 0);
2543 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2544 module_param(right, int, 0);
2545 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2546 module_param(hslen, int, 0);
2547 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2548 module_param(pixclock, int, 0);
2549 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2550 module_param(sync, int, 0);
2551 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2552 module_param(depth, int, 0);
2553 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2554 module_param(maxclk, int, 0);
2555 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2556 module_param(fh, int, 0);
2557 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2558 module_param(fv, int, 0);
2559 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2560 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2561 module_param(grayscale, int, 0);
2562 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2563 module_param(cross4MB, int, 0);
2564 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2565 module_param(dfp, int, 0);
2566 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2567 module_param(dfp_type, int, 0);
2568 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2569 module_param_string(outputs, outputs, sizeof(outputs), 0);
2570 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2571 #ifdef CONFIG_PPC_PMAC
2572 module_param_named(vmode, default_vmode, int, 0);
2573 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2574 module_param_named(cmode, default_cmode, int, 0);
2575 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2576 #endif
2577
2578 int __init init_module(void){
2579
2580 DBG(__func__)
2581
2582 if (disabled)
2583 return -ENXIO;
2584
2585 if (depth == 0)
2586 depth = RSText;
2587 else if (depth == 4)
2588 depth = RS4bpp;
2589 else if (depth == 8)
2590 depth = RS8bpp;
2591 else if (depth == 15)
2592 depth = RS15bpp;
2593 else if (depth == 16)
2594 depth = RS16bpp;
2595 else if (depth == 24)
2596 depth = RS24bpp;
2597 else if (depth == 32)
2598 depth = RS32bpp;
2599 else if (depth != -1) {
2600 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2601 depth = -1;
2602 }
2603 matrox_init();
2604 /* never return failure; user can hotplug matrox later... */
2605 return 0;
2606 }
2607 #endif /* MODULE */
2608
2609 module_exit(matrox_done);
2610 EXPORT_SYMBOL(matroxfb_register_driver);
2611 EXPORT_SYMBOL(matroxfb_unregister_driver);
2612 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2613 EXPORT_SYMBOL(matroxfb_enable_irq);
2614
2615 /*
2616 * Overrides for Emacs so that we follow Linus's tabbing style.
2617 * ---------------------------------------------------------------------------
2618 * Local variables:
2619 * c-basic-offset: 8
2620 * End:
2621 */
2622
Linux with added FPC-III support