bna: remove oper_state_cbfn from struct bna_rxf
[linux/fpc-iii.git] / drivers / ata / ahci_mvebu.c
blob5928d0746a270e7b6b2ee12a022b19ed731f03fe
1 /*
2 * AHCI glue platform driver for Marvell EBU SOCs
4 * Copyright (C) 2014 Marvell
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 * Marcin Wojtas <mw@semihalf.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/ahci_platform.h>
15 #include <linux/kernel.h>
16 #include <linux/mbus.h>
17 #include <linux/module.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include "ahci.h"
22 #define DRV_NAME "ahci-mvebu"
24 #define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0
25 #define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4
27 #define AHCI_WINDOW_CTRL(win) (0x60 + ((win) << 4))
28 #define AHCI_WINDOW_BASE(win) (0x64 + ((win) << 4))
29 #define AHCI_WINDOW_SIZE(win) (0x68 + ((win) << 4))
31 static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
32 const struct mbus_dram_target_info *dram)
34 int i;
36 for (i = 0; i < 4; i++) {
37 writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
38 writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
39 writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
42 for (i = 0; i < dram->num_cs; i++) {
43 const struct mbus_dram_window *cs = dram->cs + i;
45 writel((cs->mbus_attr << 8) |
46 (dram->mbus_dram_target_id << 4) | 1,
47 hpriv->mmio + AHCI_WINDOW_CTRL(i));
48 writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
49 writel(((cs->size - 1) & 0xffff0000),
50 hpriv->mmio + AHCI_WINDOW_SIZE(i));
54 static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
57 * Enable the regret bit to allow the SATA unit to regret a
58 * request that didn't receive an acknowlegde and avoid a
59 * deadlock
61 writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
62 writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
65 static const struct ata_port_info ahci_mvebu_port_info = {
66 .flags = AHCI_FLAG_COMMON,
67 .pio_mask = ATA_PIO4,
68 .udma_mask = ATA_UDMA6,
69 .port_ops = &ahci_platform_ops,
72 static struct scsi_host_template ahci_platform_sht = {
73 AHCI_SHT(DRV_NAME),
76 static int ahci_mvebu_probe(struct platform_device *pdev)
78 struct ahci_host_priv *hpriv;
79 const struct mbus_dram_target_info *dram;
80 int rc;
82 hpriv = ahci_platform_get_resources(pdev);
83 if (IS_ERR(hpriv))
84 return PTR_ERR(hpriv);
86 rc = ahci_platform_enable_resources(hpriv);
87 if (rc)
88 return rc;
90 dram = mv_mbus_dram_info();
91 if (!dram)
92 return -ENODEV;
94 ahci_mvebu_mbus_config(hpriv, dram);
95 ahci_mvebu_regret_option(hpriv);
97 rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
98 &ahci_platform_sht);
99 if (rc)
100 goto disable_resources;
102 return 0;
104 disable_resources:
105 ahci_platform_disable_resources(hpriv);
106 return rc;
109 static const struct of_device_id ahci_mvebu_of_match[] = {
110 { .compatible = "marvell,armada-380-ahci", },
111 { },
113 MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
116 * We currently don't provide power management related operations,
117 * since there is no suspend/resume support at the platform level for
118 * Armada 38x for the moment.
120 static struct platform_driver ahci_mvebu_driver = {
121 .probe = ahci_mvebu_probe,
122 .remove = ata_platform_remove_one,
123 .driver = {
124 .name = DRV_NAME,
125 .of_match_table = ahci_mvebu_of_match,
128 module_platform_driver(ahci_mvebu_driver);
130 MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
131 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
132 MODULE_LICENSE("GPL");
133 MODULE_ALIAS("platform:ahci_mvebu");