bna: remove oper_state_cbfn from struct bna_rxf
[linux/fpc-iii.git] / drivers / usb / musb / musb_dsps.c
blob65d931a28a14c7e5c66860af7b4e54e12adbb6b5
1 /*
2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/io.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
42 #include <linux/of.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
48 #include <linux/debugfs.h>
50 #include "musb_core.h"
52 static const struct of_device_id musb_dsps_of_match[];
54 /**
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
60 return __raw_readb(addr + offset);
63 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
65 return __raw_readl(addr + offset);
68 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
70 __raw_writeb(data, addr + offset);
73 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
75 __raw_writel(data, addr + offset);
78 /**
79 * DSPS musb wrapper register offset.
80 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
81 * musb ips.
83 struct dsps_musb_wrapper {
84 u16 revision;
85 u16 control;
86 u16 status;
87 u16 epintr_set;
88 u16 epintr_clear;
89 u16 epintr_status;
90 u16 coreintr_set;
91 u16 coreintr_clear;
92 u16 coreintr_status;
93 u16 phy_utmi;
94 u16 mode;
95 u16 tx_mode;
96 u16 rx_mode;
98 /* bit positions for control */
99 unsigned reset:5;
101 /* bit positions for interrupt */
102 unsigned usb_shift:5;
103 u32 usb_mask;
104 u32 usb_bitmap;
105 unsigned drvvbus:5;
107 unsigned txep_shift:5;
108 u32 txep_mask;
109 u32 txep_bitmap;
111 unsigned rxep_shift:5;
112 u32 rxep_mask;
113 u32 rxep_bitmap;
115 /* bit positions for phy_utmi */
116 unsigned otg_disable:5;
118 /* bit positions for mode */
119 unsigned iddig:5;
120 unsigned iddig_mux:5;
121 /* miscellaneous stuff */
122 unsigned poll_timeout;
126 * register shadow for suspend
128 struct dsps_context {
129 u32 control;
130 u32 epintr;
131 u32 coreintr;
132 u32 phy_utmi;
133 u32 mode;
134 u32 tx_mode;
135 u32 rx_mode;
139 * DSPS glue structure.
141 struct dsps_glue {
142 struct device *dev;
143 struct platform_device *musb; /* child musb pdev */
144 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
145 struct timer_list timer; /* otg_workaround timer */
146 unsigned long last_timer; /* last timer data for each instance */
147 bool sw_babble_enabled;
149 struct dsps_context context;
150 struct debugfs_regset32 regset;
151 struct dentry *dbgfs_root;
154 static const struct debugfs_reg32 dsps_musb_regs[] = {
155 { "revision", 0x00 },
156 { "control", 0x14 },
157 { "status", 0x18 },
158 { "eoi", 0x24 },
159 { "intr0_stat", 0x30 },
160 { "intr1_stat", 0x34 },
161 { "intr0_set", 0x38 },
162 { "intr1_set", 0x3c },
163 { "txmode", 0x70 },
164 { "rxmode", 0x74 },
165 { "autoreq", 0xd0 },
166 { "srpfixtime", 0xd4 },
167 { "tdown", 0xd8 },
168 { "phy_utmi", 0xe0 },
169 { "mode", 0xe8 },
172 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
174 struct device *dev = musb->controller;
175 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
177 if (timeout == 0)
178 timeout = jiffies + msecs_to_jiffies(3);
180 /* Never idle if active, or when VBUS timeout is not set as host */
181 if (musb->is_active || (musb->a_wait_bcon == 0 &&
182 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
183 dev_dbg(musb->controller, "%s active, deleting timer\n",
184 usb_otg_state_string(musb->xceiv->otg->state));
185 del_timer(&glue->timer);
186 glue->last_timer = jiffies;
187 return;
189 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
190 return;
192 if (!musb->g.dev.driver)
193 return;
195 if (time_after(glue->last_timer, timeout) &&
196 timer_pending(&glue->timer)) {
197 dev_dbg(musb->controller,
198 "Longer idle timer already pending, ignoring...\n");
199 return;
201 glue->last_timer = timeout;
203 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
204 usb_otg_state_string(musb->xceiv->otg->state),
205 jiffies_to_msecs(timeout - jiffies));
206 mod_timer(&glue->timer, timeout);
210 * dsps_musb_enable - enable interrupts
212 static void dsps_musb_enable(struct musb *musb)
214 struct device *dev = musb->controller;
215 struct platform_device *pdev = to_platform_device(dev->parent);
216 struct dsps_glue *glue = platform_get_drvdata(pdev);
217 const struct dsps_musb_wrapper *wrp = glue->wrp;
218 void __iomem *reg_base = musb->ctrl_base;
219 u32 epmask, coremask;
221 /* Workaround: setup IRQs through both register sets. */
222 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
223 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
224 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
226 dsps_writel(reg_base, wrp->epintr_set, epmask);
227 dsps_writel(reg_base, wrp->coreintr_set, coremask);
228 /* start polling for ID change. */
229 mod_timer(&glue->timer, jiffies + msecs_to_jiffies(wrp->poll_timeout));
230 dsps_musb_try_idle(musb, 0);
234 * dsps_musb_disable - disable HDRC and flush interrupts
236 static void dsps_musb_disable(struct musb *musb)
238 struct device *dev = musb->controller;
239 struct platform_device *pdev = to_platform_device(dev->parent);
240 struct dsps_glue *glue = platform_get_drvdata(pdev);
241 const struct dsps_musb_wrapper *wrp = glue->wrp;
242 void __iomem *reg_base = musb->ctrl_base;
244 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
245 dsps_writel(reg_base, wrp->epintr_clear,
246 wrp->txep_bitmap | wrp->rxep_bitmap);
247 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
250 static void otg_timer(unsigned long _musb)
252 struct musb *musb = (void *)_musb;
253 void __iomem *mregs = musb->mregs;
254 struct device *dev = musb->controller;
255 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
256 const struct dsps_musb_wrapper *wrp = glue->wrp;
257 u8 devctl;
258 unsigned long flags;
259 int skip_session = 0;
262 * We poll because DSPS IP's won't expose several OTG-critical
263 * status change events (from the transceiver) otherwise.
265 devctl = dsps_readb(mregs, MUSB_DEVCTL);
266 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
267 usb_otg_state_string(musb->xceiv->otg->state));
269 spin_lock_irqsave(&musb->lock, flags);
270 switch (musb->xceiv->otg->state) {
271 case OTG_STATE_A_WAIT_BCON:
272 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
273 skip_session = 1;
274 /* fall */
276 case OTG_STATE_A_IDLE:
277 case OTG_STATE_B_IDLE:
278 if (devctl & MUSB_DEVCTL_BDEVICE) {
279 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
280 MUSB_DEV_MODE(musb);
281 } else {
282 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
283 MUSB_HST_MODE(musb);
285 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
286 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
287 mod_timer(&glue->timer, jiffies +
288 msecs_to_jiffies(wrp->poll_timeout));
289 break;
290 case OTG_STATE_A_WAIT_VFALL:
291 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
292 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
293 MUSB_INTR_VBUSERROR << wrp->usb_shift);
294 break;
295 default:
296 break;
298 spin_unlock_irqrestore(&musb->lock, flags);
301 static irqreturn_t dsps_interrupt(int irq, void *hci)
303 struct musb *musb = hci;
304 void __iomem *reg_base = musb->ctrl_base;
305 struct device *dev = musb->controller;
306 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
307 const struct dsps_musb_wrapper *wrp = glue->wrp;
308 unsigned long flags;
309 irqreturn_t ret = IRQ_NONE;
310 u32 epintr, usbintr;
312 spin_lock_irqsave(&musb->lock, flags);
314 /* Get endpoint interrupts */
315 epintr = dsps_readl(reg_base, wrp->epintr_status);
316 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
317 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
319 if (epintr)
320 dsps_writel(reg_base, wrp->epintr_status, epintr);
322 /* Get usb core interrupts */
323 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
324 if (!usbintr && !epintr)
325 goto out;
327 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
328 if (usbintr)
329 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
331 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
332 usbintr, epintr);
334 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
335 int drvvbus = dsps_readl(reg_base, wrp->status);
336 void __iomem *mregs = musb->mregs;
337 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
338 int err;
340 err = musb->int_usb & MUSB_INTR_VBUSERROR;
341 if (err) {
343 * The Mentor core doesn't debounce VBUS as needed
344 * to cope with device connect current spikes. This
345 * means it's not uncommon for bus-powered devices
346 * to get VBUS errors during enumeration.
348 * This is a workaround, but newer RTL from Mentor
349 * seems to allow a better one: "re"-starting sessions
350 * without waiting for VBUS to stop registering in
351 * devctl.
353 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
354 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
355 mod_timer(&glue->timer, jiffies +
356 msecs_to_jiffies(wrp->poll_timeout));
357 WARNING("VBUS error workaround (delay coming)\n");
358 } else if (drvvbus) {
359 MUSB_HST_MODE(musb);
360 musb->xceiv->otg->default_a = 1;
361 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
362 del_timer(&glue->timer);
363 } else {
364 musb->is_active = 0;
365 MUSB_DEV_MODE(musb);
366 musb->xceiv->otg->default_a = 0;
367 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
370 /* NOTE: this must complete power-on within 100 ms. */
371 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
372 drvvbus ? "on" : "off",
373 usb_otg_state_string(musb->xceiv->otg->state),
374 err ? " ERROR" : "",
375 devctl);
376 ret = IRQ_HANDLED;
379 if (musb->int_tx || musb->int_rx || musb->int_usb)
380 ret |= musb_interrupt(musb);
382 /* Poll for ID change in OTG port mode */
383 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
384 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
385 mod_timer(&glue->timer, jiffies +
386 msecs_to_jiffies(wrp->poll_timeout));
387 out:
388 spin_unlock_irqrestore(&musb->lock, flags);
390 return ret;
393 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
395 struct dentry *root;
396 struct dentry *file;
397 char buf[128];
399 sprintf(buf, "%s.dsps", dev_name(musb->controller));
400 root = debugfs_create_dir(buf, NULL);
401 if (!root)
402 return -ENOMEM;
403 glue->dbgfs_root = root;
405 glue->regset.regs = dsps_musb_regs;
406 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
407 glue->regset.base = musb->ctrl_base;
409 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
410 if (!file) {
411 debugfs_remove_recursive(root);
412 return -ENOMEM;
414 return 0;
417 static int dsps_musb_init(struct musb *musb)
419 struct device *dev = musb->controller;
420 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
421 struct platform_device *parent = to_platform_device(dev->parent);
422 const struct dsps_musb_wrapper *wrp = glue->wrp;
423 void __iomem *reg_base;
424 struct resource *r;
425 u32 rev, val;
426 int ret;
428 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
429 reg_base = devm_ioremap_resource(dev, r);
430 if (IS_ERR(reg_base))
431 return PTR_ERR(reg_base);
432 musb->ctrl_base = reg_base;
434 /* NOP driver needs change if supporting dual instance */
435 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
436 if (IS_ERR(musb->xceiv))
437 return PTR_ERR(musb->xceiv);
439 musb->phy = devm_phy_get(dev->parent, "usb2-phy");
441 /* Returns zero if e.g. not clocked */
442 rev = dsps_readl(reg_base, wrp->revision);
443 if (!rev)
444 return -ENODEV;
446 usb_phy_init(musb->xceiv);
447 if (IS_ERR(musb->phy)) {
448 musb->phy = NULL;
449 } else {
450 ret = phy_init(musb->phy);
451 if (ret < 0)
452 return ret;
453 ret = phy_power_on(musb->phy);
454 if (ret) {
455 phy_exit(musb->phy);
456 return ret;
460 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
462 /* Reset the musb */
463 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
465 musb->isr = dsps_interrupt;
467 /* reset the otgdisable bit, needed for host mode to work */
468 val = dsps_readl(reg_base, wrp->phy_utmi);
469 val &= ~(1 << wrp->otg_disable);
470 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
473 * Check whether the dsps version has babble control enabled.
474 * In latest silicon revision the babble control logic is enabled.
475 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
476 * logic enabled.
478 val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
479 if (val & MUSB_BABBLE_RCV_DISABLE) {
480 glue->sw_babble_enabled = true;
481 val |= MUSB_BABBLE_SW_SESSION_CTRL;
482 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
485 ret = dsps_musb_dbg_init(musb, glue);
486 if (ret)
487 return ret;
489 return 0;
492 static int dsps_musb_exit(struct musb *musb)
494 struct device *dev = musb->controller;
495 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
497 del_timer_sync(&glue->timer);
498 usb_phy_shutdown(musb->xceiv);
499 phy_power_off(musb->phy);
500 phy_exit(musb->phy);
501 debugfs_remove_recursive(glue->dbgfs_root);
503 return 0;
506 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
508 struct device *dev = musb->controller;
509 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
510 const struct dsps_musb_wrapper *wrp = glue->wrp;
511 void __iomem *ctrl_base = musb->ctrl_base;
512 u32 reg;
514 reg = dsps_readl(ctrl_base, wrp->mode);
516 switch (mode) {
517 case MUSB_HOST:
518 reg &= ~(1 << wrp->iddig);
521 * if we're setting mode to host-only or device-only, we're
522 * going to ignore whatever the PHY sends us and just force
523 * ID pin status by SW
525 reg |= (1 << wrp->iddig_mux);
527 dsps_writel(ctrl_base, wrp->mode, reg);
528 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
529 break;
530 case MUSB_PERIPHERAL:
531 reg |= (1 << wrp->iddig);
534 * if we're setting mode to host-only or device-only, we're
535 * going to ignore whatever the PHY sends us and just force
536 * ID pin status by SW
538 reg |= (1 << wrp->iddig_mux);
540 dsps_writel(ctrl_base, wrp->mode, reg);
541 break;
542 case MUSB_OTG:
543 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
544 break;
545 default:
546 dev_err(glue->dev, "unsupported mode %d\n", mode);
547 return -EINVAL;
550 return 0;
553 static bool dsps_sw_babble_control(struct musb *musb)
555 u8 babble_ctl;
556 bool session_restart = false;
558 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
559 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
560 babble_ctl);
562 * check line monitor flag to check whether babble is
563 * due to noise
565 dev_dbg(musb->controller, "STUCK_J is %s\n",
566 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
568 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
569 int timeout = 10;
572 * babble is due to noise, then set transmit idle (d7 bit)
573 * to resume normal operation
575 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
576 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
577 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
579 /* wait till line monitor flag cleared */
580 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
581 do {
582 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
583 udelay(1);
584 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
586 /* check whether stuck_at_j bit cleared */
587 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
589 * real babble condition has occurred
590 * restart the controller to start the
591 * session again
593 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
594 babble_ctl);
595 session_restart = true;
597 } else {
598 session_restart = true;
601 return session_restart;
604 static int dsps_musb_recover(struct musb *musb)
606 struct device *dev = musb->controller;
607 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
608 int session_restart = 0;
610 if (glue->sw_babble_enabled)
611 session_restart = dsps_sw_babble_control(musb);
612 else
613 session_restart = 1;
615 return session_restart ? 0 : -EPIPE;
618 /* Similar to am35x, dm81xx support only 32-bit read operation */
619 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
621 void __iomem *fifo = hw_ep->fifo;
623 if (len >= 4) {
624 ioread32_rep(fifo, dst, len >> 2);
625 dst += len & ~0x03;
626 len &= 0x03;
629 /* Read any remaining 1 to 3 bytes */
630 if (len > 0) {
631 u32 val = musb_readl(fifo, 0);
632 memcpy(dst, &val, len);
636 static struct musb_platform_ops dsps_ops = {
637 .quirks = MUSB_INDEXED_EP,
638 .init = dsps_musb_init,
639 .exit = dsps_musb_exit,
641 .enable = dsps_musb_enable,
642 .disable = dsps_musb_disable,
644 .try_idle = dsps_musb_try_idle,
645 .set_mode = dsps_musb_set_mode,
646 .recover = dsps_musb_recover,
649 static u64 musb_dmamask = DMA_BIT_MASK(32);
651 static int get_int_prop(struct device_node *dn, const char *s)
653 int ret;
654 u32 val;
656 ret = of_property_read_u32(dn, s, &val);
657 if (ret)
658 return 0;
659 return val;
662 static int get_musb_port_mode(struct device *dev)
664 enum usb_dr_mode mode;
666 mode = of_usb_get_dr_mode(dev->of_node);
667 switch (mode) {
668 case USB_DR_MODE_HOST:
669 return MUSB_PORT_MODE_HOST;
671 case USB_DR_MODE_PERIPHERAL:
672 return MUSB_PORT_MODE_GADGET;
674 case USB_DR_MODE_UNKNOWN:
675 case USB_DR_MODE_OTG:
676 default:
677 return MUSB_PORT_MODE_DUAL_ROLE;
681 static int dsps_create_musb_pdev(struct dsps_glue *glue,
682 struct platform_device *parent)
684 struct musb_hdrc_platform_data pdata;
685 struct resource resources[2];
686 struct resource *res;
687 struct device *dev = &parent->dev;
688 struct musb_hdrc_config *config;
689 struct platform_device *musb;
690 struct device_node *dn = parent->dev.of_node;
691 int ret, val;
693 memset(resources, 0, sizeof(resources));
694 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
695 if (!res) {
696 dev_err(dev, "failed to get memory.\n");
697 return -EINVAL;
699 resources[0] = *res;
701 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
702 if (!res) {
703 dev_err(dev, "failed to get irq.\n");
704 return -EINVAL;
706 resources[1] = *res;
708 /* allocate the child platform device */
709 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
710 if (!musb) {
711 dev_err(dev, "failed to allocate musb device\n");
712 return -ENOMEM;
715 musb->dev.parent = dev;
716 musb->dev.dma_mask = &musb_dmamask;
717 musb->dev.coherent_dma_mask = musb_dmamask;
719 glue->musb = musb;
721 ret = platform_device_add_resources(musb, resources,
722 ARRAY_SIZE(resources));
723 if (ret) {
724 dev_err(dev, "failed to add resources\n");
725 goto err;
728 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
729 if (!config) {
730 ret = -ENOMEM;
731 goto err;
733 pdata.config = config;
734 pdata.platform_ops = &dsps_ops;
736 config->num_eps = get_int_prop(dn, "mentor,num-eps");
737 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
738 config->host_port_deassert_reset_at_resume = 1;
739 pdata.mode = get_musb_port_mode(dev);
740 /* DT keeps this entry in mA, musb expects it as per USB spec */
741 pdata.power = get_int_prop(dn, "mentor,power") / 2;
743 ret = of_property_read_u32(dn, "mentor,multipoint", &val);
744 if (!ret && val)
745 config->multipoint = true;
747 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
748 if (ret) {
749 dev_err(dev, "failed to add platform_data\n");
750 goto err;
753 ret = platform_device_add(musb);
754 if (ret) {
755 dev_err(dev, "failed to register musb device\n");
756 goto err;
758 return 0;
760 err:
761 platform_device_put(musb);
762 return ret;
765 static int dsps_probe(struct platform_device *pdev)
767 const struct of_device_id *match;
768 const struct dsps_musb_wrapper *wrp;
769 struct dsps_glue *glue;
770 int ret;
772 if (!strcmp(pdev->name, "musb-hdrc"))
773 return -ENODEV;
775 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
776 if (!match) {
777 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
778 return -EINVAL;
780 wrp = match->data;
782 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
783 dsps_ops.read_fifo = dsps_read_fifo32;
785 /* allocate glue */
786 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
787 if (!glue)
788 return -ENOMEM;
790 glue->dev = &pdev->dev;
791 glue->wrp = wrp;
793 platform_set_drvdata(pdev, glue);
794 pm_runtime_enable(&pdev->dev);
796 ret = pm_runtime_get_sync(&pdev->dev);
797 if (ret < 0) {
798 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
799 goto err2;
802 ret = dsps_create_musb_pdev(glue, pdev);
803 if (ret)
804 goto err3;
806 return 0;
808 err3:
809 pm_runtime_put(&pdev->dev);
810 err2:
811 pm_runtime_disable(&pdev->dev);
812 return ret;
815 static int dsps_remove(struct platform_device *pdev)
817 struct dsps_glue *glue = platform_get_drvdata(pdev);
819 platform_device_unregister(glue->musb);
821 /* disable usbss clocks */
822 pm_runtime_put(&pdev->dev);
823 pm_runtime_disable(&pdev->dev);
825 return 0;
828 static const struct dsps_musb_wrapper am33xx_driver_data = {
829 .revision = 0x00,
830 .control = 0x14,
831 .status = 0x18,
832 .epintr_set = 0x38,
833 .epintr_clear = 0x40,
834 .epintr_status = 0x30,
835 .coreintr_set = 0x3c,
836 .coreintr_clear = 0x44,
837 .coreintr_status = 0x34,
838 .phy_utmi = 0xe0,
839 .mode = 0xe8,
840 .tx_mode = 0x70,
841 .rx_mode = 0x74,
842 .reset = 0,
843 .otg_disable = 21,
844 .iddig = 8,
845 .iddig_mux = 7,
846 .usb_shift = 0,
847 .usb_mask = 0x1ff,
848 .usb_bitmap = (0x1ff << 0),
849 .drvvbus = 8,
850 .txep_shift = 0,
851 .txep_mask = 0xffff,
852 .txep_bitmap = (0xffff << 0),
853 .rxep_shift = 16,
854 .rxep_mask = 0xfffe,
855 .rxep_bitmap = (0xfffe << 16),
856 .poll_timeout = 2000, /* ms */
859 static const struct of_device_id musb_dsps_of_match[] = {
860 { .compatible = "ti,musb-am33xx",
861 .data = &am33xx_driver_data, },
862 { .compatible = "ti,musb-dm816",
863 .data = &am33xx_driver_data, },
864 { },
866 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
868 #ifdef CONFIG_PM_SLEEP
869 static int dsps_suspend(struct device *dev)
871 struct dsps_glue *glue = dev_get_drvdata(dev);
872 const struct dsps_musb_wrapper *wrp = glue->wrp;
873 struct musb *musb = platform_get_drvdata(glue->musb);
874 void __iomem *mbase;
876 del_timer_sync(&glue->timer);
878 if (!musb)
879 /* This can happen if the musb device is in -EPROBE_DEFER */
880 return 0;
882 mbase = musb->ctrl_base;
883 glue->context.control = dsps_readl(mbase, wrp->control);
884 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
885 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
886 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
887 glue->context.mode = dsps_readl(mbase, wrp->mode);
888 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
889 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
891 return 0;
894 static int dsps_resume(struct device *dev)
896 struct dsps_glue *glue = dev_get_drvdata(dev);
897 const struct dsps_musb_wrapper *wrp = glue->wrp;
898 struct musb *musb = platform_get_drvdata(glue->musb);
899 void __iomem *mbase;
901 if (!musb)
902 return 0;
904 mbase = musb->ctrl_base;
905 dsps_writel(mbase, wrp->control, glue->context.control);
906 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
907 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
908 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
909 dsps_writel(mbase, wrp->mode, glue->context.mode);
910 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
911 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
912 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
913 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
914 mod_timer(&glue->timer, jiffies +
915 msecs_to_jiffies(wrp->poll_timeout));
917 return 0;
919 #endif
921 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
923 static struct platform_driver dsps_usbss_driver = {
924 .probe = dsps_probe,
925 .remove = dsps_remove,
926 .driver = {
927 .name = "musb-dsps",
928 .pm = &dsps_pm_ops,
929 .of_match_table = musb_dsps_of_match,
933 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
934 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
935 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
936 MODULE_LICENSE("GPL v2");
938 module_platform_driver(dsps_usbss_driver);