1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh4/clock-sh4.c
5 * Generic SH-4 support for the clock framework
7 * Copyright (C) 2005 Paul Mundt
9 * FRQCR parsing hacked out of arch/sh/kernel/time.c
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
12 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
13 * Copyright (C) 2002, 2003, 2004 Paul Mundt
14 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
16 #include <linux/init.h>
17 #include <linux/kernel.h>
18 #include <asm/clock.h>
22 static int ifc_divisors
[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
23 #define bfc_divisors ifc_divisors /* Same */
24 static int pfc_divisors
[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
26 static void master_clk_init(struct clk
*clk
)
28 clk
->rate
*= pfc_divisors
[__raw_readw(FRQCR
) & 0x0007];
31 static struct sh_clk_ops sh4_master_clk_ops
= {
32 .init
= master_clk_init
,
35 static unsigned long module_clk_recalc(struct clk
*clk
)
37 int idx
= (__raw_readw(FRQCR
) & 0x0007);
38 return clk
->parent
->rate
/ pfc_divisors
[idx
];
41 static struct sh_clk_ops sh4_module_clk_ops
= {
42 .recalc
= module_clk_recalc
,
45 static unsigned long bus_clk_recalc(struct clk
*clk
)
47 int idx
= (__raw_readw(FRQCR
) >> 3) & 0x0007;
48 return clk
->parent
->rate
/ bfc_divisors
[idx
];
51 static struct sh_clk_ops sh4_bus_clk_ops
= {
52 .recalc
= bus_clk_recalc
,
55 static unsigned long cpu_clk_recalc(struct clk
*clk
)
57 int idx
= (__raw_readw(FRQCR
) >> 6) & 0x0007;
58 return clk
->parent
->rate
/ ifc_divisors
[idx
];
61 static struct sh_clk_ops sh4_cpu_clk_ops
= {
62 .recalc
= cpu_clk_recalc
,
65 static struct sh_clk_ops
*sh4_clk_ops
[] = {
72 void __init
arch_init_clk_ops(struct sh_clk_ops
**ops
, int idx
)
74 if (idx
< ARRAY_SIZE(sh4_clk_ops
))
75 *ops
= sh4_clk_ops
[idx
];