arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <linux/nospec.h>
  40 #include <asm/processor.h>
  41 #include <asm/page.h>
  42 #include <asm/current.h>
  43 #include <trace/events/kvm.h>
  44
  45 #include "ioapic.h"
  46 #include "lapic.h"
  47 #include "irq.h"
  48
  49 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  50                 bool line_status);
  51
  52 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  53                                           unsigned long addr,
  54                                           unsigned long length)
  55 {
  56         unsigned long result = 0;
  57
  58         switch (ioapic->ioregsel) {
  59         case IOAPIC_REG_VERSION:
  60                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  61                           | (IOAPIC_VERSION_ID & 0xff));
  62                 break;
  63
  64         case IOAPIC_REG_APIC_ID:
  65         case IOAPIC_REG_ARB_ID:
  66                 result = ((ioapic->id & 0xf) << 24);
  67                 break;
  68
  69         default:
  70                 {
  71                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  72                         u64 redir_content = ~0ULL;
  73
  74                         if (redir_index < IOAPIC_NUM_PINS) {
  75                                 u32 index = array_index_nospec(
  76                                         redir_index, IOAPIC_NUM_PINS);
  77
  78                                 redir_content = ioapic->redirtbl[index].bits;
  79                         }
  80
  81                         result = (ioapic->ioregsel & 0x1) ?
  82                             (redir_content >> 32) & 0xffffffff :
  83                             redir_content & 0xffffffff;
  84                         break;
  85                 }
  86         }
  87
  88         return result;
  89 }
  90
  91 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  92 {
  93         ioapic->rtc_status.pending_eoi = 0;
  94         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
  95 }
  96
  97 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
  98
  99 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 100 {
 101         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 102                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 103 }
 104
 105 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 106 {
 107         bool new_val, old_val;
 108         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 109         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 110         union kvm_ioapic_redirect_entry *e;
 111
 112         e = &ioapic->redirtbl[RTC_GSI];
 113         if (!kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 114                                  e->fields.dest_id,
 115                                  kvm_lapic_irq_dest_mode(!!e->fields.dest_mode)))
 116                 return;
 117
 118         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 119         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
 120
 121         if (new_val == old_val)
 122                 return;
 123
 124         if (new_val) {
 125                 __set_bit(vcpu->vcpu_id, dest_map->map);
 126                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
 127                 ioapic->rtc_status.pending_eoi++;
 128         } else {
 129                 __clear_bit(vcpu->vcpu_id, dest_map->map);
 130                 ioapic->rtc_status.pending_eoi--;
 131                 rtc_status_pending_eoi_check_valid(ioapic);
 132         }
 133 }
 134
 135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 136 {
 137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 138
 139         spin_lock(&ioapic->lock);
 140         __rtc_irq_eoi_tracking_restore_one(vcpu);
 141         spin_unlock(&ioapic->lock);
 142 }
 143
 144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 145 {
 146         struct kvm_vcpu *vcpu;
 147         int i;
 148
 149         if (RTC_GSI >= IOAPIC_NUM_PINS)
 150                 return;
 151
 152         rtc_irq_eoi_tracking_reset(ioapic);
 153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 154             __rtc_irq_eoi_tracking_restore_one(vcpu);
 155 }
 156
 157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 158 {
 159         if (test_and_clear_bit(vcpu->vcpu_id,
 160                                ioapic->rtc_status.dest_map.map)) {
 161                 --ioapic->rtc_status.pending_eoi;
 162                 rtc_status_pending_eoi_check_valid(ioapic);
 163         }
 164 }
 165
 166 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 167 {
 168         if (ioapic->rtc_status.pending_eoi > 0)
 169                 return true; /* coalesced */
 170
 171         return false;
 172 }
 173
 174 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 175                 int irq_level, bool line_status)
 176 {
 177         union kvm_ioapic_redirect_entry entry;
 178         u32 mask = 1 << irq;
 179         u32 old_irr;
 180         int edge, ret;
 181
 182         entry = ioapic->redirtbl[irq];
 183         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 184
 185         if (!irq_level) {
 186                 ioapic->irr &= ~mask;
 187                 ret = 1;
 188                 goto out;
 189         }
 190
 191         /*
 192          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 193          * this only happens if a previous edge has not been delivered due
 194          * to masking.  For level interrupts, the remote_irr field tells
 195          * us if the interrupt is waiting for an EOI.
 196          *
 197          * RTC is special: it is edge-triggered, but userspace likes to know
 198          * if it has been already ack-ed via EOI because coalesced RTC
 199          * interrupts lead to time drift in Windows guests.  So we track
 200          * EOI manually for the RTC interrupt.
 201          */
 202         if (irq == RTC_GSI && line_status &&
 203                 rtc_irq_check_coalesced(ioapic)) {
 204                 ret = 0;
 205                 goto out;
 206         }
 207
 208         old_irr = ioapic->irr;
 209         ioapic->irr |= mask;
 210         if (edge) {
 211                 ioapic->irr_delivered &= ~mask;
 212                 if (old_irr == ioapic->irr) {
 213                         ret = 0;
 214                         goto out;
 215                 }
 216         }
 217
 218         ret = ioapic_service(ioapic, irq, line_status);
 219
 220 out:
 221         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 222         return ret;
 223 }
 224
 225 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 226 {
 227         u32 idx;
 228
 229         rtc_irq_eoi_tracking_reset(ioapic);
 230         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 231                 ioapic_set_irq(ioapic, idx, 1, true);
 232
 233         kvm_rtc_eoi_tracking_restore_all(ioapic);
 234 }
 235
 236
 237 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 238 {
 239         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 240         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 241         union kvm_ioapic_redirect_entry *e;
 242         int index;
 243
 244         spin_lock(&ioapic->lock);
 245
 246         /* Make sure we see any missing RTC EOI */
 247         if (test_bit(vcpu->vcpu_id, dest_map->map))
 248                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
 249                           ioapic_handled_vectors);
 250
 251         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 252                 e = &ioapic->redirtbl[index];
 253                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 254                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 255                     index == RTC_GSI) {
 256                         u16 dm = kvm_lapic_irq_dest_mode(!!e->fields.dest_mode);
 257
 258                         if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 259                                                 e->fields.dest_id, dm) ||
 260                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
 261                                 __set_bit(e->fields.vector,
 262                                           ioapic_handled_vectors);
 263                 }
 264         }
 265         spin_unlock(&ioapic->lock);
 266 }
 267
 268 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
 269 {
 270         if (!ioapic_in_kernel(kvm))
 271                 return;
 272         kvm_make_scan_ioapic_request(kvm);
 273 }
 274
 275 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 276 {
 277         unsigned index;
 278         bool mask_before, mask_after;
 279         union kvm_ioapic_redirect_entry *e;
 280         unsigned long vcpu_bitmap;
 281         int old_remote_irr, old_delivery_status, old_dest_id, old_dest_mode;
 282
 283         switch (ioapic->ioregsel) {
 284         case IOAPIC_REG_VERSION:
 285                 /* Writes are ignored. */
 286                 break;
 287
 288         case IOAPIC_REG_APIC_ID:
 289                 ioapic->id = (val >> 24) & 0xf;
 290                 break;
 291
 292         case IOAPIC_REG_ARB_ID:
 293                 break;
 294
 295         default:
 296                 index = (ioapic->ioregsel - 0x10) >> 1;
 297
 298                 if (index >= IOAPIC_NUM_PINS)
 299                         return;
 300                 index = array_index_nospec(index, IOAPIC_NUM_PINS);
 301                 e = &ioapic->redirtbl[index];
 302                 mask_before = e->fields.mask;
 303                 /* Preserve read-only fields */
 304                 old_remote_irr = e->fields.remote_irr;
 305                 old_delivery_status = e->fields.delivery_status;
 306                 old_dest_id = e->fields.dest_id;
 307                 old_dest_mode = e->fields.dest_mode;
 308                 if (ioapic->ioregsel & 1) {
 309                         e->bits &= 0xffffffff;
 310                         e->bits |= (u64) val << 32;
 311                 } else {
 312                         e->bits &= ~0xffffffffULL;
 313                         e->bits |= (u32) val;
 314                 }
 315                 e->fields.remote_irr = old_remote_irr;
 316                 e->fields.delivery_status = old_delivery_status;
 317
 318                 /*
 319                  * Some OSes (Linux, Xen) assume that Remote IRR bit will
 320                  * be cleared by IOAPIC hardware when the entry is configured
 321                  * as edge-triggered. This behavior is used to simulate an
 322                  * explicit EOI on IOAPICs that don't have the EOI register.
 323                  */
 324                 if (e->fields.trig_mode == IOAPIC_EDGE_TRIG)
 325                         e->fields.remote_irr = 0;
 326
 327                 mask_after = e->fields.mask;
 328                 if (mask_before != mask_after)
 329                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 330                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 331                     && ioapic->irr & (1 << index))
 332                         ioapic_service(ioapic, index, false);
 333                 if (e->fields.delivery_mode == APIC_DM_FIXED) {
 334                         struct kvm_lapic_irq irq;
 335
 336                         irq.shorthand = APIC_DEST_NOSHORT;
 337                         irq.vector = e->fields.vector;
 338                         irq.delivery_mode = e->fields.delivery_mode << 8;
 339                         irq.dest_id = e->fields.dest_id;
 340                         irq.dest_mode =
 341                             kvm_lapic_irq_dest_mode(!!e->fields.dest_mode);
 342                         bitmap_zero(&vcpu_bitmap, 16);
 343                         kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
 344                                                  &vcpu_bitmap);
 345                         if (old_dest_mode != e->fields.dest_mode ||
 346                             old_dest_id != e->fields.dest_id) {
 347                                 /*
 348                                  * Update vcpu_bitmap with vcpus specified in
 349                                  * the previous request as well. This is done to
 350                                  * keep ioapic_handled_vectors synchronized.
 351                                  */
 352                                 irq.dest_id = old_dest_id;
 353                                 irq.dest_mode =
 354                                     kvm_lapic_irq_dest_mode(
 355                                         !!e->fields.dest_mode);
 356                                 kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
 357                                                          &vcpu_bitmap);
 358                         }
 359                         kvm_make_scan_ioapic_request_mask(ioapic->kvm,
 360                                                           &vcpu_bitmap);
 361                 } else {
 362                         kvm_make_scan_ioapic_request(ioapic->kvm);
 363                 }
 364                 break;
 365         }
 366 }
 367
 368 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 369 {
 370         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 371         struct kvm_lapic_irq irqe;
 372         int ret;
 373
 374         if (entry->fields.mask ||
 375             (entry->fields.trig_mode == IOAPIC_LEVEL_TRIG &&
 376             entry->fields.remote_irr))
 377                 return -1;
 378
 379         irqe.dest_id = entry->fields.dest_id;
 380         irqe.vector = entry->fields.vector;
 381         irqe.dest_mode = kvm_lapic_irq_dest_mode(!!entry->fields.dest_mode);
 382         irqe.trig_mode = entry->fields.trig_mode;
 383         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 384         irqe.level = 1;
 385         irqe.shorthand = APIC_DEST_NOSHORT;
 386         irqe.msi_redir_hint = false;
 387
 388         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 389                 ioapic->irr_delivered |= 1 << irq;
 390
 391         if (irq == RTC_GSI && line_status) {
 392                 /*
 393                  * pending_eoi cannot ever become negative (see
 394                  * rtc_status_pending_eoi_check_valid) and the caller
 395                  * ensures that it is only called if it is >= zero, namely
 396                  * if rtc_irq_check_coalesced returns false).
 397                  */
 398                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 399                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 400                                                &ioapic->rtc_status.dest_map);
 401                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 402         } else
 403                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 404
 405         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 406                 entry->fields.remote_irr = 1;
 407
 408         return ret;
 409 }
 410
 411 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 412                        int level, bool line_status)
 413 {
 414         int ret, irq_level;
 415
 416         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 417
 418         spin_lock(&ioapic->lock);
 419         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 420                                          irq_source_id, level);
 421         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 422
 423         spin_unlock(&ioapic->lock);
 424
 425         return ret;
 426 }
 427
 428 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 429 {
 430         int i;
 431
 432         spin_lock(&ioapic->lock);
 433         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 434                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 435         spin_unlock(&ioapic->lock);
 436 }
 437
 438 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 439 {
 440         int i;
 441         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 442                                                  eoi_inject.work);
 443         spin_lock(&ioapic->lock);
 444         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 445                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 446
 447                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 448                         continue;
 449
 450                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 451                         ioapic_service(ioapic, i, false);
 452         }
 453         spin_unlock(&ioapic->lock);
 454 }
 455
 456 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 457
 458 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 459                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 460 {
 461         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 462         struct kvm_lapic *apic = vcpu->arch.apic;
 463         int i;
 464
 465         /* RTC special handling */
 466         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
 467             vector == dest_map->vectors[vcpu->vcpu_id])
 468                 rtc_irq_eoi(ioapic, vcpu);
 469
 470         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 471                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 472
 473                 if (ent->fields.vector != vector)
 474                         continue;
 475
 476                 /*
 477                  * We are dropping lock while calling ack notifiers because ack
 478                  * notifier callbacks for assigned devices call into IOAPIC
 479                  * recursively. Since remote_irr is cleared only after call
 480                  * to notifiers if the same vector will be delivered while lock
 481                  * is dropped it will be put into irr and will be delivered
 482                  * after ack notifier returns.
 483                  */
 484                 spin_unlock(&ioapic->lock);
 485                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 486                 spin_lock(&ioapic->lock);
 487
 488                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 489                     kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 490                         continue;
 491
 492                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 493                 ent->fields.remote_irr = 0;
 494                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
 495                         ++ioapic->irq_eoi[i];
 496                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 497                                 /*
 498                                  * Real hardware does not deliver the interrupt
 499                                  * immediately during eoi broadcast, and this
 500                                  * lets a buggy guest make slow progress
 501                                  * even if it does not correctly handle a
 502                                  * level-triggered interrupt.  Emulate this
 503                                  * behavior if we detect an interrupt storm.
 504                                  */
 505                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 506                                 ioapic->irq_eoi[i] = 0;
 507                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 508                         } else {
 509                                 ioapic_service(ioapic, i, false);
 510                         }
 511                 } else {
 512                         ioapic->irq_eoi[i] = 0;
 513                 }
 514         }
 515 }
 516
 517 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 518 {
 519         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 520
 521         spin_lock(&ioapic->lock);
 522         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 523         spin_unlock(&ioapic->lock);
 524 }
 525
 526 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 527 {
 528         return container_of(dev, struct kvm_ioapic, dev);
 529 }
 530
 531 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 532 {
 533         return ((addr >= ioapic->base_address &&
 534                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 535 }
 536
 537 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 538                                 gpa_t addr, int len, void *val)
 539 {
 540         struct kvm_ioapic *ioapic = to_ioapic(this);
 541         u32 result;
 542         if (!ioapic_in_range(ioapic, addr))
 543                 return -EOPNOTSUPP;
 544
 545         ASSERT(!(addr & 0xf));  /* check alignment */
 546
 547         addr &= 0xff;
 548         spin_lock(&ioapic->lock);
 549         switch (addr) {
 550         case IOAPIC_REG_SELECT:
 551                 result = ioapic->ioregsel;
 552                 break;
 553
 554         case IOAPIC_REG_WINDOW:
 555                 result = ioapic_read_indirect(ioapic, addr, len);
 556                 break;
 557
 558         default:
 559                 result = 0;
 560                 break;
 561         }
 562         spin_unlock(&ioapic->lock);
 563
 564         switch (len) {
 565         case 8:
 566                 *(u64 *) val = result;
 567                 break;
 568         case 1:
 569         case 2:
 570         case 4:
 571                 memcpy(val, (char *)&result, len);
 572                 break;
 573         default:
 574                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 575         }
 576         return 0;
 577 }
 578
 579 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 580                                  gpa_t addr, int len, const void *val)
 581 {
 582         struct kvm_ioapic *ioapic = to_ioapic(this);
 583         u32 data;
 584         if (!ioapic_in_range(ioapic, addr))
 585                 return -EOPNOTSUPP;
 586
 587         ASSERT(!(addr & 0xf));  /* check alignment */
 588
 589         switch (len) {
 590         case 8:
 591         case 4:
 592                 data = *(u32 *) val;
 593                 break;
 594         case 2:
 595                 data = *(u16 *) val;
 596                 break;
 597         case 1:
 598                 data = *(u8  *) val;
 599                 break;
 600         default:
 601                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 602                 return 0;
 603         }
 604
 605         addr &= 0xff;
 606         spin_lock(&ioapic->lock);
 607         switch (addr) {
 608         case IOAPIC_REG_SELECT:
 609                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 610                 break;
 611
 612         case IOAPIC_REG_WINDOW:
 613                 ioapic_write_indirect(ioapic, data);
 614                 break;
 615
 616         default:
 617                 break;
 618         }
 619         spin_unlock(&ioapic->lock);
 620         return 0;
 621 }
 622
 623 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 624 {
 625         int i;
 626
 627         cancel_delayed_work_sync(&ioapic->eoi_inject);
 628         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 629                 ioapic->redirtbl[i].fields.mask = 1;
 630         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 631         ioapic->ioregsel = 0;
 632         ioapic->irr = 0;
 633         ioapic->irr_delivered = 0;
 634         ioapic->id = 0;
 635         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
 636         rtc_irq_eoi_tracking_reset(ioapic);
 637 }
 638
 639 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 640         .read     = ioapic_mmio_read,
 641         .write    = ioapic_mmio_write,
 642 };
 643
 644 int kvm_ioapic_init(struct kvm *kvm)
 645 {
 646         struct kvm_ioapic *ioapic;
 647         int ret;
 648
 649         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL_ACCOUNT);
 650         if (!ioapic)
 651                 return -ENOMEM;
 652         spin_lock_init(&ioapic->lock);
 653         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 654         kvm->arch.vioapic = ioapic;
 655         kvm_ioapic_reset(ioapic);
 656         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 657         ioapic->kvm = kvm;
 658         mutex_lock(&kvm->slots_lock);
 659         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 660                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 661         mutex_unlock(&kvm->slots_lock);
 662         if (ret < 0) {
 663                 kvm->arch.vioapic = NULL;
 664                 kfree(ioapic);
 665         }
 666
 667         return ret;
 668 }
 669
 670 void kvm_ioapic_destroy(struct kvm *kvm)
 671 {
 672         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 673
 674         if (!ioapic)
 675                 return;
 676
 677         cancel_delayed_work_sync(&ioapic->eoi_inject);
 678         mutex_lock(&kvm->slots_lock);
 679         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 680         mutex_unlock(&kvm->slots_lock);
 681         kvm->arch.vioapic = NULL;
 682         kfree(ioapic);
 683 }
 684
 685 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 686 {
 687         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 688
 689         spin_lock(&ioapic->lock);
 690         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 691         state->irr &= ~ioapic->irr_delivered;
 692         spin_unlock(&ioapic->lock);
 693 }
 694
 695 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 696 {
 697         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 698
 699         spin_lock(&ioapic->lock);
 700         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 701         ioapic->irr = 0;
 702         ioapic->irr_delivered = 0;
 703         kvm_make_scan_ioapic_request(kvm);
 704         kvm_ioapic_inject_all(ioapic, state->irr);
 705         spin_unlock(&ioapic->lock);
 706 }