14 config ARM_CCI400_COMMON
19 bool "ARM CCI400 PMU support"
20 depends on (ARM && CPU_V7) || ARM64
21 depends on PERF_EVENTS
22 select ARM_CCI400_COMMON
25 Support for PMU events monitoring on the ARM CCI-400 (cache coherent
26 interconnect). CCI-400 supports counting events related to the
27 connected slave/master interfaces.
29 config ARM_CCI400_PORT_CTRL
31 depends on ARM && OF && CPU_V7
32 select ARM_CCI400_COMMON
34 Low level power management driver for CCI400 cache coherent
35 interconnect for ARM platforms.
38 bool "ARM CCI500 PMU support"
40 depends on (ARM && CPU_V7) || ARM64
41 depends on PERF_EVENTS
44 Support for PMU events monitoring on the ARM CCI-500 cache coherent
45 interconnect. CCI-500 provides 8 independent event counters, which
46 can count events pertaining to the slave/master interfaces as well
47 as the internal events to the CCI.
52 bool "ARM CCN driver support"
53 depends on ARM || ARM64
54 depends on PERF_EVENTS
56 PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
59 config BRCMSTB_GISB_ARB
60 bool "Broadcom STB GISB bus arbiter"
61 depends on ARM || MIPS
63 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
64 arbiter. This driver provides timeout and target abort error handling
65 and internal bus master decoding.
68 bool "Freescale EIM DRIVER"
71 Driver for i.MX WEIM controller.
72 The WEIM(Wireless External Interface Module) works like a bus.
73 You can attach many different devices on it, such as NOR, onenand.
76 bool "MIPS Common Device Memory Map (CDMM) Driver"
79 Driver needed for the MIPS Common Device Memory Map bus in MIPS
80 cores. This bus is for per-CPU tightly coupled devices such as the
81 Fast Debug Channel (FDC).
83 For this to work, either your bootloader needs to enable the CDMM
84 region at an unused physical address on the boot CPU, or else your
85 platform code needs to implement mips_cdmm_phys_base() (see
92 Driver needed for the MBus configuration on Marvell EBU SoCs
93 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
95 config OMAP_INTERCONNECT
96 tristate "OMAP INTERCONNECT DRIVER"
97 depends on ARCH_OMAP2PLUS
100 Driver to enable OMAP interconnect error handling driver.
103 tristate "OMAP OCP2SCP DRIVER"
104 depends on ARCH_OMAP2PLUS
106 Driver to enable ocp2scp module which transforms ocp interface
107 protocol to scp protocol. In OMAP4, USB PHY is connected via
108 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
112 bool "Simple Power-Managed Bus Driver"
114 depends on ARCH_SHMOBILE || COMPILE_TEST
116 Driver for transparent busses that don't need a real driver, but
117 where the bus controller is part of a PM domain, or under the control
118 of a functional clock, and thus relies on runtime PM for managing
119 this PM domain and/or clock.
120 An example of such a bus controller is the Renesas Bus State
121 Controller (BSC, sometimes called "LBSC within Bus Bridge", or
122 "External Bus Interface") as found on several Renesas ARM SoCs.
124 config VEXPRESS_CONFIG
125 bool "Versatile Express configuration bus"
126 default y if ARCH_VEXPRESS
127 depends on ARM || ARM64
131 Platform configuration infrastructure for the ARM Ltd.