2 * Routines supporting the Power 7+ Nest Accelerators driver
4 * Copyright (C) 2011-2012 International Business Machines Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 only.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Author: Kent Yoder <yoder1@us.ibm.com>
22 #include <crypto/internal/aead.h>
23 #include <crypto/internal/hash.h>
24 #include <crypto/aes.h>
25 #include <crypto/sha.h>
26 #include <crypto/algapi.h>
27 #include <crypto/scatterwalk.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
32 #include <linux/scatterlist.h>
33 #include <linux/device.h>
35 #include <linux/types.h>
36 #include <asm/hvcall.h>
39 #include "nx_csbcpb.h"
44 * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure
46 * @nx_ctx: the crypto context handle
47 * @op: PFO operation struct to pass in
48 * @may_sleep: flag indicating the request can sleep
50 * Make the hcall, retrying while the hardware is busy. If we cannot yield
51 * the thread, limit the number of retries to 10 here.
53 int nx_hcall_sync(struct nx_crypto_ctx
*nx_ctx
,
54 struct vio_pfo_op
*op
,
58 struct vio_dev
*viodev
= nx_driver
.viodev
;
60 atomic_inc(&(nx_ctx
->stats
->sync_ops
));
63 rc
= vio_h_cop_sync(viodev
, op
);
64 } while (rc
== -EBUSY
&& !may_sleep
&& retries
--);
67 dev_dbg(&viodev
->dev
, "vio_h_cop_sync failed: rc: %d "
68 "hcall rc: %ld\n", rc
, op
->hcall_err
);
69 atomic_inc(&(nx_ctx
->stats
->errors
));
70 atomic_set(&(nx_ctx
->stats
->last_error
), op
->hcall_err
);
71 atomic_set(&(nx_ctx
->stats
->last_error_pid
), current
->pid
);
78 * nx_build_sg_list - build an NX scatter list describing a single buffer
80 * @sg_head: pointer to the first scatter list element to build
81 * @start_addr: pointer to the linear buffer
82 * @len: length of the data at @start_addr
83 * @sgmax: the largest number of scatter list elements we're allowed to create
85 * This function will start writing nx_sg elements at @sg_head and keep
86 * writing them until all of the data from @start_addr is described or
87 * until sgmax elements have been written. Scatter list elements will be
88 * created such that none of the elements describes a buffer that crosses a 4K
91 struct nx_sg
*nx_build_sg_list(struct nx_sg
*sg_head
,
96 unsigned int sg_len
= 0;
98 u64 sg_addr
= (u64
)start_addr
;
101 /* determine the start and end for this address range - slightly
102 * different if this is in VMALLOC_REGION */
103 if (is_vmalloc_addr(start_addr
))
104 sg_addr
= page_to_phys(vmalloc_to_page(start_addr
))
105 + offset_in_page(sg_addr
);
107 sg_addr
= __pa(sg_addr
);
109 end_addr
= sg_addr
+ *len
;
111 /* each iteration will write one struct nx_sg element and add the
112 * length of data described by that element to sg_len. Once @len bytes
113 * have been described (or @sgmax elements have been written), the
114 * loop ends. min_t is used to ensure @end_addr falls on the same page
115 * as sg_addr, if not, we need to create another nx_sg element for the
116 * data on the next page.
118 * Also when using vmalloc'ed data, every time that a system page
119 * boundary is crossed the physical address needs to be re-calculated.
121 for (sg
= sg_head
; sg_len
< *len
; sg
++) {
125 sg_addr
= min_t(u64
, NX_PAGE_NUM(sg_addr
+ NX_PAGE_SIZE
),
128 next_page
= (sg
->addr
& PAGE_MASK
) + PAGE_SIZE
;
129 sg
->len
= min_t(u64
, sg_addr
, next_page
) - sg
->addr
;
132 if (sg_addr
>= next_page
&&
133 is_vmalloc_addr(start_addr
+ sg_len
)) {
134 sg_addr
= page_to_phys(vmalloc_to_page(
135 start_addr
+ sg_len
));
136 end_addr
= sg_addr
+ *len
- sg_len
;
139 if ((sg
- sg_head
) == sgmax
) {
140 pr_err("nx: scatter/gather list overflow, pid: %d\n",
148 /* return the moved sg_head pointer */
153 * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist
155 * @nx_dst: pointer to the first nx_sg element to write
156 * @sglen: max number of nx_sg entries we're allowed to write
157 * @sg_src: pointer to the source linux scatterlist to walk
158 * @start: number of bytes to fast-forward past at the beginning of @sg_src
159 * @src_len: number of bytes to walk in @sg_src
161 struct nx_sg
*nx_walk_and_build(struct nx_sg
*nx_dst
,
163 struct scatterlist
*sg_src
,
165 unsigned int *src_len
)
167 struct scatter_walk walk
;
168 struct nx_sg
*nx_sg
= nx_dst
;
169 unsigned int n
, offset
= 0, len
= *src_len
;
172 /* we need to fast forward through @start bytes first */
174 scatterwalk_start(&walk
, sg_src
);
176 if (start
< offset
+ sg_src
->length
)
179 offset
+= sg_src
->length
;
180 sg_src
= sg_next(sg_src
);
183 /* start - offset is the number of bytes to advance in the scatterlist
184 * element we're currently looking at */
185 scatterwalk_advance(&walk
, start
- offset
);
187 while (len
&& (nx_sg
- nx_dst
) < sglen
) {
188 n
= scatterwalk_clamp(&walk
, len
);
190 /* In cases where we have scatterlist chain sg_next
191 * handles with it properly */
192 scatterwalk_start(&walk
, sg_next(walk
.sg
));
193 n
= scatterwalk_clamp(&walk
, len
);
195 dst
= scatterwalk_map(&walk
);
197 nx_sg
= nx_build_sg_list(nx_sg
, dst
, &n
, sglen
- (nx_sg
- nx_dst
));
200 scatterwalk_unmap(dst
);
201 scatterwalk_advance(&walk
, n
);
202 scatterwalk_done(&walk
, SCATTERWALK_FROM_SG
, len
);
204 /* update to_process */
207 /* return the moved destination pointer */
212 * trim_sg_list - ensures the bound in sg list.
215 * @delta: is the amount we need to crop in order to bound the list.
218 static long int trim_sg_list(struct nx_sg
*sg
,
221 unsigned int *nbytes
)
225 unsigned int is_delta
= delta
;
227 while (delta
&& end
> sg
) {
228 struct nx_sg
*last
= end
- 1;
230 if (last
->len
> delta
) {
239 /* There are cases where we need to crop list in order to make it
240 * a block size multiple, but we also need to align data. In order to
241 * that we need to calculate how much we need to put back to be
244 oplen
= (sg
- end
) * sizeof(struct nx_sg
);
246 data_back
= (abs(oplen
) / AES_BLOCK_SIZE
) * sg
->len
;
247 data_back
= *nbytes
- (data_back
& ~(AES_BLOCK_SIZE
- 1));
248 *nbytes
-= data_back
;
255 * nx_build_sg_lists - walk the input scatterlists and build arrays of NX
256 * scatterlists based on them.
258 * @nx_ctx: NX crypto context for the lists we're building
259 * @desc: the block cipher descriptor for the operation
260 * @dst: destination scatterlist
261 * @src: source scatterlist
262 * @nbytes: length of data described in the scatterlists
263 * @offset: number of bytes to fast-forward past at the beginning of
265 * @iv: destination for the iv data, if the algorithm requires it
267 * This is common code shared by all the AES algorithms. It uses the block
268 * cipher walk routines to traverse input and output scatterlists, building
269 * corresponding NX scatterlists
271 int nx_build_sg_lists(struct nx_crypto_ctx
*nx_ctx
,
272 struct blkcipher_desc
*desc
,
273 struct scatterlist
*dst
,
274 struct scatterlist
*src
,
275 unsigned int *nbytes
,
279 unsigned int delta
= 0;
280 unsigned int total
= *nbytes
;
281 struct nx_sg
*nx_insg
= nx_ctx
->in_sg
;
282 struct nx_sg
*nx_outsg
= nx_ctx
->out_sg
;
283 unsigned int max_sg_len
;
285 max_sg_len
= min_t(u64
, nx_ctx
->ap
->sglen
,
286 nx_driver
.of
.max_sg_len
/sizeof(struct nx_sg
));
287 max_sg_len
= min_t(u64
, max_sg_len
,
288 nx_ctx
->ap
->databytelen
/NX_PAGE_SIZE
);
291 memcpy(iv
, desc
->info
, AES_BLOCK_SIZE
);
293 *nbytes
= min_t(u64
, *nbytes
, nx_ctx
->ap
->databytelen
);
295 nx_outsg
= nx_walk_and_build(nx_outsg
, max_sg_len
, dst
,
297 nx_insg
= nx_walk_and_build(nx_insg
, max_sg_len
, src
,
301 delta
= *nbytes
- (*nbytes
& ~(AES_BLOCK_SIZE
- 1));
303 /* these lengths should be negative, which will indicate to phyp that
304 * the input and output parameters are scatterlists, not linear
306 nx_ctx
->op
.inlen
= trim_sg_list(nx_ctx
->in_sg
, nx_insg
, delta
, nbytes
);
307 nx_ctx
->op
.outlen
= trim_sg_list(nx_ctx
->out_sg
, nx_outsg
, delta
, nbytes
);
313 * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct
315 * @nx_ctx: the nx context to initialize
316 * @function: the function code for the op
318 void nx_ctx_init(struct nx_crypto_ctx
*nx_ctx
, unsigned int function
)
320 spin_lock_init(&nx_ctx
->lock
);
321 memset(nx_ctx
->kmem
, 0, nx_ctx
->kmem_len
);
322 nx_ctx
->csbcpb
->csb
.valid
|= NX_CSB_VALID_BIT
;
324 nx_ctx
->op
.flags
= function
;
325 nx_ctx
->op
.csbcpb
= __pa(nx_ctx
->csbcpb
);
326 nx_ctx
->op
.in
= __pa(nx_ctx
->in_sg
);
327 nx_ctx
->op
.out
= __pa(nx_ctx
->out_sg
);
329 if (nx_ctx
->csbcpb_aead
) {
330 nx_ctx
->csbcpb_aead
->csb
.valid
|= NX_CSB_VALID_BIT
;
332 nx_ctx
->op_aead
.flags
= function
;
333 nx_ctx
->op_aead
.csbcpb
= __pa(nx_ctx
->csbcpb_aead
);
334 nx_ctx
->op_aead
.in
= __pa(nx_ctx
->in_sg
);
335 nx_ctx
->op_aead
.out
= __pa(nx_ctx
->out_sg
);
339 static void nx_of_update_status(struct device
*dev
,
343 if (!strncmp(p
->value
, "okay", p
->length
)) {
344 props
->status
= NX_WAITING
;
345 props
->flags
|= NX_OF_FLAG_STATUS_SET
;
347 dev_info(dev
, "%s: status '%s' is not 'okay'\n", __func__
,
352 static void nx_of_update_sglen(struct device
*dev
,
356 if (p
->length
!= sizeof(props
->max_sg_len
)) {
357 dev_err(dev
, "%s: unexpected format for "
358 "ibm,max-sg-len property\n", __func__
);
359 dev_dbg(dev
, "%s: ibm,max-sg-len is %d bytes "
360 "long, expected %zd bytes\n", __func__
,
361 p
->length
, sizeof(props
->max_sg_len
));
365 props
->max_sg_len
= *(u32
*)p
->value
;
366 props
->flags
|= NX_OF_FLAG_MAXSGLEN_SET
;
369 static void nx_of_update_msc(struct device
*dev
,
373 struct msc_triplet
*trip
;
374 struct max_sync_cop
*msc
;
375 unsigned int bytes_so_far
, i
, lenp
;
377 msc
= (struct max_sync_cop
*)p
->value
;
380 /* You can't tell if the data read in for this property is sane by its
381 * size alone. This is because there are sizes embedded in the data
382 * structure. The best we can do is check lengths as we parse and bail
383 * as soon as a length error is detected. */
386 while ((bytes_so_far
+ sizeof(struct max_sync_cop
)) <= lenp
) {
387 bytes_so_far
+= sizeof(struct max_sync_cop
);
392 ((bytes_so_far
+ sizeof(struct msc_triplet
)) <= lenp
) &&
395 if (msc
->fc
> NX_MAX_FC
|| msc
->mode
> NX_MAX_MODE
) {
396 dev_err(dev
, "unknown function code/mode "
397 "combo: %d/%d (ignored)\n", msc
->fc
,
402 if (!trip
->sglen
|| trip
->databytelen
< NX_PAGE_SIZE
) {
403 dev_warn(dev
, "bogus sglen/databytelen: "
404 "%u/%u (ignored)\n", trip
->sglen
,
409 switch (trip
->keybitlen
) {
412 props
->ap
[msc
->fc
][msc
->mode
][0].databytelen
=
414 props
->ap
[msc
->fc
][msc
->mode
][0].sglen
=
418 props
->ap
[msc
->fc
][msc
->mode
][1].databytelen
=
420 props
->ap
[msc
->fc
][msc
->mode
][1].sglen
=
424 if (msc
->fc
== NX_FC_AES
) {
425 props
->ap
[msc
->fc
][msc
->mode
][2].
426 databytelen
= trip
->databytelen
;
427 props
->ap
[msc
->fc
][msc
->mode
][2].sglen
=
429 } else if (msc
->fc
== NX_FC_AES_HMAC
||
430 msc
->fc
== NX_FC_SHA
) {
431 props
->ap
[msc
->fc
][msc
->mode
][1].
432 databytelen
= trip
->databytelen
;
433 props
->ap
[msc
->fc
][msc
->mode
][1].sglen
=
436 dev_warn(dev
, "unknown function "
437 "code/key bit len combo"
438 ": (%u/256)\n", msc
->fc
);
442 props
->ap
[msc
->fc
][msc
->mode
][2].databytelen
=
444 props
->ap
[msc
->fc
][msc
->mode
][2].sglen
=
448 dev_warn(dev
, "unknown function code/key bit "
449 "len combo: (%u/%u)\n", msc
->fc
,
454 bytes_so_far
+= sizeof(struct msc_triplet
);
458 msc
= (struct max_sync_cop
*)trip
;
461 props
->flags
|= NX_OF_FLAG_MAXSYNCCOP_SET
;
465 * nx_of_init - read openFirmware values from the device tree
467 * @dev: device handle
468 * @props: pointer to struct to hold the properties values
470 * Called once at driver probe time, this function will read out the
471 * openFirmware properties we use at runtime. If all the OF properties are
472 * acceptable, when we exit this function props->flags will indicate that
473 * we're ready to register our crypto algorithms.
475 static void nx_of_init(struct device
*dev
, struct nx_of
*props
)
477 struct device_node
*base_node
= dev
->of_node
;
480 p
= of_find_property(base_node
, "status", NULL
);
482 dev_info(dev
, "%s: property 'status' not found\n", __func__
);
484 nx_of_update_status(dev
, p
, props
);
486 p
= of_find_property(base_node
, "ibm,max-sg-len", NULL
);
488 dev_info(dev
, "%s: property 'ibm,max-sg-len' not found\n",
491 nx_of_update_sglen(dev
, p
, props
);
493 p
= of_find_property(base_node
, "ibm,max-sync-cop", NULL
);
495 dev_info(dev
, "%s: property 'ibm,max-sync-cop' not found\n",
498 nx_of_update_msc(dev
, p
, props
);
501 static bool nx_check_prop(struct device
*dev
, u32 fc
, u32 mode
, int slot
)
503 struct alg_props
*props
= &nx_driver
.of
.ap
[fc
][mode
][slot
];
505 if (!props
->sglen
|| props
->databytelen
< NX_PAGE_SIZE
) {
507 dev_warn(dev
, "bogus sglen/databytelen for %u/%u/%u: "
508 "%u/%u (ignored)\n", fc
, mode
, slot
,
509 props
->sglen
, props
->databytelen
);
516 static bool nx_check_props(struct device
*dev
, u32 fc
, u32 mode
)
520 for (i
= 0; i
< 3; i
++)
521 if (!nx_check_prop(dev
, fc
, mode
, i
))
527 static int nx_register_alg(struct crypto_alg
*alg
, u32 fc
, u32 mode
)
529 return nx_check_props(&nx_driver
.viodev
->dev
, fc
, mode
) ?
530 crypto_register_alg(alg
) : 0;
533 static int nx_register_aead(struct aead_alg
*alg
, u32 fc
, u32 mode
)
535 return nx_check_props(&nx_driver
.viodev
->dev
, fc
, mode
) ?
536 crypto_register_aead(alg
) : 0;
539 static int nx_register_shash(struct shash_alg
*alg
, u32 fc
, u32 mode
, int slot
)
541 return (slot
>= 0 ? nx_check_prop(&nx_driver
.viodev
->dev
,
543 nx_check_props(&nx_driver
.viodev
->dev
, fc
, mode
)) ?
544 crypto_register_shash(alg
) : 0;
547 static void nx_unregister_alg(struct crypto_alg
*alg
, u32 fc
, u32 mode
)
549 if (nx_check_props(NULL
, fc
, mode
))
550 crypto_unregister_alg(alg
);
553 static void nx_unregister_aead(struct aead_alg
*alg
, u32 fc
, u32 mode
)
555 if (nx_check_props(NULL
, fc
, mode
))
556 crypto_unregister_aead(alg
);
559 static void nx_unregister_shash(struct shash_alg
*alg
, u32 fc
, u32 mode
,
562 if (slot
>= 0 ? nx_check_prop(NULL
, fc
, mode
, slot
) :
563 nx_check_props(NULL
, fc
, mode
))
564 crypto_unregister_shash(alg
);
568 * nx_register_algs - register algorithms with the crypto API
570 * Called from nx_probe()
572 * If all OF properties are in an acceptable state, the driver flags will
573 * indicate that we're ready and we'll create our debugfs files and register
574 * out crypto algorithms.
576 static int nx_register_algs(void)
580 if (nx_driver
.of
.flags
!= NX_OF_FLAG_MASK_READY
)
583 memset(&nx_driver
.stats
, 0, sizeof(struct nx_stats
));
585 rc
= NX_DEBUGFS_INIT(&nx_driver
);
589 nx_driver
.of
.status
= NX_OKAY
;
591 rc
= nx_register_alg(&nx_ecb_aes_alg
, NX_FC_AES
, NX_MODE_AES_ECB
);
595 rc
= nx_register_alg(&nx_cbc_aes_alg
, NX_FC_AES
, NX_MODE_AES_CBC
);
599 rc
= nx_register_alg(&nx_ctr_aes_alg
, NX_FC_AES
, NX_MODE_AES_CTR
);
603 rc
= nx_register_alg(&nx_ctr3686_aes_alg
, NX_FC_AES
, NX_MODE_AES_CTR
);
607 rc
= nx_register_aead(&nx_gcm_aes_alg
, NX_FC_AES
, NX_MODE_AES_GCM
);
609 goto out_unreg_ctr3686
;
611 rc
= nx_register_aead(&nx_gcm4106_aes_alg
, NX_FC_AES
, NX_MODE_AES_GCM
);
615 rc
= nx_register_alg(&nx_ccm_aes_alg
, NX_FC_AES
, NX_MODE_AES_CCM
);
617 goto out_unreg_gcm4106
;
619 rc
= nx_register_alg(&nx_ccm4309_aes_alg
, NX_FC_AES
, NX_MODE_AES_CCM
);
623 rc
= nx_register_shash(&nx_shash_sha256_alg
, NX_FC_SHA
, NX_MODE_SHA
,
626 goto out_unreg_ccm4309
;
628 rc
= nx_register_shash(&nx_shash_sha512_alg
, NX_FC_SHA
, NX_MODE_SHA
,
633 rc
= nx_register_shash(&nx_shash_aes_xcbc_alg
,
634 NX_FC_AES
, NX_MODE_AES_XCBC_MAC
, -1);
641 nx_unregister_shash(&nx_shash_sha512_alg
, NX_FC_SHA
, NX_MODE_SHA
,
644 nx_unregister_shash(&nx_shash_sha256_alg
, NX_FC_SHA
, NX_MODE_SHA
,
647 nx_unregister_alg(&nx_ccm4309_aes_alg
, NX_FC_AES
, NX_MODE_AES_CCM
);
649 nx_unregister_alg(&nx_ccm_aes_alg
, NX_FC_AES
, NX_MODE_AES_CCM
);
651 nx_unregister_aead(&nx_gcm4106_aes_alg
, NX_FC_AES
, NX_MODE_AES_GCM
);
653 nx_unregister_aead(&nx_gcm_aes_alg
, NX_FC_AES
, NX_MODE_AES_GCM
);
655 nx_unregister_alg(&nx_ctr3686_aes_alg
, NX_FC_AES
, NX_MODE_AES_CTR
);
657 nx_unregister_alg(&nx_ctr_aes_alg
, NX_FC_AES
, NX_MODE_AES_CTR
);
659 nx_unregister_alg(&nx_cbc_aes_alg
, NX_FC_AES
, NX_MODE_AES_CBC
);
661 nx_unregister_alg(&nx_ecb_aes_alg
, NX_FC_AES
, NX_MODE_AES_ECB
);
667 * nx_crypto_ctx_init - create and initialize a crypto api context
669 * @nx_ctx: the crypto api context
670 * @fc: function code for the context
671 * @mode: the function code specific mode for this context
673 static int nx_crypto_ctx_init(struct nx_crypto_ctx
*nx_ctx
, u32 fc
, u32 mode
)
675 if (nx_driver
.of
.status
!= NX_OKAY
) {
676 pr_err("Attempt to initialize NX crypto context while device "
677 "is not available!\n");
681 /* we need an extra page for csbcpb_aead for these modes */
682 if (mode
== NX_MODE_AES_GCM
|| mode
== NX_MODE_AES_CCM
)
683 nx_ctx
->kmem_len
= (5 * NX_PAGE_SIZE
) +
684 sizeof(struct nx_csbcpb
);
686 nx_ctx
->kmem_len
= (4 * NX_PAGE_SIZE
) +
687 sizeof(struct nx_csbcpb
);
689 nx_ctx
->kmem
= kmalloc(nx_ctx
->kmem_len
, GFP_KERNEL
);
693 /* the csbcpb and scatterlists must be 4K aligned pages */
694 nx_ctx
->csbcpb
= (struct nx_csbcpb
*)(round_up((u64
)nx_ctx
->kmem
,
696 nx_ctx
->in_sg
= (struct nx_sg
*)((u8
*)nx_ctx
->csbcpb
+ NX_PAGE_SIZE
);
697 nx_ctx
->out_sg
= (struct nx_sg
*)((u8
*)nx_ctx
->in_sg
+ NX_PAGE_SIZE
);
699 if (mode
== NX_MODE_AES_GCM
|| mode
== NX_MODE_AES_CCM
)
700 nx_ctx
->csbcpb_aead
=
701 (struct nx_csbcpb
*)((u8
*)nx_ctx
->out_sg
+
704 /* give each context a pointer to global stats and their OF
706 nx_ctx
->stats
= &nx_driver
.stats
;
707 memcpy(nx_ctx
->props
, nx_driver
.of
.ap
[fc
][mode
],
708 sizeof(struct alg_props
) * 3);
713 /* entry points from the crypto tfm initializers */
714 int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm
*tfm
)
716 crypto_aead_set_reqsize(__crypto_aead_cast(tfm
),
717 sizeof(struct nx_ccm_rctx
));
718 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm
), NX_FC_AES
,
722 int nx_crypto_ctx_aes_gcm_init(struct crypto_aead
*tfm
)
724 crypto_aead_set_reqsize(tfm
, sizeof(struct nx_gcm_rctx
));
725 return nx_crypto_ctx_init(crypto_aead_ctx(tfm
), NX_FC_AES
,
729 int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm
*tfm
)
731 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm
), NX_FC_AES
,
735 int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm
*tfm
)
737 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm
), NX_FC_AES
,
741 int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm
*tfm
)
743 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm
), NX_FC_AES
,
747 int nx_crypto_ctx_sha_init(struct crypto_tfm
*tfm
)
749 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm
), NX_FC_SHA
, NX_MODE_SHA
);
752 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm
*tfm
)
754 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm
), NX_FC_AES
,
755 NX_MODE_AES_XCBC_MAC
);
759 * nx_crypto_ctx_exit - destroy a crypto api context
761 * @tfm: the crypto transform pointer for the context
763 * As crypto API contexts are destroyed, this exit hook is called to free the
764 * memory associated with it.
766 void nx_crypto_ctx_exit(struct crypto_tfm
*tfm
)
768 struct nx_crypto_ctx
*nx_ctx
= crypto_tfm_ctx(tfm
);
770 kzfree(nx_ctx
->kmem
);
771 nx_ctx
->csbcpb
= NULL
;
772 nx_ctx
->csbcpb_aead
= NULL
;
773 nx_ctx
->in_sg
= NULL
;
774 nx_ctx
->out_sg
= NULL
;
777 void nx_crypto_ctx_aead_exit(struct crypto_aead
*tfm
)
779 struct nx_crypto_ctx
*nx_ctx
= crypto_aead_ctx(tfm
);
781 kzfree(nx_ctx
->kmem
);
784 static int nx_probe(struct vio_dev
*viodev
, const struct vio_device_id
*id
)
786 dev_dbg(&viodev
->dev
, "driver probed: %s resource id: 0x%x\n",
787 viodev
->name
, viodev
->resource_id
);
789 if (nx_driver
.viodev
) {
790 dev_err(&viodev
->dev
, "%s: Attempt to register more than one "
791 "instance of the hardware\n", __func__
);
795 nx_driver
.viodev
= viodev
;
797 nx_of_init(&viodev
->dev
, &nx_driver
.of
);
799 return nx_register_algs();
802 static int nx_remove(struct vio_dev
*viodev
)
804 dev_dbg(&viodev
->dev
, "entering nx_remove for UA 0x%x\n",
805 viodev
->unit_address
);
807 if (nx_driver
.of
.status
== NX_OKAY
) {
808 NX_DEBUGFS_FINI(&nx_driver
);
810 nx_unregister_shash(&nx_shash_aes_xcbc_alg
,
811 NX_FC_AES
, NX_MODE_AES_XCBC_MAC
, -1);
812 nx_unregister_shash(&nx_shash_sha512_alg
,
813 NX_FC_SHA
, NX_MODE_SHA
, NX_PROPS_SHA256
);
814 nx_unregister_shash(&nx_shash_sha256_alg
,
815 NX_FC_SHA
, NX_MODE_SHA
, NX_PROPS_SHA512
);
816 nx_unregister_alg(&nx_ccm4309_aes_alg
,
817 NX_FC_AES
, NX_MODE_AES_CCM
);
818 nx_unregister_alg(&nx_ccm_aes_alg
, NX_FC_AES
, NX_MODE_AES_CCM
);
819 nx_unregister_aead(&nx_gcm4106_aes_alg
,
820 NX_FC_AES
, NX_MODE_AES_GCM
);
821 nx_unregister_aead(&nx_gcm_aes_alg
,
822 NX_FC_AES
, NX_MODE_AES_GCM
);
823 nx_unregister_alg(&nx_ctr3686_aes_alg
,
824 NX_FC_AES
, NX_MODE_AES_CTR
);
825 nx_unregister_alg(&nx_ctr_aes_alg
, NX_FC_AES
, NX_MODE_AES_CTR
);
826 nx_unregister_alg(&nx_cbc_aes_alg
, NX_FC_AES
, NX_MODE_AES_CBC
);
827 nx_unregister_alg(&nx_ecb_aes_alg
, NX_FC_AES
, NX_MODE_AES_ECB
);
834 /* module wide initialization/cleanup */
835 static int __init
nx_init(void)
837 return vio_register_driver(&nx_driver
.viodriver
);
840 static void __exit
nx_fini(void)
842 vio_unregister_driver(&nx_driver
.viodriver
);
845 static struct vio_device_id nx_crypto_driver_ids
[] = {
846 { "ibm,sym-encryption-v1", "ibm,sym-encryption" },
849 MODULE_DEVICE_TABLE(vio
, nx_crypto_driver_ids
);
851 /* driver state structure */
852 struct nx_crypto_driver nx_driver
= {
854 .id_table
= nx_crypto_driver_ids
,
861 module_init(nx_init
);
862 module_exit(nx_fini
);
864 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>");
865 MODULE_DESCRIPTION(NX_STRING
);
866 MODULE_LICENSE("GPL");
867 MODULE_VERSION(NX_VERSION
);