Linux 4.2.1
[linux/fpc-iii.git] / drivers / dma / sh / shdma-arm.h
bloba1b0ef45d6a2f664262f009df1d108099aac5ffc
1 /*
2 * Renesas SuperH DMA Engine support
4 * Copyright (C) 2013 Renesas Electronics, Inc.
6 * This is free software; you can redistribute it and/or modify it under the
7 * terms of version 2 the GNU General Public License as published by the Free
8 * Software Foundation.
9 */
11 #ifndef SHDMA_ARM_H
12 #define SHDMA_ARM_H
14 #include "shdma.h"
16 /* Transmit sizes and respective CHCR register values */
17 enum {
18 XMIT_SZ_8BIT = 0,
19 XMIT_SZ_16BIT = 1,
20 XMIT_SZ_32BIT = 2,
21 XMIT_SZ_64BIT = 7,
22 XMIT_SZ_128BIT = 3,
23 XMIT_SZ_256BIT = 4,
24 XMIT_SZ_512BIT = 5,
27 /* log2(size / 8) - used to calculate number of transfers */
28 #define SH_DMAE_TS_SHIFT { \
29 [XMIT_SZ_8BIT] = 0, \
30 [XMIT_SZ_16BIT] = 1, \
31 [XMIT_SZ_32BIT] = 2, \
32 [XMIT_SZ_64BIT] = 3, \
33 [XMIT_SZ_128BIT] = 4, \
34 [XMIT_SZ_256BIT] = 5, \
35 [XMIT_SZ_512BIT] = 6, \
38 #define TS_LOW_BIT 0x3 /* --xx */
39 #define TS_HI_BIT 0xc /* xx-- */
41 #define TS_LOW_SHIFT (3)
42 #define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */
44 #define TS_INDEX2VAL(i) \
45 ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
46 (((i) & TS_HI_BIT) << TS_HI_SHIFT))
48 #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
49 #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))
51 #endif