2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <drm/drm_crtc_helper.h>
30 #include <drm/amdgpu_drm.h>
32 #include "amdgpu_ih.h"
34 #include "amdgpu_connectors.h"
36 #include <linux/pm_runtime.h>
38 #define AMDGPU_WAIT_IDLE_TIMEOUT 200
41 * Handle hotplug events outside the interrupt handler proper.
44 * amdgpu_hotplug_work_func - display hotplug work handler
48 * This is the hot plug event work handler (all asics).
49 * The work gets scheduled from the irq handler if there
50 * was a hot plug interrupt. It walks the connector table
51 * and calls the hotplug handler for each one, then sends
52 * a drm hotplug event to alert userspace.
54 static void amdgpu_hotplug_work_func(struct work_struct
*work
)
56 struct amdgpu_device
*adev
= container_of(work
, struct amdgpu_device
,
58 struct drm_device
*dev
= adev
->ddev
;
59 struct drm_mode_config
*mode_config
= &dev
->mode_config
;
60 struct drm_connector
*connector
;
62 mutex_lock(&mode_config
->mutex
);
63 if (mode_config
->num_connector
) {
64 list_for_each_entry(connector
, &mode_config
->connector_list
, head
)
65 amdgpu_connector_hotplug(connector
);
67 mutex_unlock(&mode_config
->mutex
);
68 /* Just fire off a uevent and let userspace tell us what to do */
69 drm_helper_hpd_irq_event(dev
);
73 * amdgpu_irq_reset_work_func - execute gpu reset
77 * Execute scheduled gpu reset (cayman+).
78 * This function is called when the irq handler
79 * thinks we need a gpu reset.
81 static void amdgpu_irq_reset_work_func(struct work_struct
*work
)
83 struct amdgpu_device
*adev
= container_of(work
, struct amdgpu_device
,
86 amdgpu_gpu_reset(adev
);
89 /* Disable *all* interrupts */
90 static void amdgpu_irq_disable_all(struct amdgpu_device
*adev
)
92 unsigned long irqflags
;
96 spin_lock_irqsave(&adev
->irq
.lock
, irqflags
);
97 for (i
= 0; i
< AMDGPU_MAX_IRQ_SRC_ID
; ++i
) {
98 struct amdgpu_irq_src
*src
= adev
->irq
.sources
[i
];
100 if (!src
|| !src
->funcs
->set
|| !src
->num_types
)
103 for (j
= 0; j
< src
->num_types
; ++j
) {
104 atomic_set(&src
->enabled_types
[j
], 0);
105 r
= src
->funcs
->set(adev
, src
, j
,
106 AMDGPU_IRQ_STATE_DISABLE
);
108 DRM_ERROR("error disabling interrupt (%d)\n",
112 spin_unlock_irqrestore(&adev
->irq
.lock
, irqflags
);
116 * amdgpu_irq_preinstall - drm irq preinstall callback
118 * @dev: drm dev pointer
120 * Gets the hw ready to enable irqs (all asics).
121 * This function disables all interrupt sources on the GPU.
123 void amdgpu_irq_preinstall(struct drm_device
*dev
)
125 struct amdgpu_device
*adev
= dev
->dev_private
;
127 /* Disable *all* interrupts */
128 amdgpu_irq_disable_all(adev
);
130 amdgpu_ih_process(adev
);
134 * amdgpu_irq_postinstall - drm irq preinstall callback
136 * @dev: drm dev pointer
138 * Handles stuff to be done after enabling irqs (all asics).
139 * Returns 0 on success.
141 int amdgpu_irq_postinstall(struct drm_device
*dev
)
143 dev
->max_vblank_count
= 0x001fffff;
148 * amdgpu_irq_uninstall - drm irq uninstall callback
150 * @dev: drm dev pointer
152 * This function disables all interrupt sources on the GPU (all asics).
154 void amdgpu_irq_uninstall(struct drm_device
*dev
)
156 struct amdgpu_device
*adev
= dev
->dev_private
;
161 amdgpu_irq_disable_all(adev
);
165 * amdgpu_irq_handler - irq handler
167 * @int irq, void *arg: args
169 * This is the irq handler for the amdgpu driver (all asics).
171 irqreturn_t
amdgpu_irq_handler(int irq
, void *arg
)
173 struct drm_device
*dev
= (struct drm_device
*) arg
;
174 struct amdgpu_device
*adev
= dev
->dev_private
;
177 ret
= amdgpu_ih_process(adev
);
178 if (ret
== IRQ_HANDLED
)
179 pm_runtime_mark_last_busy(dev
->dev
);
184 * amdgpu_msi_ok - asic specific msi checks
186 * @adev: amdgpu device pointer
188 * Handles asic specific MSI checks to determine if
189 * MSIs should be enabled on a particular chip (all asics).
190 * Returns true if MSIs should be enabled, false if MSIs
191 * should not be enabled.
193 static bool amdgpu_msi_ok(struct amdgpu_device
*adev
)
198 else if (amdgpu_msi
== 0)
205 * amdgpu_irq_init - init driver interrupt info
207 * @adev: amdgpu device pointer
209 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
210 * Returns 0 for success, error for failure.
212 int amdgpu_irq_init(struct amdgpu_device
*adev
)
216 spin_lock_init(&adev
->irq
.lock
);
217 r
= drm_vblank_init(adev
->ddev
, adev
->mode_info
.num_crtc
);
222 adev
->irq
.msi_enabled
= false;
224 if (amdgpu_msi_ok(adev
)) {
225 int ret
= pci_enable_msi(adev
->pdev
);
227 adev
->irq
.msi_enabled
= true;
228 dev_info(adev
->dev
, "amdgpu: using MSI.\n");
232 INIT_WORK(&adev
->hotplug_work
, amdgpu_hotplug_work_func
);
233 INIT_WORK(&adev
->reset_work
, amdgpu_irq_reset_work_func
);
235 adev
->irq
.installed
= true;
236 r
= drm_irq_install(adev
->ddev
, adev
->ddev
->pdev
->irq
);
238 adev
->irq
.installed
= false;
239 flush_work(&adev
->hotplug_work
);
243 DRM_INFO("amdgpu: irq initialized.\n");
248 * amdgpu_irq_fini - tear down driver interrupt info
250 * @adev: amdgpu device pointer
252 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
254 void amdgpu_irq_fini(struct amdgpu_device
*adev
)
258 drm_vblank_cleanup(adev
->ddev
);
259 if (adev
->irq
.installed
) {
260 drm_irq_uninstall(adev
->ddev
);
261 adev
->irq
.installed
= false;
262 if (adev
->irq
.msi_enabled
)
263 pci_disable_msi(adev
->pdev
);
264 flush_work(&adev
->hotplug_work
);
267 for (i
= 0; i
< AMDGPU_MAX_IRQ_SRC_ID
; ++i
) {
268 struct amdgpu_irq_src
*src
= adev
->irq
.sources
[i
];
273 kfree(src
->enabled_types
);
274 src
->enabled_types
= NULL
;
279 * amdgpu_irq_add_id - register irq source
281 * @adev: amdgpu device pointer
282 * @src_id: source id for this source
283 * @source: irq source
286 int amdgpu_irq_add_id(struct amdgpu_device
*adev
, unsigned src_id
,
287 struct amdgpu_irq_src
*source
)
289 if (src_id
>= AMDGPU_MAX_IRQ_SRC_ID
)
292 if (adev
->irq
.sources
[src_id
] != NULL
)
298 if (source
->num_types
&& !source
->enabled_types
) {
301 types
= kcalloc(source
->num_types
, sizeof(atomic_t
),
306 source
->enabled_types
= types
;
309 adev
->irq
.sources
[src_id
] = source
;
314 * amdgpu_irq_dispatch - dispatch irq to IP blocks
316 * @adev: amdgpu device pointer
317 * @entry: interrupt vector
319 * Dispatches the irq to the different IP blocks
321 void amdgpu_irq_dispatch(struct amdgpu_device
*adev
,
322 struct amdgpu_iv_entry
*entry
)
324 unsigned src_id
= entry
->src_id
;
325 struct amdgpu_irq_src
*src
;
328 if (src_id
>= AMDGPU_MAX_IRQ_SRC_ID
) {
329 DRM_DEBUG("Invalid src_id in IV: %d\n", src_id
);
333 src
= adev
->irq
.sources
[src_id
];
335 DRM_DEBUG("Unhandled interrupt src_id: %d\n", src_id
);
339 r
= src
->funcs
->process(adev
, src
, entry
);
341 DRM_ERROR("error processing interrupt (%d)\n", r
);
345 * amdgpu_irq_update - update hw interrupt state
347 * @adev: amdgpu device pointer
348 * @src: interrupt src you want to enable
349 * @type: type of interrupt you want to update
351 * Updates the interrupt state for a specific src (all asics).
353 int amdgpu_irq_update(struct amdgpu_device
*adev
,
354 struct amdgpu_irq_src
*src
, unsigned type
)
356 unsigned long irqflags
;
357 enum amdgpu_interrupt_state state
;
360 spin_lock_irqsave(&adev
->irq
.lock
, irqflags
);
362 /* we need to determine after taking the lock, otherwise
363 we might disable just enabled interrupts again */
364 if (amdgpu_irq_enabled(adev
, src
, type
))
365 state
= AMDGPU_IRQ_STATE_ENABLE
;
367 state
= AMDGPU_IRQ_STATE_DISABLE
;
369 r
= src
->funcs
->set(adev
, src
, type
, state
);
370 spin_unlock_irqrestore(&adev
->irq
.lock
, irqflags
);
375 * amdgpu_irq_get - enable interrupt
377 * @adev: amdgpu device pointer
378 * @src: interrupt src you want to enable
379 * @type: type of interrupt you want to enable
381 * Enables the interrupt type for a specific src (all asics).
383 int amdgpu_irq_get(struct amdgpu_device
*adev
, struct amdgpu_irq_src
*src
,
386 if (!adev
->ddev
->irq_enabled
)
389 if (type
>= src
->num_types
)
392 if (!src
->enabled_types
|| !src
->funcs
->set
)
395 if (atomic_inc_return(&src
->enabled_types
[type
]) == 1)
396 return amdgpu_irq_update(adev
, src
, type
);
401 bool amdgpu_irq_get_delayed(struct amdgpu_device
*adev
,
402 struct amdgpu_irq_src
*src
,
405 if ((type
>= src
->num_types
) || !src
->enabled_types
)
407 return atomic_inc_return(&src
->enabled_types
[type
]) == 1;
411 * amdgpu_irq_put - disable interrupt
413 * @adev: amdgpu device pointer
414 * @src: interrupt src you want to disable
415 * @type: type of interrupt you want to disable
417 * Disables the interrupt type for a specific src (all asics).
419 int amdgpu_irq_put(struct amdgpu_device
*adev
, struct amdgpu_irq_src
*src
,
422 if (!adev
->ddev
->irq_enabled
)
425 if (type
>= src
->num_types
)
428 if (!src
->enabled_types
|| !src
->funcs
->set
)
431 if (atomic_dec_and_test(&src
->enabled_types
[type
]))
432 return amdgpu_irq_update(adev
, src
, type
);
438 * amdgpu_irq_enabled - test if irq is enabled or not
440 * @adev: amdgpu device pointer
441 * @idx: interrupt src you want to test
443 * Tests if the given interrupt source is enabled or not
445 bool amdgpu_irq_enabled(struct amdgpu_device
*adev
, struct amdgpu_irq_src
*src
,
448 if (!adev
->ddev
->irq_enabled
)
451 if (type
>= src
->num_types
)
454 if (!src
->enabled_types
|| !src
->funcs
->set
)
457 return !!atomic_read(&src
->enabled_types
[type
]);