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Linux 4.2.1
[linux/fpc-iii.git] / drivers / gpu / drm / i915 / intel_bios.c
blob198fc3c3291b2ac05540ea36ef853c9826b23efa
1 /*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27 #include <linux/dmi.h>
28 #include <drm/drm_dp_helper.h>
29 #include <drm/drmP.h>
30 #include <drm/i915_drm.h>
31 #include "i915_drv.h"
32 #include "intel_bios.h"
33
34 #define SLAVE_ADDR1 0x70
35 #define SLAVE_ADDR2 0x72
36
37 static int panel_type;
38
39 static const void *
40 find_section(const void *_bdb, int section_id)
41 {
42 const struct bdb_header *bdb = _bdb;
43 const u8 *base = _bdb;
44 int index = 0;
45 u16 total, current_size;
46 u8 current_id;
47
48 /* skip to first section */
49 index += bdb->header_size;
50 total = bdb->bdb_size;
51
52 /* walk the sections looking for section_id */
53 while (index + 3 < total) {
54 current_id = *(base + index);
55 index++;
56
57 current_size = *((const u16 *)(base + index));
58 index += 2;
59
60 if (index + current_size > total)
61 return NULL;
62
63 if (current_id == section_id)
64 return base + index;
65
66 index += current_size;
67 }
68
69 return NULL;
70 }
71
72 static u16
73 get_blocksize(const void *p)
74 {
75 u16 *block_ptr, block_size;
76
77 block_ptr = (u16 *)((char *)p - 2);
78 block_size = *block_ptr;
79 return block_size;
80 }
81
82 static void
83 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
84 const struct lvds_dvo_timing *dvo_timing)
85 {
86 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
87 dvo_timing->hactive_lo;
88 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
89 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
90 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
91 dvo_timing->hsync_pulse_width;
92 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
93 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
94
95 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
96 dvo_timing->vactive_lo;
97 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
98 dvo_timing->vsync_off;
99 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
100 dvo_timing->vsync_pulse_width;
101 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
102 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
103 panel_fixed_mode->clock = dvo_timing->clock * 10;
104 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
105
106 if (dvo_timing->hsync_positive)
107 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
108 else
109 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
110
111 if (dvo_timing->vsync_positive)
112 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
113 else
114 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
115
116 /* Some VBTs have bogus h/vtotal values */
117 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
118 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
119 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
120 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
121
122 drm_mode_set_name(panel_fixed_mode);
123 }
124
125 static bool
126 lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
127 const struct lvds_dvo_timing *b)
128 {
129 if (a->hactive_hi != b->hactive_hi ||
130 a->hactive_lo != b->hactive_lo)
131 return false;
132
133 if (a->hsync_off_hi != b->hsync_off_hi ||
134 a->hsync_off_lo != b->hsync_off_lo)
135 return false;
136
137 if (a->hsync_pulse_width != b->hsync_pulse_width)
138 return false;
139
140 if (a->hblank_hi != b->hblank_hi ||
141 a->hblank_lo != b->hblank_lo)
142 return false;
143
144 if (a->vactive_hi != b->vactive_hi ||
145 a->vactive_lo != b->vactive_lo)
146 return false;
147
148 if (a->vsync_off != b->vsync_off)
149 return false;
150
151 if (a->vsync_pulse_width != b->vsync_pulse_width)
152 return false;
153
154 if (a->vblank_hi != b->vblank_hi ||
155 a->vblank_lo != b->vblank_lo)
156 return false;
157
158 return true;
159 }
160
161 static const struct lvds_dvo_timing *
162 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
163 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
164 int index)
165 {
166 /*
167 * the size of fp_timing varies on the different platform.
168 * So calculate the DVO timing relative offset in LVDS data
169 * entry to get the DVO timing entry
170 */
171
172 int lfp_data_size =
173 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
175 int dvo_timing_offset =
176 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
177 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
178 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
179
180 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
181 }
182
183 /* get lvds_fp_timing entry
184 * this function may return NULL if the corresponding entry is invalid
185 */
186 static const struct lvds_fp_timing *
187 get_lvds_fp_timing(const struct bdb_header *bdb,
188 const struct bdb_lvds_lfp_data *data,
189 const struct bdb_lvds_lfp_data_ptrs *ptrs,
190 int index)
191 {
192 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
193 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
194 size_t ofs;
195
196 if (index >= ARRAY_SIZE(ptrs->ptr))
197 return NULL;
198 ofs = ptrs->ptr[index].fp_timing_offset;
199 if (ofs < data_ofs ||
200 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
201 return NULL;
202 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
203 }
204
205 /* Try to find integrated panel data */
206 static void
207 parse_lfp_panel_data(struct drm_i915_private *dev_priv,
208 const struct bdb_header *bdb)
209 {
210 const struct bdb_lvds_options *lvds_options;
211 const struct bdb_lvds_lfp_data *lvds_lfp_data;
212 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
213 const struct lvds_dvo_timing *panel_dvo_timing;
214 const struct lvds_fp_timing *fp_timing;
215 struct drm_display_mode *panel_fixed_mode;
216 int i, downclock, drrs_mode;
217
218 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
219 if (!lvds_options)
220 return;
221
222 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
223 if (lvds_options->panel_type == 0xff)
224 return;
225
226 panel_type = lvds_options->panel_type;
227
228 drrs_mode = (lvds_options->dps_panel_type_bits
229 >> (panel_type * 2)) & MODE_MASK;
230 /*
231 * VBT has static DRRS = 0 and seamless DRRS = 2.
232 * The below piece of code is required to adjust vbt.drrs_type
233 * to match the enum drrs_support_type.
234 */
235 switch (drrs_mode) {
236 case 0:
237 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
238 DRM_DEBUG_KMS("DRRS supported mode is static\n");
239 break;
240 case 2:
241 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
242 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
243 break;
244 default:
245 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
246 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
247 break;
248 }
249
250 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
251 if (!lvds_lfp_data)
252 return;
253
254 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
255 if (!lvds_lfp_data_ptrs)
256 return;
257
258 dev_priv->vbt.lvds_vbt = 1;
259
260 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
261 lvds_lfp_data_ptrs,
262 lvds_options->panel_type);
263
264 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
265 if (!panel_fixed_mode)
266 return;
267
268 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
269
270 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
271
272 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
273 drm_mode_debug_printmodeline(panel_fixed_mode);
274
275 /*
276 * Iterate over the LVDS panel timing info to find the lowest clock
277 * for the native resolution.
278 */
279 downclock = panel_dvo_timing->clock;
280 for (i = 0; i < 16; i++) {
281 const struct lvds_dvo_timing *dvo_timing;
282
283 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
284 lvds_lfp_data_ptrs,
285 i);
286 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
287 dvo_timing->clock < downclock)
288 downclock = dvo_timing->clock;
289 }
290
291 if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
292 dev_priv->lvds_downclock_avail = 1;
293 dev_priv->lvds_downclock = downclock * 10;
294 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
295 "Normal Clock %dKHz, downclock %dKHz\n",
296 panel_fixed_mode->clock, 10*downclock);
297 }
298
299 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
300 lvds_lfp_data_ptrs,
301 lvds_options->panel_type);
302 if (fp_timing) {
303 /* check the resolution, just to be sure */
304 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
305 fp_timing->y_res == panel_fixed_mode->vdisplay) {
306 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
307 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
308 dev_priv->vbt.bios_lvds_val);
309 }
310 }
311 }
312
313 static void
314 parse_lfp_backlight(struct drm_i915_private *dev_priv,
315 const struct bdb_header *bdb)
316 {
317 const struct bdb_lfp_backlight_data *backlight_data;
318 const struct bdb_lfp_backlight_data_entry *entry;
319
320 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
321 if (!backlight_data)
322 return;
323
324 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
325 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
326 backlight_data->entry_size);
327 return;
328 }
329
330 entry = &backlight_data->data[panel_type];
331
332 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
333 if (!dev_priv->vbt.backlight.present) {
334 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
335 entry->type);
336 return;
337 }
338
339 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
340 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
341 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
342 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
343 "active %s, min brightness %u, level %u\n",
344 dev_priv->vbt.backlight.pwm_freq_hz,
345 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
346 dev_priv->vbt.backlight.min_brightness,
347 backlight_data->level[panel_type]);
348 }
349
350 /* Try to find sdvo panel data */
351 static void
352 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
353 const struct bdb_header *bdb)
354 {
355 const struct lvds_dvo_timing *dvo_timing;
356 struct drm_display_mode *panel_fixed_mode;
357 int index;
358
359 index = i915.vbt_sdvo_panel_type;
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
365 if (index == -1) {
366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
380 if (!panel_fixed_mode)
381 return;
382
383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
384
385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
386
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
389 }
390
391 static int intel_bios_ssc_frequency(struct drm_device *dev,
392 bool alternate)
393 {
394 switch (INTEL_INFO(dev)->gen) {
395 case 2:
396 return alternate ? 66667 : 48000;
397 case 3:
398 case 4:
399 return alternate ? 100000 : 96000;
400 default:
401 return alternate ? 100000 : 120000;
402 }
403 }
404
405 static void
406 parse_general_features(struct drm_i915_private *dev_priv,
407 const struct bdb_header *bdb)
408 {
409 struct drm_device *dev = dev_priv->dev;
410 const struct bdb_general_features *general;
411
412 general = find_section(bdb, BDB_GENERAL_FEATURES);
413 if (general) {
414 dev_priv->vbt.int_tv_support = general->int_tv_support;
415 dev_priv->vbt.int_crt_support = general->int_crt_support;
416 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
417 dev_priv->vbt.lvds_ssc_freq =
418 intel_bios_ssc_frequency(dev, general->ssc_freq);
419 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
420 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
421 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
422 dev_priv->vbt.int_tv_support,
423 dev_priv->vbt.int_crt_support,
424 dev_priv->vbt.lvds_use_ssc,
425 dev_priv->vbt.lvds_ssc_freq,
426 dev_priv->vbt.display_clock_mode,
427 dev_priv->vbt.fdi_rx_polarity_inverted);
428 }
429 }
430
431 static void
432 parse_general_definitions(struct drm_i915_private *dev_priv,
433 const struct bdb_header *bdb)
434 {
435 const struct bdb_general_definitions *general;
436
437 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
438 if (general) {
439 u16 block_size = get_blocksize(general);
440 if (block_size >= sizeof(*general)) {
441 int bus_pin = general->crt_ddc_gmbus_pin;
442 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
443 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
444 dev_priv->vbt.crt_ddc_pin = bus_pin;
445 } else {
446 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
447 block_size);
448 }
449 }
450 }
451
452 static const union child_device_config *
453 child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
454 {
455 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
456 }
457
458 static void
459 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
460 const struct bdb_header *bdb)
461 {
462 struct sdvo_device_mapping *p_mapping;
463 const struct bdb_general_definitions *p_defs;
464 const union child_device_config *p_child;
465 int i, child_device_num, count;
466 u16 block_size;
467
468 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
469 if (!p_defs) {
470 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
471 return;
472 }
473 /* judge whether the size of child device meets the requirements.
474 * If the child device size obtained from general definition block
475 * is different with sizeof(struct child_device_config), skip the
476 * parsing of sdvo device info
477 */
478 if (p_defs->child_dev_size != sizeof(*p_child)) {
479 /* different child dev size . Ignore it */
480 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
481 return;
482 }
483 /* get the block size of general definitions */
484 block_size = get_blocksize(p_defs);
485 /* get the number of child device */
486 child_device_num = (block_size - sizeof(*p_defs)) /
487 p_defs->child_dev_size;
488 count = 0;
489 for (i = 0; i < child_device_num; i++) {
490 p_child = child_device_ptr(p_defs, i);
491 if (!p_child->old.device_type) {
492 /* skip the device block if device type is invalid */
493 continue;
494 }
495 if (p_child->old.slave_addr != SLAVE_ADDR1 &&
496 p_child->old.slave_addr != SLAVE_ADDR2) {
497 /*
498 * If the slave address is neither 0x70 nor 0x72,
499 * it is not a SDVO device. Skip it.
500 */
501 continue;
502 }
503 if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
504 p_child->old.dvo_port != DEVICE_PORT_DVOC) {
505 /* skip the incorrect SDVO port */
506 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
507 continue;
508 }
509 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
510 " %s port\n",
511 p_child->old.slave_addr,
512 (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
513 "SDVOB" : "SDVOC");
514 p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
515 if (!p_mapping->initialized) {
516 p_mapping->dvo_port = p_child->old.dvo_port;
517 p_mapping->slave_addr = p_child->old.slave_addr;
518 p_mapping->dvo_wiring = p_child->old.dvo_wiring;
519 p_mapping->ddc_pin = p_child->old.ddc_pin;
520 p_mapping->i2c_pin = p_child->old.i2c_pin;
521 p_mapping->initialized = 1;
522 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
523 p_mapping->dvo_port,
524 p_mapping->slave_addr,
525 p_mapping->dvo_wiring,
526 p_mapping->ddc_pin,
527 p_mapping->i2c_pin);
528 } else {
529 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
530 "two SDVO device.\n");
531 }
532 if (p_child->old.slave2_addr) {
533 /* Maybe this is a SDVO device with multiple inputs */
534 /* And the mapping info is not added */
535 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
536 " is a SDVO device with multiple inputs.\n");
537 }
538 count++;
539 }
540
541 if (!count) {
542 /* No SDVO device info is found */
543 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
544 }
545 return;
546 }
547
548 static void
549 parse_driver_features(struct drm_i915_private *dev_priv,
550 const struct bdb_header *bdb)
551 {
552 const struct bdb_driver_features *driver;
553
554 driver = find_section(bdb, BDB_DRIVER_FEATURES);
555 if (!driver)
556 return;
557
558 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
559 dev_priv->vbt.edp_support = 1;
560
561 if (driver->dual_frequency)
562 dev_priv->render_reclock_avail = true;
563
564 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
565 /*
566 * If DRRS is not supported, drrs_type has to be set to 0.
567 * This is because, VBT is configured in such a way that
568 * static DRRS is 0 and DRRS not supported is represented by
569 * driver->drrs_enabled=false
570 */
571 if (!driver->drrs_enabled)
572 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
573 }
574
575 static void
576 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
577 {
578 const struct bdb_edp *edp;
579 const struct edp_power_seq *edp_pps;
580 const struct edp_link_params *edp_link_params;
581
582 edp = find_section(bdb, BDB_EDP);
583 if (!edp) {
584 if (dev_priv->vbt.edp_support)
585 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
586 return;
587 }
588
589 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
590 case EDP_18BPP:
591 dev_priv->vbt.edp_bpp = 18;
592 break;
593 case EDP_24BPP:
594 dev_priv->vbt.edp_bpp = 24;
595 break;
596 case EDP_30BPP:
597 dev_priv->vbt.edp_bpp = 30;
598 break;
599 }
600
601 /* Get the eDP sequencing and link info */
602 edp_pps = &edp->power_seqs[panel_type];
603 edp_link_params = &edp->link_params[panel_type];
604
605 dev_priv->vbt.edp_pps = *edp_pps;
606
607 switch (edp_link_params->rate) {
608 case EDP_RATE_1_62:
609 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
610 break;
611 case EDP_RATE_2_7:
612 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
613 break;
614 default:
615 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
616 edp_link_params->rate);
617 break;
618 }
619
620 switch (edp_link_params->lanes) {
621 case EDP_LANE_1:
622 dev_priv->vbt.edp_lanes = 1;
623 break;
624 case EDP_LANE_2:
625 dev_priv->vbt.edp_lanes = 2;
626 break;
627 case EDP_LANE_4:
628 dev_priv->vbt.edp_lanes = 4;
629 break;
630 default:
631 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
632 edp_link_params->lanes);
633 break;
634 }
635
636 switch (edp_link_params->preemphasis) {
637 case EDP_PREEMPHASIS_NONE:
638 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
639 break;
640 case EDP_PREEMPHASIS_3_5dB:
641 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
642 break;
643 case EDP_PREEMPHASIS_6dB:
644 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
645 break;
646 case EDP_PREEMPHASIS_9_5dB:
647 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
648 break;
649 default:
650 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
651 edp_link_params->preemphasis);
652 break;
653 }
654
655 switch (edp_link_params->vswing) {
656 case EDP_VSWING_0_4V:
657 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
658 break;
659 case EDP_VSWING_0_6V:
660 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
661 break;
662 case EDP_VSWING_0_8V:
663 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
664 break;
665 case EDP_VSWING_1_2V:
666 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
667 break;
668 default:
669 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
670 edp_link_params->vswing);
671 break;
672 }
673
674 if (bdb->version >= 173) {
675 uint8_t vswing;
676
677 /* Don't read from VBT if module parameter has valid value*/
678 if (i915.edp_vswing) {
679 dev_priv->edp_low_vswing = i915.edp_vswing == 1;
680 } else {
681 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
682 dev_priv->edp_low_vswing = vswing == 0;
683 }
684 }
685 }
686
687 static void
688 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
689 {
690 const struct bdb_psr *psr;
691 const struct psr_table *psr_table;
692
693 psr = find_section(bdb, BDB_PSR);
694 if (!psr) {
695 DRM_DEBUG_KMS("No PSR BDB found.\n");
696 return;
697 }
698
699 psr_table = &psr->psr_table[panel_type];
700
701 dev_priv->vbt.psr.full_link = psr_table->full_link;
702 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
703
704 /* Allowed VBT values goes from 0 to 15 */
705 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
706 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
707
708 switch (psr_table->lines_to_wait) {
709 case 0:
710 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
711 break;
712 case 1:
713 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
714 break;
715 case 2:
716 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
717 break;
718 case 3:
719 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
720 break;
721 default:
722 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
723 psr_table->lines_to_wait);
724 break;
725 }
726
727 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
728 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
729 }
730
731 static u8 *goto_next_sequence(u8 *data, int *size)
732 {
733 u16 len;
734 int tmp = *size;
735
736 if (--tmp < 0)
737 return NULL;
738
739 /* goto first element */
740 data++;
741 while (1) {
742 switch (*data) {
743 case MIPI_SEQ_ELEM_SEND_PKT:
744 /*
745 * skip by this element payload size
746 * skip elem id, command flag and data type
747 */
748 tmp -= 5;
749 if (tmp < 0)
750 return NULL;
751
752 data += 3;
753 len = *((u16 *)data);
754
755 tmp -= len;
756 if (tmp < 0)
757 return NULL;
758
759 /* skip by len */
760 data = data + 2 + len;
761 break;
762 case MIPI_SEQ_ELEM_DELAY:
763 /* skip by elem id, and delay is 4 bytes */
764 tmp -= 5;
765 if (tmp < 0)
766 return NULL;
767
768 data += 5;
769 break;
770 case MIPI_SEQ_ELEM_GPIO:
771 tmp -= 3;
772 if (tmp < 0)
773 return NULL;
774
775 data += 3;
776 break;
777 default:
778 DRM_ERROR("Unknown element\n");
779 return NULL;
780 }
781
782 /* end of sequence ? */
783 if (*data == 0)
784 break;
785 }
786
787 /* goto next sequence or end of block byte */
788 if (--tmp < 0)
789 return NULL;
790
791 data++;
792
793 /* update amount of data left for the sequence block to be parsed */
794 *size = tmp;
795 return data;
796 }
797
798 static void
799 parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
800 {
801 const struct bdb_mipi_config *start;
802 const struct bdb_mipi_sequence *sequence;
803 const struct mipi_config *config;
804 const struct mipi_pps_data *pps;
805 u8 *data;
806 const u8 *seq_data;
807 int i, panel_id, seq_size;
808 u16 block_size;
809
810 /* parse MIPI blocks only if LFP type is MIPI */
811 if (!dev_priv->vbt.has_mipi)
812 return;
813
814 /* Initialize this to undefined indicating no generic MIPI support */
815 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
816
817 /* Block #40 is already parsed and panel_fixed_mode is
818 * stored in dev_priv->lfp_lvds_vbt_mode
819 * resuse this when needed
820 */
821
822 /* Parse #52 for panel index used from panel_type already
823 * parsed
824 */
825 start = find_section(bdb, BDB_MIPI_CONFIG);
826 if (!start) {
827 DRM_DEBUG_KMS("No MIPI config BDB found");
828 return;
829 }
830
831 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
832 panel_type);
833
834 /*
835 * get hold of the correct configuration block and pps data as per
836 * the panel_type as index
837 */
838 config = &start->config[panel_type];
839 pps = &start->pps[panel_type];
840
841 /* store as of now full data. Trim when we realise all is not needed */
842 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
843 if (!dev_priv->vbt.dsi.config)
844 return;
845
846 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
847 if (!dev_priv->vbt.dsi.pps) {
848 kfree(dev_priv->vbt.dsi.config);
849 return;
850 }
851
852 /* We have mandatory mipi config blocks. Initialize as generic panel */
853 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
854
855 /* Check if we have sequence block as well */
856 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
857 if (!sequence) {
858 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
859 return;
860 }
861
862 DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
863
864 block_size = get_blocksize(sequence);
865
866 /*
867 * parse the sequence block for individual sequences
868 */
869 dev_priv->vbt.dsi.seq_version = sequence->version;
870
871 seq_data = &sequence->data[0];
872
873 /*
874 * sequence block is variable length and hence we need to parse and
875 * get the sequence data for specific panel id
876 */
877 for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
878 panel_id = *seq_data;
879 seq_size = *((u16 *) (seq_data + 1));
880 if (panel_id == panel_type)
881 break;
882
883 /* skip the sequence including seq header of 3 bytes */
884 seq_data = seq_data + 3 + seq_size;
885 if ((seq_data - &sequence->data[0]) > block_size) {
886 DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
887 return;
888 }
889 }
890
891 if (i == MAX_MIPI_CONFIGURATIONS) {
892 DRM_ERROR("Sequence block detected but no valid configuration\n");
893 return;
894 }
895
896 /* check if found sequence is completely within the sequence block
897 * just being paranoid */
898 if (seq_size > block_size) {
899 DRM_ERROR("Corrupted sequence/size, bailing out\n");
900 return;
901 }
902
903 /* skip the panel id(1 byte) and seq size(2 bytes) */
904 dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
905 if (!dev_priv->vbt.dsi.data)
906 return;
907
908 /*
909 * loop into the sequence data and split into multiple sequneces
910 * There are only 5 types of sequences as of now
911 */
912 data = dev_priv->vbt.dsi.data;
913 dev_priv->vbt.dsi.size = seq_size;
914
915 /* two consecutive 0x00 indicate end of all sequences */
916 while (1) {
917 int seq_id = *data;
918 if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
919 dev_priv->vbt.dsi.sequence[seq_id] = data;
920 DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
921 } else {
922 DRM_ERROR("undefined sequence\n");
923 goto err;
924 }
925
926 /* partial parsing to skip elements */
927 data = goto_next_sequence(data, &seq_size);
928
929 if (data == NULL) {
930 DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
931 goto err;
932 }
933
934 if (*data == 0)
935 break; /* end of sequence reached */
936 }
937
938 DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
939 return;
940 err:
941 kfree(dev_priv->vbt.dsi.data);
942 dev_priv->vbt.dsi.data = NULL;
943
944 /* error during parsing so set all pointers to null
945 * because of partial parsing */
946 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
947 }
948
949 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
950 const struct bdb_header *bdb)
951 {
952 union child_device_config *it, *child = NULL;
953 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
954 uint8_t hdmi_level_shift;
955 int i, j;
956 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
957 uint8_t aux_channel;
958 /* Each DDI port can have more than one value on the "DVO Port" field,
959 * so look for all the possible values for each port and abort if more
960 * than one is found. */
961 int dvo_ports[][2] = {
962 {DVO_PORT_HDMIA, DVO_PORT_DPA},
963 {DVO_PORT_HDMIB, DVO_PORT_DPB},
964 {DVO_PORT_HDMIC, DVO_PORT_DPC},
965 {DVO_PORT_HDMID, DVO_PORT_DPD},
966 {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
967 };
968
969 /* Find the child device to use, abort if more than one found. */
970 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
971 it = dev_priv->vbt.child_dev + i;
972
973 for (j = 0; j < 2; j++) {
974 if (dvo_ports[port][j] == -1)
975 break;
976
977 if (it->common.dvo_port == dvo_ports[port][j]) {
978 if (child) {
979 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
980 port_name(port));
981 return;
982 }
983 child = it;
984 }
985 }
986 }
987 if (!child)
988 return;
989
990 aux_channel = child->raw[25];
991
992 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
993 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
994 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
995 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
996 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
997
998 info->supports_dvi = is_dvi;
999 info->supports_hdmi = is_hdmi;
1000 info->supports_dp = is_dp;
1001
1002 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1003 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1004
1005 if (is_edp && is_dvi)
1006 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1007 port_name(port));
1008 if (is_crt && port != PORT_E)
1009 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1010 if (is_crt && (is_dvi || is_dp))
1011 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1012 port_name(port));
1013 if (is_dvi && (port == PORT_A || port == PORT_E))
1014 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1015 if (!is_dvi && !is_dp && !is_crt)
1016 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1017 port_name(port));
1018 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1019 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1020
1021 if (is_dvi) {
1022 if (child->common.ddc_pin == 0x05 && port != PORT_B)
1023 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
1024 if (child->common.ddc_pin == 0x04 && port != PORT_C)
1025 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
1026 if (child->common.ddc_pin == 0x06 && port != PORT_D)
1027 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1028 }
1029
1030 if (is_dp) {
1031 if (aux_channel == 0x40 && port != PORT_A)
1032 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
1033 if (aux_channel == 0x10 && port != PORT_B)
1034 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
1035 if (aux_channel == 0x20 && port != PORT_C)
1036 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
1037 if (aux_channel == 0x30 && port != PORT_D)
1038 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1039 }
1040
1041 if (bdb->version >= 158) {
1042 /* The VBT HDMI level shift values match the table we have. */
1043 hdmi_level_shift = child->raw[7] & 0xF;
1044 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1045 port_name(port),
1046 hdmi_level_shift);
1047 info->hdmi_level_shift = hdmi_level_shift;
1048 }
1049 }
1050
1051 static void parse_ddi_ports(struct drm_i915_private *dev_priv,
1052 const struct bdb_header *bdb)
1053 {
1054 struct drm_device *dev = dev_priv->dev;
1055 enum port port;
1056
1057 if (!HAS_DDI(dev))
1058 return;
1059
1060 if (!dev_priv->vbt.child_dev_num)
1061 return;
1062
1063 if (bdb->version < 155)
1064 return;
1065
1066 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1067 parse_ddi_port(dev_priv, port, bdb);
1068 }
1069
1070 static void
1071 parse_device_mapping(struct drm_i915_private *dev_priv,
1072 const struct bdb_header *bdb)
1073 {
1074 const struct bdb_general_definitions *p_defs;
1075 const union child_device_config *p_child;
1076 union child_device_config *child_dev_ptr;
1077 int i, child_device_num, count;
1078 u16 block_size;
1079
1080 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1081 if (!p_defs) {
1082 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1083 return;
1084 }
1085 if (p_defs->child_dev_size < sizeof(*p_child)) {
1086 DRM_ERROR("General definiton block child device size is too small.\n");
1087 return;
1088 }
1089 /* get the block size of general definitions */
1090 block_size = get_blocksize(p_defs);
1091 /* get the number of child device */
1092 child_device_num = (block_size - sizeof(*p_defs)) /
1093 p_defs->child_dev_size;
1094 count = 0;
1095 /* get the number of child device that is present */
1096 for (i = 0; i < child_device_num; i++) {
1097 p_child = child_device_ptr(p_defs, i);
1098 if (!p_child->common.device_type) {
1099 /* skip the device block if device type is invalid */
1100 continue;
1101 }
1102 count++;
1103 }
1104 if (!count) {
1105 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1106 return;
1107 }
1108 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1109 if (!dev_priv->vbt.child_dev) {
1110 DRM_DEBUG_KMS("No memory space for child device\n");
1111 return;
1112 }
1113
1114 dev_priv->vbt.child_dev_num = count;
1115 count = 0;
1116 for (i = 0; i < child_device_num; i++) {
1117 p_child = child_device_ptr(p_defs, i);
1118 if (!p_child->common.device_type) {
1119 /* skip the device block if device type is invalid */
1120 continue;
1121 }
1122
1123 if (p_child->common.dvo_port >= DVO_PORT_MIPIA
1124 && p_child->common.dvo_port <= DVO_PORT_MIPID
1125 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
1126 DRM_DEBUG_KMS("Found MIPI as LFP\n");
1127 dev_priv->vbt.has_mipi = 1;
1128 dev_priv->vbt.dsi.port = p_child->common.dvo_port;
1129 }
1130
1131 child_dev_ptr = dev_priv->vbt.child_dev + count;
1132 count++;
1133 memcpy(child_dev_ptr, p_child, sizeof(*p_child));
1134 }
1135 return;
1136 }
1137
1138 static void
1139 init_vbt_defaults(struct drm_i915_private *dev_priv)
1140 {
1141 struct drm_device *dev = dev_priv->dev;
1142 enum port port;
1143
1144 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1145
1146 /* Default to having backlight */
1147 dev_priv->vbt.backlight.present = true;
1148
1149 /* LFP panel data */
1150 dev_priv->vbt.lvds_dither = 1;
1151 dev_priv->vbt.lvds_vbt = 0;
1152
1153 /* SDVO panel data */
1154 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1155
1156 /* general features */
1157 dev_priv->vbt.int_tv_support = 1;
1158 dev_priv->vbt.int_crt_support = 1;
1159
1160 /* Default to using SSC */
1161 dev_priv->vbt.lvds_use_ssc = 1;
1162 /*
1163 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1164 * clock for LVDS.
1165 */
1166 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
1167 !HAS_PCH_SPLIT(dev));
1168 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1169
1170 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1171 struct ddi_vbt_port_info *info =
1172 &dev_priv->vbt.ddi_port_info[port];
1173
1174 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1175
1176 info->supports_dvi = (port != PORT_A && port != PORT_E);
1177 info->supports_hdmi = info->supports_dvi;
1178 info->supports_dp = (port != PORT_E);
1179 }
1180 }
1181
1182 static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
1183 {
1184 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
1185 "VBIOS ROM for %s\n",
1186 id->ident);
1187 return 1;
1188 }
1189
1190 static const struct dmi_system_id intel_no_opregion_vbt[] = {
1191 {
1192 .callback = intel_no_opregion_vbt_callback,
1193 .ident = "ThinkCentre A57",
1194 .matches = {
1195 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1196 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
1197 },
1198 },
1199 { }
1200 };
1201
1202 static const struct bdb_header *validate_vbt(const void __iomem *_base,
1203 size_t size,
1204 const void __iomem *_vbt,
1205 const char *source)
1206 {
1207 /*
1208 * This is the one place where we explicitly discard the address space
1209 * (__iomem) of the BIOS/VBT. (And this will cause a sparse complaint.)
1210 * From now on everything is based on 'base', and treated as regular
1211 * memory.
1212 */
1213 const void *base = (const void *) _base;
1214 size_t offset = _vbt - _base;
1215 const struct vbt_header *vbt = base + offset;
1216 const struct bdb_header *bdb;
1217
1218 if (offset + sizeof(struct vbt_header) > size) {
1219 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1220 return NULL;
1221 }
1222
1223 if (memcmp(vbt->signature, "$VBT", 4)) {
1224 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1225 return NULL;
1226 }
1227
1228 offset += vbt->bdb_offset;
1229 if (offset + sizeof(struct bdb_header) > size) {
1230 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1231 return NULL;
1232 }
1233
1234 bdb = base + offset;
1235 if (offset + bdb->bdb_size > size) {
1236 DRM_DEBUG_DRIVER("BDB incomplete\n");
1237 return NULL;
1238 }
1239
1240 DRM_DEBUG_KMS("Using VBT from %s: %20s\n",
1241 source, vbt->signature);
1242 return bdb;
1243 }
1244
1245 static const struct bdb_header *find_vbt(void __iomem *bios, size_t size)
1246 {
1247 const struct bdb_header *bdb = NULL;
1248 size_t i;
1249
1250 /* Scour memory looking for the VBT signature. */
1251 for (i = 0; i + 4 < size; i++) {
1252 if (ioread32(bios + i) == *((const u32 *) "$VBT")) {
1253 bdb = validate_vbt(bios, size, bios + i, "PCI ROM");
1254 break;
1255 }
1256 }
1257
1258 return bdb;
1259 }
1260
1261 /**
1262 * intel_parse_bios - find VBT and initialize settings from the BIOS
1263 * @dev: DRM device
1264 *
1265 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1266 * to appropriate values.
1267 *
1268 * Returns 0 on success, nonzero on failure.
1269 */
1270 int
1271 intel_parse_bios(struct drm_device *dev)
1272 {
1273 struct drm_i915_private *dev_priv = dev->dev_private;
1274 struct pci_dev *pdev = dev->pdev;
1275 const struct bdb_header *bdb = NULL;
1276 u8 __iomem *bios = NULL;
1277
1278 if (HAS_PCH_NOP(dev))
1279 return -ENODEV;
1280
1281 init_vbt_defaults(dev_priv);
1282
1283 /* XXX Should this validation be moved to intel_opregion.c? */
1284 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
1285 bdb = validate_vbt(dev_priv->opregion.header, OPREGION_SIZE,
1286 dev_priv->opregion.vbt, "OpRegion");
1287
1288 if (bdb == NULL) {
1289 size_t size;
1290
1291 bios = pci_map_rom(pdev, &size);
1292 if (!bios)
1293 return -1;
1294
1295 bdb = find_vbt(bios, size);
1296 if (!bdb) {
1297 pci_unmap_rom(pdev, bios);
1298 return -1;
1299 }
1300 }
1301
1302 /* Grab useful general definitions */
1303 parse_general_features(dev_priv, bdb);
1304 parse_general_definitions(dev_priv, bdb);
1305 parse_lfp_panel_data(dev_priv, bdb);
1306 parse_lfp_backlight(dev_priv, bdb);
1307 parse_sdvo_panel_data(dev_priv, bdb);
1308 parse_sdvo_device_mapping(dev_priv, bdb);
1309 parse_device_mapping(dev_priv, bdb);
1310 parse_driver_features(dev_priv, bdb);
1311 parse_edp(dev_priv, bdb);
1312 parse_psr(dev_priv, bdb);
1313 parse_mipi(dev_priv, bdb);
1314 parse_ddi_ports(dev_priv, bdb);
1315
1316 if (bios)
1317 pci_unmap_rom(pdev, bios);
1318
1319 return 0;
1320 }
1321
1322 /* Ensure that vital registers have been initialised, even if the BIOS
1323 * is absent or just failing to do its job.
1324 */
1325 void intel_setup_bios(struct drm_device *dev)
1326 {
1327 struct drm_i915_private *dev_priv = dev->dev_private;
1328
1329 /* Set the Panel Power On/Off timings if uninitialized. */
1330 if (!HAS_PCH_SPLIT(dev) &&
1331 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
1332 /* Set T2 to 40ms and T5 to 200ms */
1333 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
1334
1335 /* Set T3 to 35ms and Tx to 200ms */
1336 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
1337 }
1338 }
Linux with added FPC-III support