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Linux 4.2.1
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nouveau_bios.c
blob0190b69bbe25fe099a33d515e7b7855b7f98aa03
1 /*
2 * Copyright 2005-2006 Erik Waling
3 * Copyright 2006 Stephane Marchesin
4 * Copyright 2007-2009 Stuart Bennett
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include <drm/drmP.h>
26
27 #include "nouveau_drm.h"
28 #include "nouveau_reg.h"
29 #include "dispnv04/hw.h"
30 #include "nouveau_encoder.h"
31
32 #include <linux/io-mapping.h>
33 #include <linux/firmware.h>
34
35 /* these defines are made up */
36 #define NV_CIO_CRE_44_HEADA 0x0
37 #define NV_CIO_CRE_44_HEADB 0x3
38 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */
39
40 #define EDID1_LEN 128
41
42 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
43 #define LOG_OLD_VALUE(x)
44
45 struct init_exec {
46 bool execute;
47 bool repeat;
48 };
49
50 static bool nv_cksum(const uint8_t *data, unsigned int length)
51 {
52 /*
53 * There's a few checksums in the BIOS, so here's a generic checking
54 * function.
55 */
56 int i;
57 uint8_t sum = 0;
58
59 for (i = 0; i < length; i++)
60 sum += data[i];
61
62 if (sum)
63 return true;
64
65 return false;
66 }
67
68 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
69 {
70 int compare_record_len, i = 0;
71 uint16_t compareclk, scriptptr = 0;
72
73 if (bios->major_version < 5) /* pre BIT */
74 compare_record_len = 3;
75 else
76 compare_record_len = 4;
77
78 do {
79 compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
80 if (pxclk >= compareclk * 10) {
81 if (bios->major_version < 5) {
82 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
83 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
84 } else
85 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
86 break;
87 }
88 i++;
89 } while (compareclk);
90
91 return scriptptr;
92 }
93
94 static void
95 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
96 struct dcb_output *dcbent, int head, bool dl)
97 {
98 struct nouveau_drm *drm = nouveau_drm(dev);
99
100 NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
101 scriptptr);
102 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :
103 NV_CIO_CRE_44_HEADA);
104 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);
105
106 nv04_dfp_bind_head(dev, dcbent, head, dl);
107 }
108
109 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
110 {
111 struct nouveau_drm *drm = nouveau_drm(dev);
112 struct nvbios *bios = &drm->vbios;
113 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
114 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
115
116 if (!bios->fp.xlated_entry || !sub || !scriptofs)
117 return -EINVAL;
118
119 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
120
121 if (script == LVDS_PANEL_OFF) {
122 /* off-on delay in ms */
123 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
124 }
125 #ifdef __powerpc__
126 /* Powerbook specific quirks */
127 if (script == LVDS_RESET &&
128 (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 ||
129 dev->pdev->device == 0x0329))
130 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
131 #endif
132
133 return 0;
134 }
135
136 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
137 {
138 /*
139 * The BIT LVDS table's header has the information to setup the
140 * necessary registers. Following the standard 4 byte header are:
141 * A bitmask byte and a dual-link transition pxclk value for use in
142 * selecting the init script when not using straps; 4 script pointers
143 * for panel power, selected by output and on/off; and 8 table pointers
144 * for panel init, the needed one determined by output, and bits in the
145 * conf byte. These tables are similar to the TMDS tables, consisting
146 * of a list of pxclks and script pointers.
147 */
148 struct nouveau_drm *drm = nouveau_drm(dev);
149 struct nvbios *bios = &drm->vbios;
150 unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
151 uint16_t scriptptr = 0, clktable;
152
153 /*
154 * For now we assume version 3.0 table - g80 support will need some
155 * changes
156 */
157
158 switch (script) {
159 case LVDS_INIT:
160 return -ENOSYS;
161 case LVDS_BACKLIGHT_ON:
162 case LVDS_PANEL_ON:
163 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
164 break;
165 case LVDS_BACKLIGHT_OFF:
166 case LVDS_PANEL_OFF:
167 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
168 break;
169 case LVDS_RESET:
170 clktable = bios->fp.lvdsmanufacturerpointer + 15;
171 if (dcbent->or == 4)
172 clktable += 8;
173
174 if (dcbent->lvdsconf.use_straps_for_mode) {
175 if (bios->fp.dual_link)
176 clktable += 4;
177 if (bios->fp.if_is_24bit)
178 clktable += 2;
179 } else {
180 /* using EDID */
181 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
182
183 if (bios->fp.dual_link) {
184 clktable += 4;
185 cmpval_24bit <<= 1;
186 }
187
188 if (bios->fp.strapless_is_24bit & cmpval_24bit)
189 clktable += 2;
190 }
191
192 clktable = ROM16(bios->data[clktable]);
193 if (!clktable) {
194 NV_ERROR(drm, "Pixel clock comparison table not found\n");
195 return -ENOENT;
196 }
197 scriptptr = clkcmptable(bios, clktable, pxclk);
198 }
199
200 if (!scriptptr) {
201 NV_ERROR(drm, "LVDS output init script not found\n");
202 return -ENOENT;
203 }
204 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
205
206 return 0;
207 }
208
209 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
210 {
211 /*
212 * LVDS operations are multiplexed in an effort to present a single API
213 * which works with two vastly differing underlying structures.
214 * This acts as the demux
215 */
216
217 struct nouveau_drm *drm = nouveau_drm(dev);
218 struct nvif_device *device = &drm->device;
219 struct nvbios *bios = &drm->vbios;
220 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
221 uint32_t sel_clk_binding, sel_clk;
222 int ret;
223
224 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
225 (lvds_ver >= 0x30 && script == LVDS_INIT))
226 return 0;
227
228 if (!bios->fp.lvds_init_run) {
229 bios->fp.lvds_init_run = true;
230 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
231 }
232
233 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
234 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
235 if (script == LVDS_RESET && bios->fp.power_off_for_reset)
236 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
237
238 NV_INFO(drm, "Calling LVDS script %d:\n", script);
239
240 /* don't let script change pll->head binding */
241 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
242
243 if (lvds_ver < 0x30)
244 ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
245 else
246 ret = run_lvds_table(dev, dcbent, head, script, pxclk);
247
248 bios->fp.last_script_invoc = (script << 1 | head);
249
250 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
251 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
252 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */
253 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
254
255 return ret;
256 }
257
258 struct lvdstableheader {
259 uint8_t lvds_ver, headerlen, recordlen;
260 };
261
262 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
263 {
264 /*
265 * BMP version (0xa) LVDS table has a simple header of version and
266 * record length. The BIT LVDS table has the typical BIT table header:
267 * version byte, header length byte, record length byte, and a byte for
268 * the maximum number of records that can be held in the table.
269 */
270
271 struct nouveau_drm *drm = nouveau_drm(dev);
272 uint8_t lvds_ver, headerlen, recordlen;
273
274 memset(lth, 0, sizeof(struct lvdstableheader));
275
276 if (bios->fp.lvdsmanufacturerpointer == 0x0) {
277 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
278 return -EINVAL;
279 }
280
281 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
282
283 switch (lvds_ver) {
284 case 0x0a: /* pre NV40 */
285 headerlen = 2;
286 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
287 break;
288 case 0x30: /* NV4x */
289 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
290 if (headerlen < 0x1f) {
291 NV_ERROR(drm, "LVDS table header not understood\n");
292 return -EINVAL;
293 }
294 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
295 break;
296 case 0x40: /* G80/G90 */
297 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
298 if (headerlen < 0x7) {
299 NV_ERROR(drm, "LVDS table header not understood\n");
300 return -EINVAL;
301 }
302 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
303 break;
304 default:
305 NV_ERROR(drm,
306 "LVDS table revision %d.%d not currently supported\n",
307 lvds_ver >> 4, lvds_ver & 0xf);
308 return -ENOSYS;
309 }
310
311 lth->lvds_ver = lvds_ver;
312 lth->headerlen = headerlen;
313 lth->recordlen = recordlen;
314
315 return 0;
316 }
317
318 static int
319 get_fp_strap(struct drm_device *dev, struct nvbios *bios)
320 {
321 struct nvif_device *device = &nouveau_drm(dev)->device;
322
323 /*
324 * The fp strap is normally dictated by the "User Strap" in
325 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the
326 * Internal_Flags struct at 0x48 is set, the user strap gets overriden
327 * by the PCI subsystem ID during POST, but not before the previous user
328 * strap has been committed to CR58 for CR57=0xf on head A, which may be
329 * read and used instead
330 */
331
332 if (bios->major_version < 5 && bios->data[0x48] & 0x4)
333 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
334
335 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA)
336 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
337 else
338 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
339 }
340
341 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
342 {
343 struct nouveau_drm *drm = nouveau_drm(dev);
344 uint8_t *fptable;
345 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
346 int ret, ofs, fpstrapping;
347 struct lvdstableheader lth;
348
349 if (bios->fp.fptablepointer == 0x0) {
350 /* Apple cards don't have the fp table; the laptops use DDC */
351 /* The table is also missing on some x86 IGPs */
352 #ifndef __powerpc__
353 NV_ERROR(drm, "Pointer to flat panel table invalid\n");
354 #endif
355 bios->digital_min_front_porch = 0x4b;
356 return 0;
357 }
358
359 fptable = &bios->data[bios->fp.fptablepointer];
360 fptable_ver = fptable[0];
361
362 switch (fptable_ver) {
363 /*
364 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no
365 * version field, and miss one of the spread spectrum/PWM bytes.
366 * This could affect early GF2Go parts (not seen any appropriate ROMs
367 * though). Here we assume that a version of 0x05 matches this case
368 * (combining with a BMP version check would be better), as the
369 * common case for the panel type field is 0x0005, and that is in
370 * fact what we are reading the first byte of.
371 */
372 case 0x05: /* some NV10, 11, 15, 16 */
373 recordlen = 42;
374 ofs = -1;
375 break;
376 case 0x10: /* some NV15/16, and NV11+ */
377 recordlen = 44;
378 ofs = 0;
379 break;
380 case 0x20: /* NV40+ */
381 headerlen = fptable[1];
382 recordlen = fptable[2];
383 fpentries = fptable[3];
384 /*
385 * fptable[4] is the minimum
386 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap
387 */
388 bios->digital_min_front_porch = fptable[4];
389 ofs = -7;
390 break;
391 default:
392 NV_ERROR(drm,
393 "FP table revision %d.%d not currently supported\n",
394 fptable_ver >> 4, fptable_ver & 0xf);
395 return -ENOSYS;
396 }
397
398 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */
399 return 0;
400
401 ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
402 if (ret)
403 return ret;
404
405 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
406 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
407 lth.headerlen + 1;
408 bios->fp.xlatwidth = lth.recordlen;
409 }
410 if (bios->fp.fpxlatetableptr == 0x0) {
411 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
412 return -EINVAL;
413 }
414
415 fpstrapping = get_fp_strap(dev, bios);
416
417 fpindex = bios->data[bios->fp.fpxlatetableptr +
418 fpstrapping * bios->fp.xlatwidth];
419
420 if (fpindex > fpentries) {
421 NV_ERROR(drm, "Bad flat panel table index\n");
422 return -ENOENT;
423 }
424
425 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
426 if (lth.lvds_ver > 0x10)
427 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
428
429 /*
430 * If either the strap or xlated fpindex value are 0xf there is no
431 * panel using a strap-derived bios mode present. this condition
432 * includes, but is different from, the DDC panel indicator above
433 */
434 if (fpstrapping == 0xf || fpindex == 0xf)
435 return 0;
436
437 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
438 recordlen * fpindex + ofs;
439
440 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
441 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
442 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
443 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
444
445 return 0;
446 }
447
448 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
449 {
450 struct nouveau_drm *drm = nouveau_drm(dev);
451 struct nvbios *bios = &drm->vbios;
452 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
453
454 if (!mode) /* just checking whether we can produce a mode */
455 return bios->fp.mode_ptr;
456
457 memset(mode, 0, sizeof(struct drm_display_mode));
458 /*
459 * For version 1.0 (version in byte 0):
460 * bytes 1-2 are "panel type", including bits on whether Colour/mono,
461 * single/dual link, and type (TFT etc.)
462 * bytes 3-6 are bits per colour in RGBX
463 */
464 mode->clock = ROM16(mode_entry[7]) * 10;
465 /* bytes 9-10 is HActive */
466 mode->hdisplay = ROM16(mode_entry[11]) + 1;
467 /*
468 * bytes 13-14 is HValid Start
469 * bytes 15-16 is HValid End
470 */
471 mode->hsync_start = ROM16(mode_entry[17]) + 1;
472 mode->hsync_end = ROM16(mode_entry[19]) + 1;
473 mode->htotal = ROM16(mode_entry[21]) + 1;
474 /* bytes 23-24, 27-30 similarly, but vertical */
475 mode->vdisplay = ROM16(mode_entry[25]) + 1;
476 mode->vsync_start = ROM16(mode_entry[31]) + 1;
477 mode->vsync_end = ROM16(mode_entry[33]) + 1;
478 mode->vtotal = ROM16(mode_entry[35]) + 1;
479 mode->flags |= (mode_entry[37] & 0x10) ?
480 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
481 mode->flags |= (mode_entry[37] & 0x1) ?
482 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
483 /*
484 * bytes 38-39 relate to spread spectrum settings
485 * bytes 40-43 are something to do with PWM
486 */
487
488 mode->status = MODE_OK;
489 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
490 drm_mode_set_name(mode);
491 return bios->fp.mode_ptr;
492 }
493
494 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
495 {
496 /*
497 * The LVDS table header is (mostly) described in
498 * parse_lvds_manufacturer_table_header(): the BIT header additionally
499 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if
500 * straps are not being used for the panel, this specifies the frequency
501 * at which modes should be set up in the dual link style.
502 *
503 * Following the header, the BMP (ver 0xa) table has several records,
504 * indexed by a separate xlat table, indexed in turn by the fp strap in
505 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
506 * numbers for use by INIT_SUB which controlled panel init and power,
507 * and finally a dword of ms to sleep between power off and on
508 * operations.
509 *
510 * In the BIT versions, the table following the header serves as an
511 * integrated config and xlat table: the records in the table are
512 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has
513 * two bytes - the first as a config byte, the second for indexing the
514 * fp mode table pointed to by the BIT 'D' table
515 *
516 * DDC is not used until after card init, so selecting the correct table
517 * entry and setting the dual link flag for EDID equipped panels,
518 * requiring tests against the native-mode pixel clock, cannot be done
519 * until later, when this function should be called with non-zero pxclk
520 */
521 struct nouveau_drm *drm = nouveau_drm(dev);
522 struct nvbios *bios = &drm->vbios;
523 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
524 struct lvdstableheader lth;
525 uint16_t lvdsofs;
526 int ret, chip_version = bios->chip_version;
527
528 ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
529 if (ret)
530 return ret;
531
532 switch (lth.lvds_ver) {
533 case 0x0a: /* pre NV40 */
534 lvdsmanufacturerindex = bios->data[
535 bios->fp.fpxlatemanufacturertableptr +
536 fpstrapping];
537
538 /* we're done if this isn't the EDID panel case */
539 if (!pxclk)
540 break;
541
542 if (chip_version < 0x25) {
543 /* nv17 behaviour
544 *
545 * It seems the old style lvds script pointer is reused
546 * to select 18/24 bit colour depth for EDID panels.
547 */
548 lvdsmanufacturerindex =
549 (bios->legacy.lvds_single_a_script_ptr & 1) ?
550 2 : 0;
551 if (pxclk >= bios->fp.duallink_transition_clk)
552 lvdsmanufacturerindex++;
553 } else if (chip_version < 0x30) {
554 /* nv28 behaviour (off-chip encoder)
555 *
556 * nv28 does a complex dance of first using byte 121 of
557 * the EDID to choose the lvdsmanufacturerindex, then
558 * later attempting to match the EDID manufacturer and
559 * product IDs in a table (signature 'pidt' (panel id
560 * table?)), setting an lvdsmanufacturerindex of 0 and
561 * an fp strap of the match index (or 0xf if none)
562 */
563 lvdsmanufacturerindex = 0;
564 } else {
565 /* nv31, nv34 behaviour */
566 lvdsmanufacturerindex = 0;
567 if (pxclk >= bios->fp.duallink_transition_clk)
568 lvdsmanufacturerindex = 2;
569 if (pxclk >= 140000)
570 lvdsmanufacturerindex = 3;
571 }
572
573 /*
574 * nvidia set the high nibble of (cr57=f, cr58) to
575 * lvdsmanufacturerindex in this case; we don't
576 */
577 break;
578 case 0x30: /* NV4x */
579 case 0x40: /* G80/G90 */
580 lvdsmanufacturerindex = fpstrapping;
581 break;
582 default:
583 NV_ERROR(drm, "LVDS table revision not currently supported\n");
584 return -ENOSYS;
585 }
586
587 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
588 switch (lth.lvds_ver) {
589 case 0x0a:
590 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
591 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
592 bios->fp.dual_link = bios->data[lvdsofs] & 4;
593 bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
594 *if_is_24bit = bios->data[lvdsofs] & 16;
595 break;
596 case 0x30:
597 case 0x40:
598 /*
599 * No sign of the "power off for reset" or "reset for panel
600 * on" bits, but it's safer to assume we should
601 */
602 bios->fp.power_off_for_reset = true;
603 bios->fp.reset_after_pclk_change = true;
604
605 /*
606 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is
607 * over-written, and if_is_24bit isn't used
608 */
609 bios->fp.dual_link = bios->data[lvdsofs] & 1;
610 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
611 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
612 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
613 break;
614 }
615
616 /* set dual_link flag for EDID case */
617 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
618 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
619
620 *dl = bios->fp.dual_link;
621
622 return 0;
623 }
624
625 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
626 {
627 /*
628 * the pxclk parameter is in kHz
629 *
630 * This runs the TMDS regs setting code found on BIT bios cards
631 *
632 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and
633 * ffs(or) == 3, use the second.
634 */
635
636 struct nouveau_drm *drm = nouveau_drm(dev);
637 struct nvif_device *device = &drm->device;
638 struct nvbios *bios = &drm->vbios;
639 int cv = bios->chip_version;
640 uint16_t clktable = 0, scriptptr;
641 uint32_t sel_clk_binding, sel_clk;
642
643 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */
644 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
645 dcbent->location != DCB_LOC_ON_CHIP)
646 return 0;
647
648 switch (ffs(dcbent->or)) {
649 case 1:
650 clktable = bios->tmds.output0_script_ptr;
651 break;
652 case 2:
653 case 3:
654 clktable = bios->tmds.output1_script_ptr;
655 break;
656 }
657
658 if (!clktable) {
659 NV_ERROR(drm, "Pixel clock comparison table not found\n");
660 return -EINVAL;
661 }
662
663 scriptptr = clkcmptable(bios, clktable, pxclk);
664
665 if (!scriptptr) {
666 NV_ERROR(drm, "TMDS output init script not found\n");
667 return -ENOENT;
668 }
669
670 /* don't let script change pll->head binding */
671 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
672 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
673 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
674 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
675
676 return 0;
677 }
678
679 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
680 {
681 /*
682 * Parses the init table segment for pointers used in script execution.
683 *
684 * offset + 0 (16 bits): init script tables pointer
685 * offset + 2 (16 bits): macro index table pointer
686 * offset + 4 (16 bits): macro table pointer
687 * offset + 6 (16 bits): condition table pointer
688 * offset + 8 (16 bits): io condition table pointer
689 * offset + 10 (16 bits): io flag condition table pointer
690 * offset + 12 (16 bits): init function table pointer
691 */
692
693 bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
694 }
695
696 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
697 {
698 /*
699 * Parses the load detect values for g80 cards.
700 *
701 * offset + 0 (16 bits): loadval table pointer
702 */
703
704 struct nouveau_drm *drm = nouveau_drm(dev);
705 uint16_t load_table_ptr;
706 uint8_t version, headerlen, entrylen, num_entries;
707
708 if (bitentry->length != 3) {
709 NV_ERROR(drm, "Do not understand BIT A table\n");
710 return -EINVAL;
711 }
712
713 load_table_ptr = ROM16(bios->data[bitentry->offset]);
714
715 if (load_table_ptr == 0x0) {
716 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
717 return -EINVAL;
718 }
719
720 version = bios->data[load_table_ptr];
721
722 if (version != 0x10) {
723 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
724 version >> 4, version & 0xF);
725 return -ENOSYS;
726 }
727
728 headerlen = bios->data[load_table_ptr + 1];
729 entrylen = bios->data[load_table_ptr + 2];
730 num_entries = bios->data[load_table_ptr + 3];
731
732 if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
733 NV_ERROR(drm, "Do not understand BIT loadval table\n");
734 return -EINVAL;
735 }
736
737 /* First entry is normal dac, 2nd tv-out perhaps? */
738 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
739
740 return 0;
741 }
742
743 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
744 {
745 /*
746 * Parses the flat panel table segment that the bit entry points to.
747 * Starting at bitentry->offset:
748 *
749 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte
750 * records beginning with a freq.
751 * offset + 2 (16 bits): mode table pointer
752 */
753 struct nouveau_drm *drm = nouveau_drm(dev);
754
755 if (bitentry->length != 4) {
756 NV_ERROR(drm, "Do not understand BIT display table\n");
757 return -EINVAL;
758 }
759
760 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
761
762 return 0;
763 }
764
765 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
766 {
767 /*
768 * Parses the init table segment that the bit entry points to.
769 *
770 * See parse_script_table_pointers for layout
771 */
772 struct nouveau_drm *drm = nouveau_drm(dev);
773
774 if (bitentry->length < 14) {
775 NV_ERROR(drm, "Do not understand init table\n");
776 return -EINVAL;
777 }
778
779 parse_script_table_pointers(bios, bitentry->offset);
780 return 0;
781 }
782
783 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
784 {
785 /*
786 * BIT 'i' (info?) table
787 *
788 * offset + 0 (32 bits): BIOS version dword (as in B table)
789 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?)
790 * offset + 13 (16 bits): pointer to table containing DAC load
791 * detection comparison values
792 *
793 * There's other things in the table, purpose unknown
794 */
795
796 struct nouveau_drm *drm = nouveau_drm(dev);
797 uint16_t daccmpoffset;
798 uint8_t dacver, dacheaderlen;
799
800 if (bitentry->length < 6) {
801 NV_ERROR(drm, "BIT i table too short for needed information\n");
802 return -EINVAL;
803 }
804
805 /*
806 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's
807 * Quadro identity crisis), other bits possibly as for BMP feature byte
808 */
809 bios->feature_byte = bios->data[bitentry->offset + 5];
810 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
811
812 if (bitentry->length < 15) {
813 NV_WARN(drm, "BIT i table not long enough for DAC load "
814 "detection comparison table\n");
815 return -EINVAL;
816 }
817
818 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
819
820 /* doesn't exist on g80 */
821 if (!daccmpoffset)
822 return 0;
823
824 /*
825 * The first value in the table, following the header, is the
826 * comparison value, the second entry is a comparison value for
827 * TV load detection.
828 */
829
830 dacver = bios->data[daccmpoffset];
831 dacheaderlen = bios->data[daccmpoffset + 1];
832
833 if (dacver != 0x00 && dacver != 0x10) {
834 NV_WARN(drm, "DAC load detection comparison table version "
835 "%d.%d not known\n", dacver >> 4, dacver & 0xf);
836 return -ENOSYS;
837 }
838
839 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
840 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
841
842 return 0;
843 }
844
845 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
846 {
847 /*
848 * Parses the LVDS table segment that the bit entry points to.
849 * Starting at bitentry->offset:
850 *
851 * offset + 0 (16 bits): LVDS strap xlate table pointer
852 */
853
854 struct nouveau_drm *drm = nouveau_drm(dev);
855
856 if (bitentry->length != 2) {
857 NV_ERROR(drm, "Do not understand BIT LVDS table\n");
858 return -EINVAL;
859 }
860
861 /*
862 * No idea if it's still called the LVDS manufacturer table, but
863 * the concept's close enough.
864 */
865 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
866
867 return 0;
868 }
869
870 static int
871 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
872 struct bit_entry *bitentry)
873 {
874 /*
875 * offset + 2 (8 bits): number of options in an
876 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set
877 * offset + 3 (16 bits): pointer to strap xlate table for RAM
878 * restrict option selection
879 *
880 * There's a bunch of bits in this table other than the RAM restrict
881 * stuff that we don't use - their use currently unknown
882 */
883
884 /*
885 * Older bios versions don't have a sufficiently long table for
886 * what we want
887 */
888 if (bitentry->length < 0x5)
889 return 0;
890
891 if (bitentry->version < 2) {
892 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
893 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
894 } else {
895 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
896 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
897 }
898
899 return 0;
900 }
901
902 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
903 {
904 /*
905 * Parses the pointer to the TMDS table
906 *
907 * Starting at bitentry->offset:
908 *
909 * offset + 0 (16 bits): TMDS table pointer
910 *
911 * The TMDS table is typically found just before the DCB table, with a
912 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being
913 * length?)
914 *
915 * At offset +7 is a pointer to a script, which I don't know how to
916 * run yet.
917 * At offset +9 is a pointer to another script, likewise
918 * Offset +11 has a pointer to a table where the first word is a pxclk
919 * frequency and the second word a pointer to a script, which should be
920 * run if the comparison pxclk frequency is less than the pxclk desired.
921 * This repeats for decreasing comparison frequencies
922 * Offset +13 has a pointer to a similar table
923 * The selection of table (and possibly +7/+9 script) is dictated by
924 * "or" from the DCB.
925 */
926
927 struct nouveau_drm *drm = nouveau_drm(dev);
928 uint16_t tmdstableptr, script1, script2;
929
930 if (bitentry->length != 2) {
931 NV_ERROR(drm, "Do not understand BIT TMDS table\n");
932 return -EINVAL;
933 }
934
935 tmdstableptr = ROM16(bios->data[bitentry->offset]);
936 if (!tmdstableptr) {
937 NV_ERROR(drm, "Pointer to TMDS table invalid\n");
938 return -EINVAL;
939 }
940
941 NV_INFO(drm, "TMDS table version %d.%d\n",
942 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
943
944 /* nv50+ has v2.0, but we don't parse it atm */
945 if (bios->data[tmdstableptr] != 0x11)
946 return -ENOSYS;
947
948 /*
949 * These two scripts are odd: they don't seem to get run even when
950 * they are not stubbed.
951 */
952 script1 = ROM16(bios->data[tmdstableptr + 7]);
953 script2 = ROM16(bios->data[tmdstableptr + 9]);
954 if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
955 NV_WARN(drm, "TMDS table script pointers not stubbed\n");
956
957 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
958 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
959
960 return 0;
961 }
962
963 struct bit_table {
964 const char id;
965 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
966 };
967
968 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
969
970 int
971 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
972 {
973 struct nouveau_drm *drm = nouveau_drm(dev);
974 struct nvbios *bios = &drm->vbios;
975 u8 entries, *entry;
976
977 if (bios->type != NVBIOS_BIT)
978 return -ENODEV;
979
980 entries = bios->data[bios->offset + 10];
981 entry = &bios->data[bios->offset + 12];
982 while (entries--) {
983 if (entry[0] == id) {
984 bit->id = entry[0];
985 bit->version = entry[1];
986 bit->length = ROM16(entry[2]);
987 bit->offset = ROM16(entry[4]);
988 bit->data = ROMPTR(dev, entry[4]);
989 return 0;
990 }
991
992 entry += bios->data[bios->offset + 9];
993 }
994
995 return -ENOENT;
996 }
997
998 static int
999 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
1000 struct bit_table *table)
1001 {
1002 struct drm_device *dev = bios->dev;
1003 struct nouveau_drm *drm = nouveau_drm(dev);
1004 struct bit_entry bitentry;
1005
1006 if (bit_table(dev, table->id, &bitentry) == 0)
1007 return table->parse_fn(dev, bios, &bitentry);
1008
1009 NV_INFO(drm, "BIT table '%c' not found\n", table->id);
1010 return -ENOSYS;
1011 }
1012
1013 static int
1014 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
1015 {
1016 int ret;
1017
1018 /*
1019 * The only restriction on parsing order currently is having 'i' first
1020 * for use of bios->*_version or bios->feature_byte while parsing;
1021 * functions shouldn't be actually *doing* anything apart from pulling
1022 * data from the image into the bios struct, thus no interdependencies
1023 */
1024 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
1025 if (ret) /* info? */
1026 return ret;
1027 if (bios->major_version >= 0x60) /* g80+ */
1028 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
1029 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
1030 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
1031 if (ret)
1032 return ret;
1033 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */
1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
1035 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
1036
1037 return 0;
1038 }
1039
1040 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
1041 {
1042 /*
1043 * Parses the BMP structure for useful things, but does not act on them
1044 *
1045 * offset + 5: BMP major version
1046 * offset + 6: BMP minor version
1047 * offset + 9: BMP feature byte
1048 * offset + 10: BCD encoded BIOS version
1049 *
1050 * offset + 18: init script table pointer (for bios versions < 5.10h)
1051 * offset + 20: extra init script table pointer (for bios
1052 * versions < 5.10h)
1053 *
1054 * offset + 24: memory init table pointer (used on early bios versions)
1055 * offset + 26: SDR memory sequencing setup data table
1056 * offset + 28: DDR memory sequencing setup data table
1057 *
1058 * offset + 54: index of I2C CRTC pair to use for CRT output
1059 * offset + 55: index of I2C CRTC pair to use for TV output
1060 * offset + 56: index of I2C CRTC pair to use for flat panel output
1061 * offset + 58: write CRTC index for I2C pair 0
1062 * offset + 59: read CRTC index for I2C pair 0
1063 * offset + 60: write CRTC index for I2C pair 1
1064 * offset + 61: read CRTC index for I2C pair 1
1065 *
1066 * offset + 67: maximum internal PLL frequency (single stage PLL)
1067 * offset + 71: minimum internal PLL frequency (single stage PLL)
1068 *
1069 * offset + 75: script table pointers, as described in
1070 * parse_script_table_pointers
1071 *
1072 * offset + 89: TMDS single link output A table pointer
1073 * offset + 91: TMDS single link output B table pointer
1074 * offset + 95: LVDS single link output A table pointer
1075 * offset + 105: flat panel timings table pointer
1076 * offset + 107: flat panel strapping translation table pointer
1077 * offset + 117: LVDS manufacturer panel config table pointer
1078 * offset + 119: LVDS manufacturer strapping translation table pointer
1079 *
1080 * offset + 142: PLL limits table pointer
1081 *
1082 * offset + 156: minimum pixel clock for LVDS dual link
1083 */
1084
1085 struct nouveau_drm *drm = nouveau_drm(dev);
1086 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
1087 uint16_t bmplength;
1088 uint16_t legacy_scripts_offset, legacy_i2c_offset;
1089
1090 /* load needed defaults in case we can't parse this info */
1091 bios->digital_min_front_porch = 0x4b;
1092 bios->fmaxvco = 256000;
1093 bios->fminvco = 128000;
1094 bios->fp.duallink_transition_clk = 90000;
1095
1096 bmp_version_major = bmp[5];
1097 bmp_version_minor = bmp[6];
1098
1099 NV_INFO(drm, "BMP version %d.%d\n",
1100 bmp_version_major, bmp_version_minor);
1101
1102 /*
1103 * Make sure that 0x36 is blank and can't be mistaken for a DCB
1104 * pointer on early versions
1105 */
1106 if (bmp_version_major < 5)
1107 *(uint16_t *)&bios->data[0x36] = 0;
1108
1109 /*
1110 * Seems that the minor version was 1 for all major versions prior
1111 * to 5. Version 6 could theoretically exist, but I suspect BIT
1112 * happened instead.
1113 */
1114 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
1115 NV_ERROR(drm, "You have an unsupported BMP version. "
1116 "Please send in your bios\n");
1117 return -ENOSYS;
1118 }
1119
1120 if (bmp_version_major == 0)
1121 /* nothing that's currently useful in this version */
1122 return 0;
1123 else if (bmp_version_major == 1)
1124 bmplength = 44; /* exact for 1.01 */
1125 else if (bmp_version_major == 2)
1126 bmplength = 48; /* exact for 2.01 */
1127 else if (bmp_version_major == 3)
1128 bmplength = 54;
1129 /* guessed - mem init tables added in this version */
1130 else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
1131 /* don't know if 5.0 exists... */
1132 bmplength = 62;
1133 /* guessed - BMP I2C indices added in version 4*/
1134 else if (bmp_version_minor < 0x6)
1135 bmplength = 67; /* exact for 5.01 */
1136 else if (bmp_version_minor < 0x10)
1137 bmplength = 75; /* exact for 5.06 */
1138 else if (bmp_version_minor == 0x10)
1139 bmplength = 89; /* exact for 5.10h */
1140 else if (bmp_version_minor < 0x14)
1141 bmplength = 118; /* exact for 5.11h */
1142 else if (bmp_version_minor < 0x24)
1143 /*
1144 * Not sure of version where pll limits came in;
1145 * certainly exist by 0x24 though.
1146 */
1147 /* length not exact: this is long enough to get lvds members */
1148 bmplength = 123;
1149 else if (bmp_version_minor < 0x27)
1150 /*
1151 * Length not exact: this is long enough to get pll limit
1152 * member
1153 */
1154 bmplength = 144;
1155 else
1156 /*
1157 * Length not exact: this is long enough to get dual link
1158 * transition clock.
1159 */
1160 bmplength = 158;
1161
1162 /* checksum */
1163 if (nv_cksum(bmp, 8)) {
1164 NV_ERROR(drm, "Bad BMP checksum\n");
1165 return -EINVAL;
1166 }
1167
1168 /*
1169 * Bit 4 seems to indicate either a mobile bios or a quadro card --
1170 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl
1171 * (not nv10gl), bit 5 that the flat panel tables are present, and
1172 * bit 6 a tv bios.
1173 */
1174 bios->feature_byte = bmp[9];
1175
1176 if (bmp_version_major < 5 || bmp_version_minor < 0x10)
1177 bios->old_style_init = true;
1178 legacy_scripts_offset = 18;
1179 if (bmp_version_major < 2)
1180 legacy_scripts_offset -= 4;
1181 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
1182 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
1183
1184 if (bmp_version_major > 2) { /* appears in BMP 3 */
1185 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
1186 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
1187 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
1188 }
1189
1190 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */
1191 if (bmplength > 61)
1192 legacy_i2c_offset = offset + 54;
1193 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
1194 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
1195 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
1196
1197 if (bmplength > 74) {
1198 bios->fmaxvco = ROM32(bmp[67]);
1199 bios->fminvco = ROM32(bmp[71]);
1200 }
1201 if (bmplength > 88)
1202 parse_script_table_pointers(bios, offset + 75);
1203 if (bmplength > 94) {
1204 bios->tmds.output0_script_ptr = ROM16(bmp[89]);
1205 bios->tmds.output1_script_ptr = ROM16(bmp[91]);
1206 /*
1207 * Never observed in use with lvds scripts, but is reused for
1208 * 18/24 bit panel interface default for EDID equipped panels
1209 * (if_is_24bit not set directly to avoid any oscillation).
1210 */
1211 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
1212 }
1213 if (bmplength > 108) {
1214 bios->fp.fptablepointer = ROM16(bmp[105]);
1215 bios->fp.fpxlatetableptr = ROM16(bmp[107]);
1216 bios->fp.xlatwidth = 1;
1217 }
1218 if (bmplength > 120) {
1219 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
1220 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
1221 }
1222 #if 0
1223 if (bmplength > 143)
1224 bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
1225 #endif
1226
1227 if (bmplength > 157)
1228 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
1229
1230 return 0;
1231 }
1232
1233 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
1234 {
1235 int i, j;
1236
1237 for (i = 0; i <= (n - len); i++) {
1238 for (j = 0; j < len; j++)
1239 if (data[i + j] != str[j])
1240 break;
1241 if (j == len)
1242 return i;
1243 }
1244
1245 return 0;
1246 }
1247
1248 void *
1249 olddcb_table(struct drm_device *dev)
1250 {
1251 struct nouveau_drm *drm = nouveau_drm(dev);
1252 u8 *dcb = NULL;
1253
1254 if (drm->device.info.family > NV_DEVICE_INFO_V0_TNT)
1255 dcb = ROMPTR(dev, drm->vbios.data[0x36]);
1256 if (!dcb) {
1257 NV_WARN(drm, "No DCB data found in VBIOS\n");
1258 return NULL;
1259 }
1260
1261 if (dcb[0] >= 0x42) {
1262 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
1263 return NULL;
1264 } else
1265 if (dcb[0] >= 0x30) {
1266 if (ROM32(dcb[6]) == 0x4edcbdcb)
1267 return dcb;
1268 } else
1269 if (dcb[0] >= 0x20) {
1270 if (ROM32(dcb[4]) == 0x4edcbdcb)
1271 return dcb;
1272 } else
1273 if (dcb[0] >= 0x15) {
1274 if (!memcmp(&dcb[-7], "DEV_REC", 7))
1275 return dcb;
1276 } else {
1277 /*
1278 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but
1279 * always has the same single (crt) entry, even when tv-out
1280 * present, so the conclusion is this version cannot really
1281 * be used.
1282 *
1283 * v1.2 tables (some NV6/10, and NV15+) normally have the
1284 * same 5 entries, which are not specific to the card and so
1285 * no use.
1286 *
1287 * v1.2 does have an I2C table that read_dcb_i2c_table can
1288 * handle, but cards exist (nv11 in #14821) with a bad i2c
1289 * table pointer, so use the indices parsed in
1290 * parse_bmp_structure.
1291 *
1292 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful
1293 */
1294 NV_WARN(drm, "No useful DCB data in VBIOS\n");
1295 return NULL;
1296 }
1297
1298 NV_WARN(drm, "DCB header validation failed\n");
1299 return NULL;
1300 }
1301
1302 void *
1303 olddcb_outp(struct drm_device *dev, u8 idx)
1304 {
1305 u8 *dcb = olddcb_table(dev);
1306 if (dcb && dcb[0] >= 0x30) {
1307 if (idx < dcb[2])
1308 return dcb + dcb[1] + (idx * dcb[3]);
1309 } else
1310 if (dcb && dcb[0] >= 0x20) {
1311 u8 *i2c = ROMPTR(dev, dcb[2]);
1312 u8 *ent = dcb + 8 + (idx * 8);
1313 if (i2c && ent < i2c)
1314 return ent;
1315 } else
1316 if (dcb && dcb[0] >= 0x15) {
1317 u8 *i2c = ROMPTR(dev, dcb[2]);
1318 u8 *ent = dcb + 4 + (idx * 10);
1319 if (i2c && ent < i2c)
1320 return ent;
1321 }
1322
1323 return NULL;
1324 }
1325
1326 int
1327 olddcb_outp_foreach(struct drm_device *dev, void *data,
1328 int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
1329 {
1330 int ret, idx = -1;
1331 u8 *outp = NULL;
1332 while ((outp = olddcb_outp(dev, ++idx))) {
1333 if (ROM32(outp[0]) == 0x00000000)
1334 break; /* seen on an NV11 with DCB v1.5 */
1335 if (ROM32(outp[0]) == 0xffffffff)
1336 break; /* seen on an NV17 with DCB v2.0 */
1337
1338 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
1339 continue;
1340 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
1341 break;
1342
1343 ret = exec(dev, data, idx, outp);
1344 if (ret)
1345 return ret;
1346 }
1347
1348 return 0;
1349 }
1350
1351 u8 *
1352 olddcb_conntab(struct drm_device *dev)
1353 {
1354 u8 *dcb = olddcb_table(dev);
1355 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
1356 u8 *conntab = ROMPTR(dev, dcb[0x14]);
1357 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
1358 return conntab;
1359 }
1360 return NULL;
1361 }
1362
1363 u8 *
1364 olddcb_conn(struct drm_device *dev, u8 idx)
1365 {
1366 u8 *conntab = olddcb_conntab(dev);
1367 if (conntab && idx < conntab[2])
1368 return conntab + conntab[1] + (idx * conntab[3]);
1369 return NULL;
1370 }
1371
1372 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
1373 {
1374 struct dcb_output *entry = &dcb->entry[dcb->entries];
1375
1376 memset(entry, 0, sizeof(struct dcb_output));
1377 entry->index = dcb->entries++;
1378
1379 return entry;
1380 }
1381
1382 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
1383 int heads, int or)
1384 {
1385 struct dcb_output *entry = new_dcb_entry(dcb);
1386
1387 entry->type = type;
1388 entry->i2c_index = i2c;
1389 entry->heads = heads;
1390 if (type != DCB_OUTPUT_ANALOG)
1391 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */
1392 entry->or = or;
1393 }
1394
1395 static bool
1396 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
1397 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1398 {
1399 struct nouveau_drm *drm = nouveau_drm(dev);
1400 int link = 0;
1401
1402 entry->type = conn & 0xf;
1403 entry->i2c_index = (conn >> 4) & 0xf;
1404 entry->heads = (conn >> 8) & 0xf;
1405 entry->connector = (conn >> 12) & 0xf;
1406 entry->bus = (conn >> 16) & 0xf;
1407 entry->location = (conn >> 20) & 0x3;
1408 entry->or = (conn >> 24) & 0xf;
1409
1410 switch (entry->type) {
1411 case DCB_OUTPUT_ANALOG:
1412 /*
1413 * Although the rest of a CRT conf dword is usually
1414 * zeros, mac biosen have stuff there so we must mask
1415 */
1416 entry->crtconf.maxfreq = (dcb->version < 0x30) ?
1417 (conf & 0xffff) * 10 :
1418 (conf & 0xff) * 10000;
1419 break;
1420 case DCB_OUTPUT_LVDS:
1421 {
1422 uint32_t mask;
1423 if (conf & 0x1)
1424 entry->lvdsconf.use_straps_for_mode = true;
1425 if (dcb->version < 0x22) {
1426 mask = ~0xd;
1427 /*
1428 * The laptop in bug 14567 lies and claims to not use
1429 * straps when it does, so assume all DCB 2.0 laptops
1430 * use straps, until a broken EDID using one is produced
1431 */
1432 entry->lvdsconf.use_straps_for_mode = true;
1433 /*
1434 * Both 0x4 and 0x8 show up in v2.0 tables; assume they
1435 * mean the same thing (probably wrong, but might work)
1436 */
1437 if (conf & 0x4 || conf & 0x8)
1438 entry->lvdsconf.use_power_scripts = true;
1439 } else {
1440 mask = ~0x7;
1441 if (conf & 0x2)
1442 entry->lvdsconf.use_acpi_for_edid = true;
1443 if (conf & 0x4)
1444 entry->lvdsconf.use_power_scripts = true;
1445 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
1446 link = entry->lvdsconf.sor.link;
1447 }
1448 if (conf & mask) {
1449 /*
1450 * Until we even try to use these on G8x, it's
1451 * useless reporting unknown bits. They all are.
1452 */
1453 if (dcb->version >= 0x40)
1454 break;
1455
1456 NV_ERROR(drm, "Unknown LVDS configuration bits, "
1457 "please report\n");
1458 }
1459 break;
1460 }
1461 case DCB_OUTPUT_TV:
1462 {
1463 if (dcb->version >= 0x30)
1464 entry->tvconf.has_component_output = conf & (0x8 << 4);
1465 else
1466 entry->tvconf.has_component_output = false;
1467
1468 break;
1469 }
1470 case DCB_OUTPUT_DP:
1471 entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
1472 entry->extdev = (conf & 0x0000ff00) >> 8;
1473 switch ((conf & 0x00e00000) >> 21) {
1474 case 0:
1475 entry->dpconf.link_bw = 162000;
1476 break;
1477 case 1:
1478 entry->dpconf.link_bw = 270000;
1479 break;
1480 default:
1481 entry->dpconf.link_bw = 540000;
1482 break;
1483 }
1484 entry->dpconf.link_nr = (conf & 0x0f000000) >> 24;
1485 if (dcb->version < 0x41) {
1486 switch (entry->dpconf.link_nr) {
1487 case 0xf:
1488 entry->dpconf.link_nr = 4;
1489 break;
1490 case 0x3:
1491 entry->dpconf.link_nr = 2;
1492 break;
1493 default:
1494 entry->dpconf.link_nr = 1;
1495 break;
1496 }
1497 }
1498 link = entry->dpconf.sor.link;
1499 entry->i2c_index += NV_I2C_AUX(0);
1500 break;
1501 case DCB_OUTPUT_TMDS:
1502 if (dcb->version >= 0x40) {
1503 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
1504 entry->extdev = (conf & 0x0000ff00) >> 8;
1505 link = entry->tmdsconf.sor.link;
1506 }
1507 else if (dcb->version >= 0x30)
1508 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
1509 else if (dcb->version >= 0x22)
1510 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
1511 break;
1512 case DCB_OUTPUT_EOL:
1513 /* weird g80 mobile type that "nv" treats as a terminator */
1514 dcb->entries--;
1515 return false;
1516 default:
1517 break;
1518 }
1519
1520 if (dcb->version < 0x40) {
1521 /* Normal entries consist of a single bit, but dual link has
1522 * the next most significant bit set too
1523 */
1524 entry->duallink_possible =
1525 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
1526 } else {
1527 entry->duallink_possible = (entry->sorconf.link == 3);
1528 }
1529
1530 /* unsure what DCB version introduces this, 3.0? */
1531 if (conf & 0x100000)
1532 entry->i2c_upper_default = true;
1533
1534 entry->hasht = (entry->location << 4) | entry->type;
1535 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or;
1536 return true;
1537 }
1538
1539 static bool
1540 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
1541 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1542 {
1543 struct nouveau_drm *drm = nouveau_drm(dev);
1544
1545 switch (conn & 0x0000000f) {
1546 case 0:
1547 entry->type = DCB_OUTPUT_ANALOG;
1548 break;
1549 case 1:
1550 entry->type = DCB_OUTPUT_TV;
1551 break;
1552 case 2:
1553 case 4:
1554 if (conn & 0x10)
1555 entry->type = DCB_OUTPUT_LVDS;
1556 else
1557 entry->type = DCB_OUTPUT_TMDS;
1558 break;
1559 case 3:
1560 entry->type = DCB_OUTPUT_LVDS;
1561 break;
1562 default:
1563 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
1564 return false;
1565 }
1566
1567 entry->i2c_index = (conn & 0x0003c000) >> 14;
1568 entry->heads = ((conn & 0x001c0000) >> 18) + 1;
1569 entry->or = entry->heads; /* same as heads, hopefully safe enough */
1570 entry->location = (conn & 0x01e00000) >> 21;
1571 entry->bus = (conn & 0x0e000000) >> 25;
1572 entry->duallink_possible = false;
1573
1574 switch (entry->type) {
1575 case DCB_OUTPUT_ANALOG:
1576 entry->crtconf.maxfreq = (conf & 0xffff) * 10;
1577 break;
1578 case DCB_OUTPUT_TV:
1579 entry->tvconf.has_component_output = false;
1580 break;
1581 case DCB_OUTPUT_LVDS:
1582 if ((conn & 0x00003f00) >> 8 != 0x10)
1583 entry->lvdsconf.use_straps_for_mode = true;
1584 entry->lvdsconf.use_power_scripts = true;
1585 break;
1586 default:
1587 break;
1588 }
1589
1590 return true;
1591 }
1592
1593 static
1594 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
1595 {
1596 /*
1597 * DCB v2.0 lists each output combination separately.
1598 * Here we merge compatible entries to have fewer outputs, with
1599 * more options
1600 */
1601
1602 struct nouveau_drm *drm = nouveau_drm(dev);
1603 int i, newentries = 0;
1604
1605 for (i = 0; i < dcb->entries; i++) {
1606 struct dcb_output *ient = &dcb->entry[i];
1607 int j;
1608
1609 for (j = i + 1; j < dcb->entries; j++) {
1610 struct dcb_output *jent = &dcb->entry[j];
1611
1612 if (jent->type == 100) /* already merged entry */
1613 continue;
1614
1615 /* merge heads field when all other fields the same */
1616 if (jent->i2c_index == ient->i2c_index &&
1617 jent->type == ient->type &&
1618 jent->location == ient->location &&
1619 jent->or == ient->or) {
1620 NV_INFO(drm, "Merging DCB entries %d and %d\n",
1621 i, j);
1622 ient->heads |= jent->heads;
1623 jent->type = 100; /* dummy value */
1624 }
1625 }
1626 }
1627
1628 /* Compact entries merged into others out of dcb */
1629 for (i = 0; i < dcb->entries; i++) {
1630 if (dcb->entry[i].type == 100)
1631 continue;
1632
1633 if (newentries != i) {
1634 dcb->entry[newentries] = dcb->entry[i];
1635 dcb->entry[newentries].index = newentries;
1636 }
1637 newentries++;
1638 }
1639
1640 dcb->entries = newentries;
1641 }
1642
1643 static bool
1644 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
1645 {
1646 struct nouveau_drm *drm = nouveau_drm(dev);
1647 struct dcb_table *dcb = &drm->vbios.dcb;
1648
1649 /* Dell Precision M6300
1650 * DCB entry 2: 02025312 00000010
1651 * DCB entry 3: 02026312 00000020
1652 *
1653 * Identical, except apparently a different connector on a
1654 * different SOR link. Not a clue how we're supposed to know
1655 * which one is in use if it even shares an i2c line...
1656 *
1657 * Ignore the connector on the second SOR link to prevent
1658 * nasty problems until this is sorted (assuming it's not a
1659 * VBIOS bug).
1660 */
1661 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {
1662 if (*conn == 0x02026312 && *conf == 0x00000020)
1663 return false;
1664 }
1665
1666 /* GeForce3 Ti 200
1667 *
1668 * DCB reports an LVDS output that should be TMDS:
1669 * DCB entry 1: f2005014 ffffffff
1670 */
1671 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
1672 if (*conn == 0xf2005014 && *conf == 0xffffffff) {
1673 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1);
1674 return false;
1675 }
1676 }
1677
1678 /* XFX GT-240X-YA
1679 *
1680 * So many things wrong here, replace the entire encoder table..
1681 */
1682 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {
1683 if (idx == 0) {
1684 *conn = 0x02001300; /* VGA, connector 1 */
1685 *conf = 0x00000028;
1686 } else
1687 if (idx == 1) {
1688 *conn = 0x01010312; /* DVI, connector 0 */
1689 *conf = 0x00020030;
1690 } else
1691 if (idx == 2) {
1692 *conn = 0x01010310; /* VGA, connector 0 */
1693 *conf = 0x00000028;
1694 } else
1695 if (idx == 3) {
1696 *conn = 0x02022362; /* HDMI, connector 2 */
1697 *conf = 0x00020010;
1698 } else {
1699 *conn = 0x0000000e; /* EOL */
1700 *conf = 0x00000000;
1701 }
1702 }
1703
1704 /* Some other twisted XFX board (rhbz#694914)
1705 *
1706 * The DVI/VGA encoder combo that's supposed to represent the
1707 * DVI-I connector actually point at two different ones, and
1708 * the HDMI connector ends up paired with the VGA instead.
1709 *
1710 * Connector table is missing anything for VGA at all, pointing it
1711 * an invalid conntab entry 2 so we figure it out ourself.
1712 */
1713 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
1714 if (idx == 0) {
1715 *conn = 0x02002300; /* VGA, connector 2 */
1716 *conf = 0x00000028;
1717 } else
1718 if (idx == 1) {
1719 *conn = 0x01010312; /* DVI, connector 0 */
1720 *conf = 0x00020030;
1721 } else
1722 if (idx == 2) {
1723 *conn = 0x04020310; /* VGA, connector 0 */
1724 *conf = 0x00000028;
1725 } else
1726 if (idx == 3) {
1727 *conn = 0x02021322; /* HDMI, connector 1 */
1728 *conf = 0x00020010;
1729 } else {
1730 *conn = 0x0000000e; /* EOL */
1731 *conf = 0x00000000;
1732 }
1733 }
1734
1735 /* fdo#50830: connector indices for VGA and DVI-I are backwards */
1736 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {
1737 if (idx == 0 && *conn == 0x02000300)
1738 *conn = 0x02011300;
1739 else
1740 if (idx == 1 && *conn == 0x04011310)
1741 *conn = 0x04000310;
1742 else
1743 if (idx == 2 && *conn == 0x02011312)
1744 *conn = 0x02000312;
1745 }
1746
1747 return true;
1748 }
1749
1750 static void
1751 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
1752 {
1753 struct dcb_table *dcb = &bios->dcb;
1754 int all_heads = (nv_two_heads(dev) ? 3 : 1);
1755
1756 #ifdef __powerpc__
1757 /* Apple iMac G4 NV17 */
1758 if (of_machine_is_compatible("PowerMac4,5")) {
1759 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
1760 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
1761 return;
1762 }
1763 #endif
1764
1765 /* Make up some sane defaults */
1766 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,
1767 bios->legacy.i2c_indices.crt, 1, 1);
1768
1769 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
1770 fabricate_dcb_output(dcb, DCB_OUTPUT_TV,
1771 bios->legacy.i2c_indices.tv,
1772 all_heads, 0);
1773
1774 else if (bios->tmds.output0_script_ptr ||
1775 bios->tmds.output1_script_ptr)
1776 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,
1777 bios->legacy.i2c_indices.panel,
1778 all_heads, 1);
1779 }
1780
1781 static int
1782 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
1783 {
1784 struct nouveau_drm *drm = nouveau_drm(dev);
1785 struct dcb_table *dcb = &drm->vbios.dcb;
1786 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
1787 u32 conn = ROM32(outp[0]);
1788 bool ret;
1789
1790 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {
1791 struct dcb_output *entry = new_dcb_entry(dcb);
1792
1793 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
1794
1795 if (dcb->version >= 0x20)
1796 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
1797 else
1798 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
1799 if (!ret)
1800 return 1; /* stop parsing */
1801
1802 /* Ignore the I2C index for on-chip TV-out, as there
1803 * are cards with bogus values (nv31m in bug 23212),
1804 * and it's otherwise useless.
1805 */
1806 if (entry->type == DCB_OUTPUT_TV &&
1807 entry->location == DCB_LOC_ON_CHIP)
1808 entry->i2c_index = 0x0f;
1809 }
1810
1811 return 0;
1812 }
1813
1814 static void
1815 dcb_fake_connectors(struct nvbios *bios)
1816 {
1817 struct dcb_table *dcbt = &bios->dcb;
1818 u8 map[16] = { };
1819 int i, idx = 0;
1820
1821 /* heuristic: if we ever get a non-zero connector field, assume
1822 * that all the indices are valid and we don't need fake them.
1823 *
1824 * and, as usual, a blacklist of boards with bad bios data..
1825 */
1826 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {
1827 for (i = 0; i < dcbt->entries; i++) {
1828 if (dcbt->entry[i].connector)
1829 return;
1830 }
1831 }
1832
1833 /* no useful connector info available, we need to make it up
1834 * ourselves. the rule here is: anything on the same i2c bus
1835 * is considered to be on the same connector. any output
1836 * without an associated i2c bus is assigned its own unique
1837 * connector index.
1838 */
1839 for (i = 0; i < dcbt->entries; i++) {
1840 u8 i2c = dcbt->entry[i].i2c_index;
1841 if (i2c == 0x0f) {
1842 dcbt->entry[i].connector = idx++;
1843 } else {
1844 if (!map[i2c])
1845 map[i2c] = ++idx;
1846 dcbt->entry[i].connector = map[i2c] - 1;
1847 }
1848 }
1849
1850 /* if we created more than one connector, destroy the connector
1851 * table - just in case it has random, rather than stub, entries.
1852 */
1853 if (i > 1) {
1854 u8 *conntab = olddcb_conntab(bios->dev);
1855 if (conntab)
1856 conntab[0] = 0x00;
1857 }
1858 }
1859
1860 static int
1861 parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
1862 {
1863 struct nouveau_drm *drm = nouveau_drm(dev);
1864 struct dcb_table *dcb = &bios->dcb;
1865 u8 *dcbt, *conn;
1866 int idx;
1867
1868 dcbt = olddcb_table(dev);
1869 if (!dcbt) {
1870 /* handle pre-DCB boards */
1871 if (bios->type == NVBIOS_BMP) {
1872 fabricate_dcb_encoder_table(dev, bios);
1873 return 0;
1874 }
1875
1876 return -EINVAL;
1877 }
1878
1879 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
1880
1881 dcb->version = dcbt[0];
1882 olddcb_outp_foreach(dev, NULL, parse_dcb_entry);
1883
1884 /*
1885 * apart for v2.1+ not being known for requiring merging, this
1886 * guarantees dcbent->index is the index of the entry in the rom image
1887 */
1888 if (dcb->version < 0x21)
1889 merge_like_dcb_entries(dev, dcb);
1890
1891 /* dump connector table entries to log, if any exist */
1892 idx = -1;
1893 while ((conn = olddcb_conn(dev, ++idx))) {
1894 if (conn[0] != 0xff) {
1895 NV_INFO(drm, "DCB conn %02d: ", idx);
1896 if (olddcb_conntab(dev)[3] < 4)
1897 pr_cont("%04x\n", ROM16(conn[0]));
1898 else
1899 pr_cont("%08x\n", ROM32(conn[0]));
1900 }
1901 }
1902 dcb_fake_connectors(bios);
1903 return 0;
1904 }
1905
1906 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
1907 {
1908 /*
1909 * The header following the "HWSQ" signature has the number of entries,
1910 * and the entry size
1911 *
1912 * An entry consists of a dword to write to the sequencer control reg
1913 * (0x00001304), followed by the ucode bytes, written sequentially,
1914 * starting at reg 0x00001400
1915 */
1916
1917 struct nouveau_drm *drm = nouveau_drm(dev);
1918 struct nvif_device *device = &drm->device;
1919 uint8_t bytes_to_write;
1920 uint16_t hwsq_entry_offset;
1921 int i;
1922
1923 if (bios->data[hwsq_offset] <= entry) {
1924 NV_ERROR(drm, "Too few entries in HW sequencer table for "
1925 "requested entry\n");
1926 return -ENOENT;
1927 }
1928
1929 bytes_to_write = bios->data[hwsq_offset + 1];
1930
1931 if (bytes_to_write != 36) {
1932 NV_ERROR(drm, "Unknown HW sequencer entry size\n");
1933 return -EINVAL;
1934 }
1935
1936 NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
1937
1938 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
1939
1940 /* set sequencer control */
1941 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1942 bytes_to_write -= 4;
1943
1944 /* write ucode */
1945 for (i = 0; i < bytes_to_write; i += 4)
1946 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1947
1948 /* twiddle NV_PBUS_DEBUG_4 */
1949 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
1950
1951 return 0;
1952 }
1953
1954 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
1955 struct nvbios *bios)
1956 {
1957 /*
1958 * BMP based cards, from NV17, need a microcode loading to correctly
1959 * control the GPIO etc for LVDS panels
1960 *
1961 * BIT based cards seem to do this directly in the init scripts
1962 *
1963 * The microcode entries are found by the "HWSQ" signature.
1964 */
1965
1966 const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
1967 const int sz = sizeof(hwsq_signature);
1968 int hwsq_offset;
1969
1970 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
1971 if (!hwsq_offset)
1972 return 0;
1973
1974 /* always use entry 0? */
1975 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
1976 }
1977
1978 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
1979 {
1980 struct nouveau_drm *drm = nouveau_drm(dev);
1981 struct nvbios *bios = &drm->vbios;
1982 const uint8_t edid_sig[] = {
1983 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
1984 uint16_t offset = 0;
1985 uint16_t newoffset;
1986 int searchlen = NV_PROM_SIZE;
1987
1988 if (bios->fp.edid)
1989 return bios->fp.edid;
1990
1991 while (searchlen) {
1992 newoffset = findstr(&bios->data[offset], searchlen,
1993 edid_sig, 8);
1994 if (!newoffset)
1995 return NULL;
1996 offset += newoffset;
1997 if (!nv_cksum(&bios->data[offset], EDID1_LEN))
1998 break;
1999
2000 searchlen -= offset;
2001 offset++;
2002 }
2003
2004 NV_INFO(drm, "Found EDID in BIOS\n");
2005
2006 return bios->fp.edid = &bios->data[offset];
2007 }
2008
2009 static bool NVInitVBIOS(struct drm_device *dev)
2010 {
2011 struct nouveau_drm *drm = nouveau_drm(dev);
2012 struct nvkm_bios *bios = nvxx_bios(&drm->device);
2013 struct nvbios *legacy = &drm->vbios;
2014
2015 memset(legacy, 0, sizeof(struct nvbios));
2016 spin_lock_init(&legacy->lock);
2017 legacy->dev = dev;
2018
2019 legacy->data = bios->data;
2020 legacy->length = bios->size;
2021 legacy->major_version = bios->version.major;
2022 legacy->chip_version = bios->version.chip;
2023 if (bios->bit_offset) {
2024 legacy->type = NVBIOS_BIT;
2025 legacy->offset = bios->bit_offset;
2026 return !parse_bit_structure(legacy, legacy->offset + 6);
2027 } else
2028 if (bios->bmp_offset) {
2029 legacy->type = NVBIOS_BMP;
2030 legacy->offset = bios->bmp_offset;
2031 return !parse_bmp_structure(dev, legacy, legacy->offset);
2032 }
2033
2034 return false;
2035 }
2036
2037 int
2038 nouveau_run_vbios_init(struct drm_device *dev)
2039 {
2040 struct nouveau_drm *drm = nouveau_drm(dev);
2041 struct nvbios *bios = &drm->vbios;
2042 int ret = 0;
2043
2044 /* Reset the BIOS head to 0. */
2045 bios->state.crtchead = 0;
2046
2047 if (bios->major_version < 5) /* BMP only */
2048 load_nv17_hw_sequencer_ucode(dev, bios);
2049
2050 if (bios->execute) {
2051 bios->fp.last_script_invoc = 0;
2052 bios->fp.lvds_init_run = false;
2053 }
2054
2055 return ret;
2056 }
2057
2058 static bool
2059 nouveau_bios_posted(struct drm_device *dev)
2060 {
2061 struct nouveau_drm *drm = nouveau_drm(dev);
2062 unsigned htotal;
2063
2064 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA)
2065 return true;
2066
2067 htotal = NVReadVgaCrtc(dev, 0, 0x06);
2068 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
2069 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
2070 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
2071 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
2072 return (htotal != 0);
2073 }
2074
2075 int
2076 nouveau_bios_init(struct drm_device *dev)
2077 {
2078 struct nouveau_drm *drm = nouveau_drm(dev);
2079 struct nvbios *bios = &drm->vbios;
2080 int ret;
2081
2082 /* only relevant for PCI devices */
2083 if (!dev->pdev)
2084 return 0;
2085
2086 if (!NVInitVBIOS(dev))
2087 return -ENODEV;
2088
2089 ret = parse_dcb_table(dev, bios);
2090 if (ret)
2091 return ret;
2092
2093 if (!bios->major_version) /* we don't run version 0 bios */
2094 return 0;
2095
2096 /* init script execution disabled */
2097 bios->execute = false;
2098
2099 /* ... unless card isn't POSTed already */
2100 if (!nouveau_bios_posted(dev)) {
2101 NV_INFO(drm, "Adaptor not initialised, "
2102 "running VBIOS init tables.\n");
2103 bios->execute = true;
2104 }
2105
2106 ret = nouveau_run_vbios_init(dev);
2107 if (ret)
2108 return ret;
2109
2110 /* feature_byte on BMP is poor, but init always sets CR4B */
2111 if (bios->major_version < 5)
2112 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
2113
2114 /* all BIT systems need p_f_m_t for digital_min_front_porch */
2115 if (bios->is_mobile || bios->major_version >= 5)
2116 ret = parse_fp_mode_table(dev, bios);
2117
2118 /* allow subsequent scripts to execute */
2119 bios->execute = true;
2120
2121 return 0;
2122 }
2123
2124 void
2125 nouveau_bios_takedown(struct drm_device *dev)
2126 {
2127 }
Linux with added FPC-III support