Linux 4.2.1
[linux/fpc-iii.git] / drivers / gpu / drm / omapdrm / omap_drv.c
blob419c2e49adf5e38439f6bb727c4d780be4b1e00a
1 /*
2 * drivers/gpu/drm/omapdrm/omap_drv.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/wait.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
27 #include "omap_dmm_tiler.h"
28 #include "omap_drv.h"
30 #define DRIVER_NAME MODULE_NAME
31 #define DRIVER_DESC "OMAP DRM"
32 #define DRIVER_DATE "20110917"
33 #define DRIVER_MAJOR 1
34 #define DRIVER_MINOR 0
35 #define DRIVER_PATCHLEVEL 0
37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
40 module_param(num_crtc, int, 0600);
43 * mode config funcs
46 /* Notes about mapping DSS and DRM entities:
47 * CRTC: overlay
48 * encoder: manager.. with some extension to allow one primary CRTC
49 * and zero or more video CRTC's to be mapped to one encoder?
50 * connector: dssdev.. manager can be attached/detached from different
51 * devices
54 static void omap_fb_output_poll_changed(struct drm_device *dev)
56 struct omap_drm_private *priv = dev->dev_private;
57 DBG("dev=%p", dev);
58 if (priv->fbdev)
59 drm_fb_helper_hotplug_event(priv->fbdev);
62 struct omap_atomic_state_commit {
63 struct work_struct work;
64 struct drm_device *dev;
65 struct drm_atomic_state *state;
66 u32 crtcs;
69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
70 struct drm_atomic_state *old_state)
72 struct drm_crtc_state *old_crtc_state;
73 struct drm_crtc *crtc;
74 unsigned int i;
75 int ret;
77 for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
78 if (!crtc->state->enable)
79 continue;
81 ret = omap_crtc_wait_pending(crtc);
83 if (!ret)
84 dev_warn(dev->dev,
85 "atomic complete timeout (pipe %u)!\n", i);
89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
91 struct drm_device *dev = commit->dev;
92 struct omap_drm_private *priv = dev->dev_private;
93 struct drm_atomic_state *old_state = commit->state;
95 /* Apply the atomic update. */
96 dispc_runtime_get();
98 drm_atomic_helper_commit_modeset_disables(dev, old_state);
99 drm_atomic_helper_commit_planes(dev, old_state);
100 drm_atomic_helper_commit_modeset_enables(dev, old_state);
102 omap_atomic_wait_for_completion(dev, old_state);
104 drm_atomic_helper_cleanup_planes(dev, old_state);
106 dispc_runtime_put();
108 drm_atomic_state_free(old_state);
110 /* Complete the commit, wake up any waiter. */
111 spin_lock(&priv->commit.lock);
112 priv->commit.pending &= ~commit->crtcs;
113 spin_unlock(&priv->commit.lock);
115 wake_up_all(&priv->commit.wait);
117 kfree(commit);
120 static void omap_atomic_work(struct work_struct *work)
122 struct omap_atomic_state_commit *commit =
123 container_of(work, struct omap_atomic_state_commit, work);
125 omap_atomic_complete(commit);
128 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
129 struct omap_atomic_state_commit *commit)
131 bool pending;
133 spin_lock(&priv->commit.lock);
134 pending = priv->commit.pending & commit->crtcs;
135 spin_unlock(&priv->commit.lock);
137 return pending;
140 static int omap_atomic_commit(struct drm_device *dev,
141 struct drm_atomic_state *state, bool async)
143 struct omap_drm_private *priv = dev->dev_private;
144 struct omap_atomic_state_commit *commit;
145 unsigned long flags;
146 unsigned int i;
147 int ret;
149 ret = drm_atomic_helper_prepare_planes(dev, state);
150 if (ret)
151 return ret;
153 /* Allocate the commit object. */
154 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
155 if (commit == NULL) {
156 ret = -ENOMEM;
157 goto error;
160 INIT_WORK(&commit->work, omap_atomic_work);
161 commit->dev = dev;
162 commit->state = state;
164 /* Wait until all affected CRTCs have completed previous commits and
165 * mark them as pending.
167 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
168 if (state->crtcs[i])
169 commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
172 wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
174 spin_lock(&priv->commit.lock);
175 priv->commit.pending |= commit->crtcs;
176 spin_unlock(&priv->commit.lock);
178 /* Keep track of all CRTC events to unlink them in preclose(). */
179 spin_lock_irqsave(&dev->event_lock, flags);
180 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
181 struct drm_crtc_state *cstate = state->crtc_states[i];
183 if (cstate && cstate->event)
184 list_add_tail(&cstate->event->base.link,
185 &priv->commit.events);
187 spin_unlock_irqrestore(&dev->event_lock, flags);
189 /* Swap the state, this is the point of no return. */
190 drm_atomic_helper_swap_state(dev, state);
192 if (async)
193 schedule_work(&commit->work);
194 else
195 omap_atomic_complete(commit);
197 return 0;
199 error:
200 drm_atomic_helper_cleanup_planes(dev, state);
201 return ret;
204 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
205 .fb_create = omap_framebuffer_create,
206 .output_poll_changed = omap_fb_output_poll_changed,
207 .atomic_check = drm_atomic_helper_check,
208 .atomic_commit = omap_atomic_commit,
211 static int get_connector_type(struct omap_dss_device *dssdev)
213 switch (dssdev->type) {
214 case OMAP_DISPLAY_TYPE_HDMI:
215 return DRM_MODE_CONNECTOR_HDMIA;
216 case OMAP_DISPLAY_TYPE_DVI:
217 return DRM_MODE_CONNECTOR_DVID;
218 default:
219 return DRM_MODE_CONNECTOR_Unknown;
223 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
225 struct omap_drm_private *priv = dev->dev_private;
226 int i;
228 for (i = 0; i < priv->num_crtcs; i++) {
229 struct drm_crtc *crtc = priv->crtcs[i];
231 if (omap_crtc_channel(crtc) == channel)
232 return true;
235 return false;
237 static void omap_disconnect_dssdevs(void)
239 struct omap_dss_device *dssdev = NULL;
241 for_each_dss_dev(dssdev)
242 dssdev->driver->disconnect(dssdev);
245 static int omap_connect_dssdevs(void)
247 int r;
248 struct omap_dss_device *dssdev = NULL;
249 bool no_displays = true;
251 for_each_dss_dev(dssdev) {
252 r = dssdev->driver->connect(dssdev);
253 if (r == -EPROBE_DEFER) {
254 omap_dss_put_device(dssdev);
255 goto cleanup;
256 } else if (r) {
257 dev_warn(dssdev->dev, "could not connect display: %s\n",
258 dssdev->name);
259 } else {
260 no_displays = false;
264 if (no_displays)
265 return -EPROBE_DEFER;
267 return 0;
269 cleanup:
271 * if we are deferring probe, we disconnect the devices we previously
272 * connected
274 omap_disconnect_dssdevs();
276 return r;
279 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
280 enum omap_channel channel)
282 struct omap_drm_private *priv = dev->dev_private;
283 struct drm_plane *plane;
284 struct drm_crtc *crtc;
286 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
287 if (IS_ERR(plane))
288 return PTR_ERR(plane);
290 crtc = omap_crtc_init(dev, plane, channel, id);
292 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
293 priv->crtcs[id] = crtc;
294 priv->num_crtcs++;
296 priv->planes[id] = plane;
297 priv->num_planes++;
299 return 0;
302 static int omap_modeset_init_properties(struct drm_device *dev)
304 struct omap_drm_private *priv = dev->dev_private;
306 if (priv->has_dmm) {
307 dev->mode_config.rotation_property =
308 drm_mode_create_rotation_property(dev,
309 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
310 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
311 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
312 if (!dev->mode_config.rotation_property)
313 return -ENOMEM;
316 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
317 if (!priv->zorder_prop)
318 return -ENOMEM;
320 return 0;
323 static int omap_modeset_init(struct drm_device *dev)
325 struct omap_drm_private *priv = dev->dev_private;
326 struct omap_dss_device *dssdev = NULL;
327 int num_ovls = dss_feat_get_num_ovls();
328 int num_mgrs = dss_feat_get_num_mgrs();
329 int num_crtcs;
330 int i, id = 0;
331 int ret;
333 drm_mode_config_init(dev);
335 omap_drm_irq_install(dev);
337 ret = omap_modeset_init_properties(dev);
338 if (ret < 0)
339 return ret;
342 * We usually don't want to create a CRTC for each manager, at least
343 * not until we have a way to expose private planes to userspace.
344 * Otherwise there would not be enough video pipes left for drm planes.
345 * We use the num_crtc argument to limit the number of crtcs we create.
347 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
349 dssdev = NULL;
351 for_each_dss_dev(dssdev) {
352 struct drm_connector *connector;
353 struct drm_encoder *encoder;
354 enum omap_channel channel;
355 struct omap_overlay_manager *mgr;
357 if (!omapdss_device_is_connected(dssdev))
358 continue;
360 encoder = omap_encoder_init(dev, dssdev);
362 if (!encoder) {
363 dev_err(dev->dev, "could not create encoder: %s\n",
364 dssdev->name);
365 return -ENOMEM;
368 connector = omap_connector_init(dev,
369 get_connector_type(dssdev), dssdev, encoder);
371 if (!connector) {
372 dev_err(dev->dev, "could not create connector: %s\n",
373 dssdev->name);
374 return -ENOMEM;
377 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
378 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
380 priv->encoders[priv->num_encoders++] = encoder;
381 priv->connectors[priv->num_connectors++] = connector;
383 drm_mode_connector_attach_encoder(connector, encoder);
386 * if we have reached the limit of the crtcs we are allowed to
387 * create, let's not try to look for a crtc for this
388 * panel/encoder and onwards, we will, of course, populate the
389 * the possible_crtcs field for all the encoders with the final
390 * set of crtcs we create
392 if (id == num_crtcs)
393 continue;
396 * get the recommended DISPC channel for this encoder. For now,
397 * we only try to get create a crtc out of the recommended, the
398 * other possible channels to which the encoder can connect are
399 * not considered.
402 mgr = omapdss_find_mgr_from_display(dssdev);
403 channel = mgr->id;
405 * if this channel hasn't already been taken by a previously
406 * allocated crtc, we create a new crtc for it
408 if (!channel_used(dev, channel)) {
409 ret = omap_modeset_create_crtc(dev, id, channel);
410 if (ret < 0) {
411 dev_err(dev->dev,
412 "could not create CRTC (channel %u)\n",
413 channel);
414 return ret;
417 id++;
422 * we have allocated crtcs according to the need of the panels/encoders,
423 * adding more crtcs here if needed
425 for (; id < num_crtcs; id++) {
427 /* find a free manager for this crtc */
428 for (i = 0; i < num_mgrs; i++) {
429 if (!channel_used(dev, i))
430 break;
433 if (i == num_mgrs) {
434 /* this shouldn't really happen */
435 dev_err(dev->dev, "no managers left for crtc\n");
436 return -ENOMEM;
439 ret = omap_modeset_create_crtc(dev, id, i);
440 if (ret < 0) {
441 dev_err(dev->dev,
442 "could not create CRTC (channel %u)\n", i);
443 return ret;
448 * Create normal planes for the remaining overlays:
450 for (; id < num_ovls; id++) {
451 struct drm_plane *plane;
453 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
454 if (IS_ERR(plane))
455 return PTR_ERR(plane);
457 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
458 priv->planes[priv->num_planes++] = plane;
461 for (i = 0; i < priv->num_encoders; i++) {
462 struct drm_encoder *encoder = priv->encoders[i];
463 struct omap_dss_device *dssdev =
464 omap_encoder_get_dssdev(encoder);
465 struct omap_dss_device *output;
467 output = omapdss_find_output_from_display(dssdev);
469 /* figure out which crtc's we can connect the encoder to: */
470 encoder->possible_crtcs = 0;
471 for (id = 0; id < priv->num_crtcs; id++) {
472 struct drm_crtc *crtc = priv->crtcs[id];
473 enum omap_channel crtc_channel;
475 crtc_channel = omap_crtc_channel(crtc);
477 if (output->dispc_channel == crtc_channel) {
478 encoder->possible_crtcs |= (1 << id);
479 break;
483 omap_dss_put_device(output);
486 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
487 priv->num_planes, priv->num_crtcs, priv->num_encoders,
488 priv->num_connectors);
490 dev->mode_config.min_width = 32;
491 dev->mode_config.min_height = 32;
493 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
494 * to fill in these limits properly on different OMAP generations..
496 dev->mode_config.max_width = 2048;
497 dev->mode_config.max_height = 2048;
499 dev->mode_config.funcs = &omap_mode_config_funcs;
501 drm_mode_config_reset(dev);
503 return 0;
506 static void omap_modeset_free(struct drm_device *dev)
508 drm_mode_config_cleanup(dev);
512 * drm ioctl funcs
516 static int ioctl_get_param(struct drm_device *dev, void *data,
517 struct drm_file *file_priv)
519 struct omap_drm_private *priv = dev->dev_private;
520 struct drm_omap_param *args = data;
522 DBG("%p: param=%llu", dev, args->param);
524 switch (args->param) {
525 case OMAP_PARAM_CHIPSET_ID:
526 args->value = priv->omaprev;
527 break;
528 default:
529 DBG("unknown parameter %lld", args->param);
530 return -EINVAL;
533 return 0;
536 static int ioctl_set_param(struct drm_device *dev, void *data,
537 struct drm_file *file_priv)
539 struct drm_omap_param *args = data;
541 switch (args->param) {
542 default:
543 DBG("unknown parameter %lld", args->param);
544 return -EINVAL;
547 return 0;
550 static int ioctl_gem_new(struct drm_device *dev, void *data,
551 struct drm_file *file_priv)
553 struct drm_omap_gem_new *args = data;
554 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
555 args->size.bytes, args->flags);
556 return omap_gem_new_handle(dev, file_priv, args->size,
557 args->flags, &args->handle);
560 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
561 struct drm_file *file_priv)
563 struct drm_omap_gem_cpu_prep *args = data;
564 struct drm_gem_object *obj;
565 int ret;
567 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
569 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
570 if (!obj)
571 return -ENOENT;
573 ret = omap_gem_op_sync(obj, args->op);
575 if (!ret)
576 ret = omap_gem_op_start(obj, args->op);
578 drm_gem_object_unreference_unlocked(obj);
580 return ret;
583 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
584 struct drm_file *file_priv)
586 struct drm_omap_gem_cpu_fini *args = data;
587 struct drm_gem_object *obj;
588 int ret;
590 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
592 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
593 if (!obj)
594 return -ENOENT;
596 /* XXX flushy, flushy */
597 ret = 0;
599 if (!ret)
600 ret = omap_gem_op_finish(obj, args->op);
602 drm_gem_object_unreference_unlocked(obj);
604 return ret;
607 static int ioctl_gem_info(struct drm_device *dev, void *data,
608 struct drm_file *file_priv)
610 struct drm_omap_gem_info *args = data;
611 struct drm_gem_object *obj;
612 int ret = 0;
614 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
616 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
617 if (!obj)
618 return -ENOENT;
620 args->size = omap_gem_mmap_size(obj);
621 args->offset = omap_gem_mmap_offset(obj);
623 drm_gem_object_unreference_unlocked(obj);
625 return ret;
628 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
629 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
630 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
631 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
632 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
633 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
634 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
638 * drm driver funcs
642 * load - setup chip and create an initial config
643 * @dev: DRM device
644 * @flags: startup flags
646 * The driver load routine has to do several things:
647 * - initialize the memory manager
648 * - allocate initial config memory
649 * - setup the DRM framebuffer with the allocated memory
651 static int dev_load(struct drm_device *dev, unsigned long flags)
653 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
654 struct omap_drm_private *priv;
655 unsigned int i;
656 int ret;
658 DBG("load: dev=%p", dev);
660 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
661 if (!priv)
662 return -ENOMEM;
664 priv->omaprev = pdata->omaprev;
666 dev->dev_private = priv;
668 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
669 init_waitqueue_head(&priv->commit.wait);
670 spin_lock_init(&priv->commit.lock);
671 INIT_LIST_HEAD(&priv->commit.events);
673 spin_lock_init(&priv->list_lock);
674 INIT_LIST_HEAD(&priv->obj_list);
676 omap_gem_init(dev);
678 ret = omap_modeset_init(dev);
679 if (ret) {
680 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
681 dev->dev_private = NULL;
682 kfree(priv);
683 return ret;
686 /* Initialize vblank handling, start with all CRTCs disabled. */
687 ret = drm_vblank_init(dev, priv->num_crtcs);
688 if (ret)
689 dev_warn(dev->dev, "could not init vblank\n");
691 for (i = 0; i < priv->num_crtcs; i++)
692 drm_crtc_vblank_off(priv->crtcs[i]);
694 priv->fbdev = omap_fbdev_init(dev);
695 if (!priv->fbdev) {
696 dev_warn(dev->dev, "omap_fbdev_init failed\n");
697 /* well, limp along without an fbdev.. maybe X11 will work? */
700 /* store off drm_device for use in pm ops */
701 dev_set_drvdata(dev->dev, dev);
703 drm_kms_helper_poll_init(dev);
705 return 0;
708 static int dev_unload(struct drm_device *dev)
710 struct omap_drm_private *priv = dev->dev_private;
712 DBG("unload: dev=%p", dev);
714 drm_kms_helper_poll_fini(dev);
716 if (priv->fbdev)
717 omap_fbdev_free(dev);
719 omap_modeset_free(dev);
720 omap_gem_deinit(dev);
722 destroy_workqueue(priv->wq);
724 drm_vblank_cleanup(dev);
725 omap_drm_irq_uninstall(dev);
727 kfree(dev->dev_private);
728 dev->dev_private = NULL;
730 dev_set_drvdata(dev->dev, NULL);
732 return 0;
735 static int dev_open(struct drm_device *dev, struct drm_file *file)
737 file->driver_priv = NULL;
739 DBG("open: dev=%p, file=%p", dev, file);
741 return 0;
745 * lastclose - clean up after all DRM clients have exited
746 * @dev: DRM device
748 * Take care of cleaning up after all DRM clients have exited. In the
749 * mode setting case, we want to restore the kernel's initial mode (just
750 * in case the last client left us in a bad state).
752 static void dev_lastclose(struct drm_device *dev)
754 int i;
756 /* we don't support vga-switcheroo.. so just make sure the fbdev
757 * mode is active
759 struct omap_drm_private *priv = dev->dev_private;
760 int ret;
762 DBG("lastclose: dev=%p", dev);
764 if (dev->mode_config.rotation_property) {
765 /* need to restore default rotation state.. not sure
766 * if there is a cleaner way to restore properties to
767 * default state? Maybe a flag that properties should
768 * automatically be restored to default state on
769 * lastclose?
771 for (i = 0; i < priv->num_crtcs; i++) {
772 drm_object_property_set_value(&priv->crtcs[i]->base,
773 dev->mode_config.rotation_property, 0);
776 for (i = 0; i < priv->num_planes; i++) {
777 drm_object_property_set_value(&priv->planes[i]->base,
778 dev->mode_config.rotation_property, 0);
782 if (priv->fbdev) {
783 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
784 if (ret)
785 DBG("failed to restore crtc mode");
789 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
791 struct omap_drm_private *priv = dev->dev_private;
792 struct drm_pending_event *event;
793 unsigned long flags;
795 DBG("preclose: dev=%p", dev);
798 * Unlink all pending CRTC events to make sure they won't be queued up
799 * by a pending asynchronous commit.
801 spin_lock_irqsave(&dev->event_lock, flags);
802 list_for_each_entry(event, &priv->commit.events, link) {
803 if (event->file_priv == file) {
804 file->event_space += event->event->length;
805 event->file_priv = NULL;
808 spin_unlock_irqrestore(&dev->event_lock, flags);
811 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
813 DBG("postclose: dev=%p, file=%p", dev, file);
816 static const struct vm_operations_struct omap_gem_vm_ops = {
817 .fault = omap_gem_fault,
818 .open = drm_gem_vm_open,
819 .close = drm_gem_vm_close,
822 static const struct file_operations omapdriver_fops = {
823 .owner = THIS_MODULE,
824 .open = drm_open,
825 .unlocked_ioctl = drm_ioctl,
826 .release = drm_release,
827 .mmap = omap_gem_mmap,
828 .poll = drm_poll,
829 .read = drm_read,
830 .llseek = noop_llseek,
833 static struct drm_driver omap_drm_driver = {
834 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
835 .load = dev_load,
836 .unload = dev_unload,
837 .open = dev_open,
838 .lastclose = dev_lastclose,
839 .preclose = dev_preclose,
840 .postclose = dev_postclose,
841 .set_busid = drm_platform_set_busid,
842 .get_vblank_counter = drm_vblank_count,
843 .enable_vblank = omap_irq_enable_vblank,
844 .disable_vblank = omap_irq_disable_vblank,
845 #ifdef CONFIG_DEBUG_FS
846 .debugfs_init = omap_debugfs_init,
847 .debugfs_cleanup = omap_debugfs_cleanup,
848 #endif
849 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
850 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
851 .gem_prime_export = omap_gem_prime_export,
852 .gem_prime_import = omap_gem_prime_import,
853 .gem_free_object = omap_gem_free_object,
854 .gem_vm_ops = &omap_gem_vm_ops,
855 .dumb_create = omap_gem_dumb_create,
856 .dumb_map_offset = omap_gem_dumb_map_offset,
857 .dumb_destroy = drm_gem_dumb_destroy,
858 .ioctls = ioctls,
859 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
860 .fops = &omapdriver_fops,
861 .name = DRIVER_NAME,
862 .desc = DRIVER_DESC,
863 .date = DRIVER_DATE,
864 .major = DRIVER_MAJOR,
865 .minor = DRIVER_MINOR,
866 .patchlevel = DRIVER_PATCHLEVEL,
869 static int pdev_probe(struct platform_device *device)
871 int r;
873 if (omapdss_is_initialized() == false)
874 return -EPROBE_DEFER;
876 omap_crtc_pre_init();
878 r = omap_connect_dssdevs();
879 if (r) {
880 omap_crtc_pre_uninit();
881 return r;
884 DBG("%s", device->name);
885 return drm_platform_init(&omap_drm_driver, device);
888 static int pdev_remove(struct platform_device *device)
890 DBG("");
892 drm_put_dev(platform_get_drvdata(device));
894 omap_disconnect_dssdevs();
895 omap_crtc_pre_uninit();
897 return 0;
900 #ifdef CONFIG_PM_SLEEP
901 static int omap_drm_suspend(struct device *dev)
903 struct drm_device *drm_dev = dev_get_drvdata(dev);
905 drm_kms_helper_poll_disable(drm_dev);
907 return 0;
910 static int omap_drm_resume(struct device *dev)
912 struct drm_device *drm_dev = dev_get_drvdata(dev);
914 drm_kms_helper_poll_enable(drm_dev);
916 return omap_gem_resume(dev);
918 #endif
920 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
922 static struct platform_driver pdev = {
923 .driver = {
924 .name = DRIVER_NAME,
925 .pm = &omapdrm_pm_ops,
927 .probe = pdev_probe,
928 .remove = pdev_remove,
931 static int __init omap_drm_init(void)
933 int r;
935 DBG("init");
937 r = platform_driver_register(&omap_dmm_driver);
938 if (r) {
939 pr_err("DMM driver registration failed\n");
940 return r;
943 r = platform_driver_register(&pdev);
944 if (r) {
945 pr_err("omapdrm driver registration failed\n");
946 platform_driver_unregister(&omap_dmm_driver);
947 return r;
950 return 0;
953 static void __exit omap_drm_fini(void)
955 DBG("fini");
957 platform_driver_unregister(&pdev);
959 platform_driver_unregister(&omap_dmm_driver);
962 /* need late_initcall() so we load after dss_driver's are loaded */
963 late_initcall(omap_drm_init);
964 module_exit(omap_drm_fini);
966 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
967 MODULE_DESCRIPTION("OMAP DRM Display Driver");
968 MODULE_ALIAS("platform:" DRIVER_NAME);
969 MODULE_LICENSE("GPL v2");