drivers/gpu/drm/radeon/radeon_dp_mst.c

   1
   2 #include <drm/drmP.h>
   3 #include <drm/drm_dp_mst_helper.h>
   4 #include <drm/drm_fb_helper.h>
   5
   6 #include "radeon.h"
   7 #include "atom.h"
   8 #include "ni_reg.h"
   9
  10 static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector);
  11
  12 static int radeon_atom_set_enc_offset(int id)
  13 {
  14         static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET,
  15                                        EVERGREEN_CRTC1_REGISTER_OFFSET,
  16                                        EVERGREEN_CRTC2_REGISTER_OFFSET,
  17                                        EVERGREEN_CRTC3_REGISTER_OFFSET,
  18                                        EVERGREEN_CRTC4_REGISTER_OFFSET,
  19                                        EVERGREEN_CRTC5_REGISTER_OFFSET,
  20                                        0x13830 - 0x7030 };
  21
  22         return offsets[id];
  23 }
  24
  25 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary,
  26                                      struct radeon_encoder_mst *mst_enc,
  27                                      enum radeon_hpd_id hpd, bool enable)
  28 {
  29         struct drm_device *dev = primary->base.dev;
  30         struct radeon_device *rdev = dev->dev_private;
  31         uint32_t reg;
  32         int retries = 0;
  33         uint32_t temp;
  34
  35         reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
  36
  37         /* set MST mode */
  38         reg &= ~NI_DIG_FE_DIG_MODE(7);
  39         reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST);
  40
  41         if (enable)
  42                 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  43         else
  44                 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  45
  46         reg |= NI_DIG_HPD_SELECT(hpd);
  47         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
  48         WREG32(NI_DIG_BE_CNTL + primary->offset, reg);
  49
  50         if (enable) {
  51                 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
  52
  53                 do {
  54                         temp = RREG32(NI_DIG_FE_CNTL + offset);
  55                 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000);
  56                 if (retries == 10000)
  57                         DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe);
  58         }
  59         return 0;
  60 }
  61
  62 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary,
  63                                            int stream_number,
  64                                            int fe,
  65                                            int slots)
  66 {
  67         struct drm_device *dev = primary->base.dev;
  68         struct radeon_device *rdev = dev->dev_private;
  69         u32 temp, val;
  70         int retries  = 0;
  71         int satreg, satidx;
  72
  73         satreg = stream_number >> 1;
  74         satidx = stream_number & 1;
  75
  76         temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset);
  77
  78         val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);
  79
  80         val <<= (16 * satidx);
  81
  82         temp &= ~(0xffff << (16 * satidx));
  83
  84         temp |= val;
  85
  86         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  87         WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  88
  89         WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1);
  90
  91         do {
  92                 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset);
  93         } while ((temp & 0x1) && retries++ < 10000);
  94
  95         if (retries == 10000)
  96                 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset);
  97
  98         /* MTP 16 ? */
  99         return 0;
 100 }
 101
 102 static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn,
 103                                                struct radeon_encoder *primary)
 104 {
 105         struct drm_device *dev = mst_conn->base.dev;
 106         struct stream_attribs new_attribs[6];
 107         int i;
 108         int idx = 0;
 109         struct radeon_connector *radeon_connector;
 110         struct drm_connector *connector;
 111
 112         memset(new_attribs, 0, sizeof(new_attribs));
 113         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 114                 struct radeon_encoder *subenc;
 115                 struct radeon_encoder_mst *mst_enc;
 116
 117                 radeon_connector = to_radeon_connector(connector);
 118                 if (!radeon_connector->is_mst_connector)
 119                         continue;
 120
 121                 if (radeon_connector->mst_port != mst_conn)
 122                         continue;
 123
 124                 subenc = radeon_connector->mst_encoder;
 125                 mst_enc = subenc->enc_priv;
 126
 127                 if (!mst_enc->enc_active)
 128                         continue;
 129
 130                 new_attribs[idx].fe = mst_enc->fe;
 131                 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port);
 132                 idx++;
 133         }
 134
 135         for (i = 0; i < idx; i++) {
 136                 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe ||
 137                     new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) {
 138                         radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots);
 139                         mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe;
 140                         mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots;
 141                 }
 142         }
 143
 144         for (i = idx; i < mst_conn->enabled_attribs; i++) {
 145                 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0);
 146                 mst_conn->cur_stream_attribs[i].fe = 0;
 147                 mst_conn->cur_stream_attribs[i].slots = 0;
 148         }
 149         mst_conn->enabled_attribs = idx;
 150         return 0;
 151 }
 152
 153 static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y)
 154 {
 155         struct drm_device *dev = mst->base.dev;
 156         struct radeon_device *rdev = dev->dev_private;
 157         struct radeon_encoder_mst *mst_enc = mst->enc_priv;
 158         uint32_t val, temp;
 159         uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
 160         int retries = 0;
 161
 162         val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);
 163
 164         WREG32(NI_DP_MSE_RATE_CNTL + offset, val);
 165
 166         do {
 167                 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset);
 168         } while ((temp & 0x1) && (retries++ < 10000));
 169
 170         if (retries >= 10000)
 171                 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe);
 172         return 0;
 173 }
 174
 175 static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
 176 {
 177         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 178         struct radeon_connector *master = radeon_connector->mst_port;
 179         struct edid *edid;
 180         int ret = 0;
 181
 182         edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port);
 183         radeon_connector->edid = edid;
 184         DRM_DEBUG_KMS("edid retrieved %p\n", edid);
 185         if (radeon_connector->edid) {
 186                 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
 187                 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
 188                 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
 189                 return ret;
 190         }
 191         drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
 192
 193         return ret;
 194 }
 195
 196 static int radeon_dp_mst_get_modes(struct drm_connector *connector)
 197 {
 198         return radeon_dp_mst_get_ddc_modes(connector);
 199 }
 200
 201 static enum drm_mode_status
 202 radeon_dp_mst_mode_valid(struct drm_connector *connector,
 203                         struct drm_display_mode *mode)
 204 {
 205         /* TODO - validate mode against available PBN for link */
 206         if (mode->clock < 10000)
 207                 return MODE_CLOCK_LOW;
 208
 209         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 210                 return MODE_H_ILLEGAL;
 211
 212         return MODE_OK;
 213 }
 214
 215 struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector)
 216 {
 217         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 218
 219         return &radeon_connector->mst_encoder->base;
 220 }
 221
 222 static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = {
 223         .get_modes = radeon_dp_mst_get_modes,
 224         .mode_valid = radeon_dp_mst_mode_valid,
 225         .best_encoder = radeon_mst_best_encoder,
 226 };
 227
 228 static enum drm_connector_status
 229 radeon_dp_mst_detect(struct drm_connector *connector, bool force)
 230 {
 231         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 232         struct radeon_connector *master = radeon_connector->mst_port;
 233
 234         return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port);
 235 }
 236
 237 static void
 238 radeon_dp_mst_connector_destroy(struct drm_connector *connector)
 239 {
 240         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 241         struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder;
 242
 243         drm_encoder_cleanup(&radeon_encoder->base);
 244         kfree(radeon_encoder);
 245         drm_connector_cleanup(connector);
 246         kfree(radeon_connector);
 247 }
 248
 249 static void radeon_connector_dpms(struct drm_connector *connector, int mode)
 250 {
 251         DRM_DEBUG_KMS("\n");
 252 }
 253
 254 static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = {
 255         .dpms = radeon_connector_dpms,
 256         .detect = radeon_dp_mst_detect,
 257         .fill_modes = drm_helper_probe_single_connector_modes,
 258         .destroy = radeon_dp_mst_connector_destroy,
 259 };
 260
 261 static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 262                                                          struct drm_dp_mst_port *port,
 263                                                          const char *pathprop)
 264 {
 265         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 266         struct drm_device *dev = master->base.dev;
 267         struct radeon_device *rdev = dev->dev_private;
 268         struct radeon_connector *radeon_connector;
 269         struct drm_connector *connector;
 270
 271         radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL);
 272         if (!radeon_connector)
 273                 return NULL;
 274
 275         radeon_connector->is_mst_connector = true;
 276         connector = &radeon_connector->base;
 277         radeon_connector->port = port;
 278         radeon_connector->mst_port = master;
 279         DRM_DEBUG_KMS("\n");
 280
 281         drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
 282         drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs);
 283         radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
 284
 285         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 286         drm_mode_connector_set_path_property(connector, pathprop);
 287         drm_reinit_primary_mode_group(dev);
 288
 289         mutex_lock(&dev->mode_config.mutex);
 290         radeon_fb_add_connector(rdev, connector);
 291         mutex_unlock(&dev->mode_config.mutex);
 292
 293         drm_connector_register(connector);
 294         return connector;
 295 }
 296
 297 static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 298                                             struct drm_connector *connector)
 299 {
 300         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 301         struct drm_device *dev = master->base.dev;
 302         struct radeon_device *rdev = dev->dev_private;
 303
 304         drm_connector_unregister(connector);
 305         /* need to nuke the connector */
 306         mutex_lock(&dev->mode_config.mutex);
 307         /* dpms off */
 308         radeon_fb_remove_connector(rdev, connector);
 309
 310         drm_connector_cleanup(connector);
 311         mutex_unlock(&dev->mode_config.mutex);
 312         drm_reinit_primary_mode_group(dev);
 313
 314
 315         kfree(connector);
 316         DRM_DEBUG_KMS("\n");
 317 }
 318
 319 static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
 320 {
 321         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 322         struct drm_device *dev = master->base.dev;
 323
 324         drm_kms_helper_hotplug_event(dev);
 325 }
 326
 327 struct drm_dp_mst_topology_cbs mst_cbs = {
 328         .add_connector = radeon_dp_add_mst_connector,
 329         .destroy_connector = radeon_dp_destroy_mst_connector,
 330         .hotplug = radeon_dp_mst_hotplug,
 331 };
 332
 333 struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder)
 334 {
 335         struct drm_device *dev = encoder->dev;
 336         struct drm_connector *connector;
 337
 338         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 339                 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 340                 if (!connector->encoder)
 341                         continue;
 342                 if (!radeon_connector->is_mst_connector)
 343                         continue;
 344
 345                 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder);
 346                 if (connector->encoder == encoder)
 347                         return radeon_connector;
 348         }
 349         return NULL;
 350 }
 351
 352 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
 353 {
 354         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 355         struct drm_device *dev = crtc->dev;
 356         struct radeon_device *rdev = dev->dev_private;
 357         struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder);
 358         struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
 359         struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
 360         int dp_clock;
 361         struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
 362
 363         if (radeon_connector) {
 364                 radeon_connector->pixelclock_for_modeset = mode->clock;
 365                 if (radeon_connector->base.display_info.bpc)
 366                         radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
 367                 else
 368                         radeon_crtc->bpc = 8;
 369         }
 370
 371         DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock);
 372         dp_clock = dig_connector->dp_clock;
 373         radeon_crtc->ss_enabled =
 374                 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,
 375                                                  ASIC_INTERNAL_SS_ON_DP,
 376                                                  dp_clock);
 377 }
 378
 379 static void
 380 radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode)
 381 {
 382         struct drm_device *dev = encoder->dev;
 383         struct radeon_device *rdev = dev->dev_private;
 384         struct radeon_encoder *radeon_encoder, *primary;
 385         struct radeon_encoder_mst *mst_enc;
 386         struct radeon_encoder_atom_dig *dig_enc;
 387         struct radeon_connector *radeon_connector;
 388         struct drm_crtc *crtc;
 389         struct radeon_crtc *radeon_crtc;
 390         int ret, slots;
 391
 392         if (!ASIC_IS_DCE5(rdev)) {
 393                 DRM_ERROR("got mst dpms on non-DCE5\n");
 394                 return;
 395         }
 396
 397         radeon_connector = radeon_mst_find_connector(encoder);
 398         if (!radeon_connector)
 399                 return;
 400
 401         radeon_encoder = to_radeon_encoder(encoder);
 402
 403         mst_enc = radeon_encoder->enc_priv;
 404
 405         primary = mst_enc->primary;
 406
 407         dig_enc = primary->enc_priv;
 408
 409         crtc = encoder->crtc;
 410         DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links);
 411
 412         switch (mode) {
 413         case DRM_MODE_DPMS_ON:
 414                 dig_enc->active_mst_links++;
 415
 416                 radeon_crtc = to_radeon_crtc(crtc);
 417
 418                 if (dig_enc->active_mst_links == 1) {
 419                         mst_enc->fe = dig_enc->dig_encoder;
 420                         mst_enc->fe_from_be = true;
 421                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 422
 423                         atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
 424                         atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
 425                                                         0, 0, dig_enc->dig_encoder);
 426
 427                         if (radeon_dp_needs_link_train(mst_enc->connector) ||
 428                             dig_enc->active_mst_links == 1) {
 429                                 radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
 430                         }
 431
 432                 } else {
 433                         mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id);
 434                         if (mst_enc->fe == -1)
 435                                 DRM_ERROR("failed to get frontend for dig encoder\n");
 436                         mst_enc->fe_from_be = false;
 437                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 438                 }
 439
 440                 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder,
 441                               dig_enc->linkb, radeon_crtc->crtc_id);
 442
 443                 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
 444                                                radeon_connector->port,
 445                                                mst_enc->pbn, &slots);
 446                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 447
 448                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 449                                           radeon_connector->mst_port->hpd.hpd, true);
 450
 451                 mst_enc->enc_active = true;
 452                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 453                 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0);
 454
 455                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
 456                                             mst_enc->fe);
 457                 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 458
 459                 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 460
 461                 break;
 462         case DRM_MODE_DPMS_STANDBY:
 463         case DRM_MODE_DPMS_SUSPEND:
 464         case DRM_MODE_DPMS_OFF:
 465                 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links);
 466
 467                 if (!mst_enc->enc_active)
 468                         return;
 469
 470                 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 471                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 472
 473                 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 474                 /* and this can also fail */
 475                 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 476
 477                 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 478
 479                 mst_enc->enc_active = false;
 480                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 481
 482                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 483                                           radeon_connector->mst_port->hpd.hpd, false);
 484                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
 485                                             mst_enc->fe);
 486
 487                 if (!mst_enc->fe_from_be)
 488                         radeon_atom_release_dig_encoder(rdev, mst_enc->fe);
 489
 490                 mst_enc->fe_from_be = false;
 491                 dig_enc->active_mst_links--;
 492                 if (dig_enc->active_mst_links == 0) {
 493                         /* drop link */
 494                 }
 495
 496                 break;
 497         }
 498
 499 }
 500
 501 static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 502                                    const struct drm_display_mode *mode,
 503                                    struct drm_display_mode *adjusted_mode)
 504 {
 505         struct radeon_encoder_mst *mst_enc;
 506         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 507         int bpp = 24;
 508
 509         mst_enc = radeon_encoder->enc_priv;
 510
 511         mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
 512
 513         mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 514         DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
 515                       mst_enc->primary->active_device, mst_enc->primary->devices,
 516                       mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
 517
 518
 519         drm_mode_set_crtcinfo(adjusted_mode, 0);
 520         {
 521           struct radeon_connector_atom_dig *dig_connector;
 522
 523           dig_connector = mst_enc->connector->con_priv;
 524           dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
 525           dig_connector->dp_clock = radeon_dp_get_max_link_rate(&mst_enc->connector->base,
 526                                                                 dig_connector->dpcd);
 527           DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
 528                         dig_connector->dp_lane_count, dig_connector->dp_clock);
 529         }
 530         return true;
 531 }
 532
 533 static void radeon_mst_encoder_prepare(struct drm_encoder *encoder)
 534 {
 535         struct radeon_connector *radeon_connector;
 536         struct radeon_encoder *radeon_encoder, *primary;
 537         struct radeon_encoder_mst *mst_enc;
 538         struct radeon_encoder_atom_dig *dig_enc;
 539
 540         radeon_connector = radeon_mst_find_connector(encoder);
 541         if (!radeon_connector) {
 542                 DRM_DEBUG_KMS("failed to find connector %p\n", encoder);
 543                 return;
 544         }
 545         radeon_encoder = to_radeon_encoder(encoder);
 546
 547         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 548
 549         mst_enc = radeon_encoder->enc_priv;
 550
 551         primary = mst_enc->primary;
 552
 553         dig_enc = primary->enc_priv;
 554
 555         mst_enc->port = radeon_connector->port;
 556
 557         if (dig_enc->dig_encoder == -1) {
 558                 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
 559                 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder);
 560                 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder);
 561
 562
 563         }
 564         DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset);
 565 }
 566
 567 static void
 568 radeon_mst_encoder_mode_set(struct drm_encoder *encoder,
 569                              struct drm_display_mode *mode,
 570                              struct drm_display_mode *adjusted_mode)
 571 {
 572         DRM_DEBUG_KMS("\n");
 573 }
 574
 575 static void radeon_mst_encoder_commit(struct drm_encoder *encoder)
 576 {
 577         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 578         DRM_DEBUG_KMS("\n");
 579 }
 580
 581 static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = {
 582         .dpms = radeon_mst_encoder_dpms,
 583         .mode_fixup = radeon_mst_mode_fixup,
 584         .prepare = radeon_mst_encoder_prepare,
 585         .mode_set = radeon_mst_encoder_mode_set,
 586         .commit = radeon_mst_encoder_commit,
 587 };
 588
 589 void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 590 {
 591         drm_encoder_cleanup(encoder);
 592         kfree(encoder);
 593 }
 594
 595 static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = {
 596         .destroy = radeon_dp_mst_encoder_destroy,
 597 };
 598
 599 static struct radeon_encoder *
 600 radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
 601 {
 602         struct drm_device *dev = connector->base.dev;
 603         struct radeon_device *rdev = dev->dev_private;
 604         struct radeon_encoder *radeon_encoder;
 605         struct radeon_encoder_mst *mst_enc;
 606         struct drm_encoder *encoder;
 607         const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
 608         struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
 609
 610         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
 611         radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL);
 612         if (!radeon_encoder)
 613                 return NULL;
 614
 615         radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL);
 616         if (!radeon_encoder->enc_priv) {
 617                 kfree(radeon_encoder);
 618                 return NULL;
 619         }
 620         encoder = &radeon_encoder->base;
 621         switch (rdev->num_crtc) {
 622         case 1:
 623                 encoder->possible_crtcs = 0x1;
 624                 break;
 625         case 2:
 626         default:
 627                 encoder->possible_crtcs = 0x3;
 628                 break;
 629         case 4:
 630                 encoder->possible_crtcs = 0xf;
 631                 break;
 632         case 6:
 633                 encoder->possible_crtcs = 0x3f;
 634                 break;
 635         }
 636
 637         drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
 638                          DRM_MODE_ENCODER_DPMST);
 639         drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
 640
 641         mst_enc = radeon_encoder->enc_priv;
 642         mst_enc->connector = connector;
 643         mst_enc->primary = to_radeon_encoder(enc_master);
 644         radeon_encoder->is_mst_encoder = true;
 645         return radeon_encoder;
 646 }
 647
 648 int
 649 radeon_dp_mst_init(struct radeon_connector *radeon_connector)
 650 {
 651         struct drm_device *dev = radeon_connector->base.dev;
 652
 653         if (!radeon_connector->ddc_bus->has_aux)
 654                 return 0;
 655
 656         radeon_connector->mst_mgr.cbs = &mst_cbs;
 657         return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev,
 658                                             &radeon_connector->ddc_bus->aux, 16, 6,
 659                                             radeon_connector->base.base.id);
 660 }
 661
 662 int
 663 radeon_dp_mst_probe(struct radeon_connector *radeon_connector)
 664 {
 665         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 666         struct drm_device *dev = radeon_connector->base.dev;
 667         struct radeon_device *rdev = dev->dev_private;
 668         int ret;
 669         u8 msg[1];
 670
 671         if (!radeon_mst)
 672                 return 0;
 673
 674         if (!ASIC_IS_DCE5(rdev))
 675                 return 0;
 676
 677         if (dig_connector->dpcd[DP_DPCD_REV] < 0x12)
 678                 return 0;
 679
 680         ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
 681                                1);
 682         if (ret) {
 683                 if (msg[0] & DP_MST_CAP) {
 684                         DRM_DEBUG_KMS("Sink is MST capable\n");
 685                         dig_connector->is_mst = true;
 686                 } else {
 687                         DRM_DEBUG_KMS("Sink is not MST capable\n");
 688                         dig_connector->is_mst = false;
 689                 }
 690
 691         }
 692         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 693                                         dig_connector->is_mst);
 694         return dig_connector->is_mst;
 695 }
 696
 697 int
 698 radeon_dp_mst_check_status(struct radeon_connector *radeon_connector)
 699 {
 700         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 701         int retry;
 702
 703         if (dig_connector->is_mst) {
 704                 u8 esi[16] = { 0 };
 705                 int dret;
 706                 int ret = 0;
 707                 bool handled;
 708
 709                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 710                                        DP_SINK_COUNT_ESI, esi, 8);
 711 go_again:
 712                 if (dret == 8) {
 713                         DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 714                         ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled);
 715
 716                         if (handled) {
 717                                 for (retry = 0; retry < 3; retry++) {
 718                                         int wret;
 719                                         wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
 720                                                                  DP_SINK_COUNT_ESI + 1, &esi[1], 3);
 721                                         if (wret == 3)
 722                                                 break;
 723                                 }
 724
 725                                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 726                                                         DP_SINK_COUNT_ESI, esi, 8);
 727                                 if (dret == 8) {
 728                                         DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 729                                         goto go_again;
 730                                 }
 731                         } else
 732                                 ret = 0;
 733
 734                         return ret;
 735                 } else {
 736                         DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret);
 737                         dig_connector->is_mst = false;
 738                         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 739                                                         dig_connector->is_mst);
 740                         /* send a hotplug event */
 741                 }
 742         }
 743         return -EINVAL;
 744 }
 745
 746 #if defined(CONFIG_DEBUG_FS)
 747
 748 static int radeon_debugfs_mst_info(struct seq_file *m, void *data)
 749 {
 750         struct drm_info_node *node = (struct drm_info_node *)m->private;
 751         struct drm_device *dev = node->minor->dev;
 752         struct drm_connector *connector;
 753         struct radeon_connector *radeon_connector;
 754         struct radeon_connector_atom_dig *dig_connector;
 755         int i;
 756
 757         drm_modeset_lock_all(dev);
 758         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 759                 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
 760                         continue;
 761
 762                 radeon_connector = to_radeon_connector(connector);
 763                 dig_connector = radeon_connector->con_priv;
 764                 if (radeon_connector->is_mst_connector)
 765                         continue;
 766                 if (!dig_connector->is_mst)
 767                         continue;
 768                 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr);
 769
 770                 for (i = 0; i < radeon_connector->enabled_attribs; i++)
 771                         seq_printf(m, "attrib %d: %d %d\n", i,
 772                                    radeon_connector->cur_stream_attribs[i].fe,
 773                                    radeon_connector->cur_stream_attribs[i].slots);
 774         }
 775         drm_modeset_unlock_all(dev);
 776         return 0;
 777 }
 778
 779 static struct drm_info_list radeon_debugfs_mst_list[] = {
 780         {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL},
 781 };
 782 #endif
 783
 784 int radeon_mst_debugfs_init(struct radeon_device *rdev)
 785 {
 786 #if defined(CONFIG_DEBUG_FS)
 787         return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1);
 788 #endif
 789         return 0;
 790 }