?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.2.1
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath9k / ath9k.h
bloba7a81b3969cec7e79b2cb73959c4d8ff1fb7489e
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
25 #include <linux/time.h>
26
27 #include "common.h"
28 #include "debug.h"
29 #include "mci.h"
30 #include "dfs.h"
31
32 struct ath_node;
33 struct ath_vif;
34
35 extern struct ieee80211_ops ath9k_ops;
36 extern int ath9k_modparam_nohwcrypt;
37 extern int ath9k_led_blink;
38 extern bool is_ath9k_unloaded;
39 extern int ath9k_use_chanctx;
40
41 /*************************/
42 /* Descriptor Management */
43 /*************************/
44
45 #define ATH_TXSTATUS_RING_SIZE 512
46
47 /* Macro to expand scalars to 64-bit objects */
48 #define ito64(x) (sizeof(x) == 1) ? \
49 (((unsigned long long int)(x)) & (0xff)) : \
50 (sizeof(x) == 2) ? \
51 (((unsigned long long int)(x)) & 0xffff) : \
52 ((sizeof(x) == 4) ? \
53 (((unsigned long long int)(x)) & 0xffffffff) : \
54 (unsigned long long int)(x))
55
56 #define ATH_TXBUF_RESET(_bf) do { \
57 (_bf)->bf_lastbf = NULL; \
58 (_bf)->bf_next = NULL; \
59 memset(&((_bf)->bf_state), 0, \
60 sizeof(struct ath_buf_state)); \
61 } while (0)
62
63 #define DS2PHYS(_dd, _ds) \
64 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
65 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
66 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
67
68 struct ath_descdma {
69 void *dd_desc;
70 dma_addr_t dd_desc_paddr;
71 u32 dd_desc_len;
72 };
73
74 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
75 struct list_head *head, const char *name,
76 int nbuf, int ndesc, bool is_tx);
77
78 /***********/
79 /* RX / TX */
80 /***********/
81
82 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
83
84 /* increment with wrap-around */
85 #define INCR(_l, _sz) do { \
86 (_l)++; \
87 (_l) &= ((_sz) - 1); \
88 } while (0)
89
90 #define ATH_RXBUF 512
91 #define ATH_TXBUF 512
92 #define ATH_TXBUF_RESERVE 5
93 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
94 #define ATH_TXMAXTRY 13
95 #define ATH_MAX_SW_RETRIES 30
96
97 #define TID_TO_WME_AC(_tid) \
98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
101 IEEE80211_AC_VO)
102
103 #define ATH_AGGR_DELIM_SZ 4
104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
105 /* number of delimiters for encryption padding */
106 #define ATH_AGGR_ENCRYPTDELIM 10
107 /* minimum h/w qdepth to be sustained to maximize aggregation */
108 #define ATH_AGGR_MIN_QDEPTH 2
109 /* minimum h/w qdepth for non-aggregated traffic */
110 #define ATH_NON_AGGR_MIN_QDEPTH 8
111 #define ATH_TX_COMPLETE_POLL_INT 1000
112 #define ATH_TXFIFO_DEPTH 8
113 #define ATH_TX_ERROR 0x01
114
115 /* Stop tx traffic 1ms before the GO goes away */
116 #define ATH_P2P_PS_STOP_TIME 1000
117
118 #define IEEE80211_SEQ_SEQ_SHIFT 4
119 #define IEEE80211_SEQ_MAX 4096
120 #define IEEE80211_WEP_IVLEN 3
121 #define IEEE80211_WEP_KIDLEN 1
122 #define IEEE80211_WEP_CRCLEN 4
123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
124 (IEEE80211_WEP_IVLEN + \
125 IEEE80211_WEP_KIDLEN + \
126 IEEE80211_WEP_CRCLEN))
127
128 /* return whether a bit at index _n in bitmap _bm is set
129 * _sz is the size of the bitmap */
130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
132
133 /* return block-ack bitmap index given sequence and starting sequence */
134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
135
136 /* return the seqno for _start + _offset */
137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
138
139 /* returns delimiter padding required given the packet length */
140 #define ATH_AGGR_GET_NDELIM(_len) \
141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
143
144 #define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
146
147 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
148
149 #define IS_HT_RATE(rate) (rate & 0x80)
150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
152
153 enum {
154 WLAN_RC_PHY_OFDM,
155 WLAN_RC_PHY_CCK,
156 };
157
158 struct ath_txq {
159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
160 u32 axq_qnum; /* ath9k hardware queue number */
161 void *axq_link;
162 struct list_head axq_q;
163 spinlock_t axq_lock;
164 u32 axq_depth;
165 u32 axq_ampdu_depth;
166 bool stopped;
167 bool axq_tx_inprogress;
168 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
169 u8 txq_headidx;
170 u8 txq_tailidx;
171 int pending_frames;
172 struct sk_buff_head complete_q;
173 };
174
175 struct ath_atx_ac {
176 struct ath_txq *txq;
177 struct list_head list;
178 struct list_head tid_q;
179 bool clear_ps_filter;
180 bool sched;
181 };
182
183 struct ath_frame_info {
184 struct ath_buf *bf;
185 u16 framelen;
186 s8 txq;
187 u8 keyix;
188 u8 rtscts_rate;
189 u8 retries : 7;
190 u8 baw_tracked : 1;
191 u8 tx_power;
192 enum ath9k_key_type keytype:2;
193 };
194
195 struct ath_rxbuf {
196 struct list_head list;
197 struct sk_buff *bf_mpdu;
198 void *bf_desc;
199 dma_addr_t bf_daddr;
200 dma_addr_t bf_buf_addr;
201 };
202
203 /**
204 * enum buffer_type - Buffer type flags
205 *
206 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
207 * @BUF_AGGR: Indicates whether the buffer can be aggregated
208 * (used in aggregation scheduling)
209 */
210 enum buffer_type {
211 BUF_AMPDU = BIT(0),
212 BUF_AGGR = BIT(1),
213 };
214
215 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
216 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
217
218 struct ath_buf_state {
219 u8 bf_type;
220 u8 bfs_paprd;
221 u8 ndelim;
222 bool stale;
223 u16 seqno;
224 unsigned long bfs_paprd_timestamp;
225 };
226
227 struct ath_buf {
228 struct list_head list;
229 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
230 an aggregate) */
231 struct ath_buf *bf_next; /* next subframe in the aggregate */
232 struct sk_buff *bf_mpdu; /* enclosing frame structure */
233 void *bf_desc; /* virtual addr of desc */
234 dma_addr_t bf_daddr; /* physical addr of desc */
235 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
236 struct ieee80211_tx_rate rates[4];
237 struct ath_buf_state bf_state;
238 };
239
240 struct ath_atx_tid {
241 struct list_head list;
242 struct sk_buff_head buf_q;
243 struct sk_buff_head retry_q;
244 struct ath_node *an;
245 struct ath_atx_ac *ac;
246 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
247 u16 seq_start;
248 u16 seq_next;
249 u16 baw_size;
250 u8 tidno;
251 int baw_head; /* first un-acked tx buffer */
252 int baw_tail; /* next unused tx buffer slot */
253
254 s8 bar_index;
255 bool sched;
256 bool active;
257 };
258
259 struct ath_node {
260 struct ath_softc *sc;
261 struct ieee80211_sta *sta; /* station struct we're part of */
262 struct ieee80211_vif *vif; /* interface with which we're associated */
263 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
264 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
265
266 u16 maxampdu;
267 u8 mpdudensity;
268 s8 ps_key;
269
270 bool sleeping;
271 bool no_ps_filter;
272
273 #ifdef CONFIG_ATH9K_STATION_STATISTICS
274 struct ath_rx_rate_stats rx_rate_stats;
275 #endif
276 u8 key_idx[4];
277
278 u32 ackto;
279 struct list_head list;
280 };
281
282 struct ath_tx_control {
283 struct ath_txq *txq;
284 struct ath_node *an;
285 struct ieee80211_sta *sta;
286 u8 paprd;
287 bool force_channel;
288 };
289
290
291 /**
292 * @txq_map: Index is mac80211 queue number. This is
293 * not necessarily the same as the hardware queue number
294 * (axq_qnum).
295 */
296 struct ath_tx {
297 u32 txqsetup;
298 spinlock_t txbuflock;
299 struct list_head txbuf;
300 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
301 struct ath_descdma txdma;
302 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
303 struct ath_txq *uapsdq;
304 u32 txq_max_pending[IEEE80211_NUM_ACS];
305 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
306 };
307
308 struct ath_rx_edma {
309 struct sk_buff_head rx_fifo;
310 u32 rx_fifo_hwsize;
311 };
312
313 struct ath_rx {
314 u8 defant;
315 u8 rxotherant;
316 bool discard_next;
317 u32 *rxlink;
318 u32 num_pkts;
319 struct list_head rxbuf;
320 struct ath_descdma rxdma;
321 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
322
323 struct ath_rxbuf *buf_hold;
324 struct sk_buff *frag;
325
326 u32 ampdu_ref;
327 };
328
329 /*******************/
330 /* Channel Context */
331 /*******************/
332
333 struct ath_chanctx {
334 struct cfg80211_chan_def chandef;
335 struct list_head vifs;
336 struct list_head acq[IEEE80211_NUM_ACS];
337 int hw_queue_base;
338
339 /* do not dereference, use for comparison only */
340 struct ieee80211_vif *primary_sta;
341
342 struct ath_beacon_config beacon;
343 struct ath9k_hw_cal_data caldata;
344 struct timespec tsf_ts;
345 u64 tsf_val;
346 u32 last_beacon;
347
348 int flush_timeout;
349 u16 txpower;
350 u16 cur_txpower;
351 bool offchannel;
352 bool stopped;
353 bool active;
354 bool assigned;
355 bool switch_after_beacon;
356
357 short nvifs;
358 short nvifs_assigned;
359 unsigned int rxfilter;
360 };
361
362 enum ath_chanctx_event {
363 ATH_CHANCTX_EVENT_BEACON_PREPARE,
364 ATH_CHANCTX_EVENT_BEACON_SENT,
365 ATH_CHANCTX_EVENT_TSF_TIMER,
366 ATH_CHANCTX_EVENT_BEACON_RECEIVED,
367 ATH_CHANCTX_EVENT_AUTHORIZED,
368 ATH_CHANCTX_EVENT_SWITCH,
369 ATH_CHANCTX_EVENT_ASSIGN,
370 ATH_CHANCTX_EVENT_UNASSIGN,
371 ATH_CHANCTX_EVENT_CHANGE,
372 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,
373 };
374
375 enum ath_chanctx_state {
376 ATH_CHANCTX_STATE_IDLE,
377 ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
378 ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
379 ATH_CHANCTX_STATE_SWITCH,
380 ATH_CHANCTX_STATE_FORCE_ACTIVE,
381 };
382
383 struct ath_chanctx_sched {
384 bool beacon_pending;
385 bool beacon_adjust;
386 bool offchannel_pending;
387 bool wait_switch;
388 bool force_noa_update;
389 bool extend_absence;
390 bool mgd_prepare_tx;
391 enum ath_chanctx_state state;
392 u8 beacon_miss;
393
394 u32 next_tbtt;
395 u32 switch_start_time;
396 unsigned int offchannel_duration;
397 unsigned int channel_switch_time;
398
399 /* backup, in case the hardware timer fails */
400 struct timer_list timer;
401 };
402
403 enum ath_offchannel_state {
404 ATH_OFFCHANNEL_IDLE,
405 ATH_OFFCHANNEL_PROBE_SEND,
406 ATH_OFFCHANNEL_PROBE_WAIT,
407 ATH_OFFCHANNEL_SUSPEND,
408 ATH_OFFCHANNEL_ROC_START,
409 ATH_OFFCHANNEL_ROC_WAIT,
410 ATH_OFFCHANNEL_ROC_DONE,
411 };
412
413 struct ath_offchannel {
414 struct ath_chanctx chan;
415 struct timer_list timer;
416 struct cfg80211_scan_request *scan_req;
417 struct ieee80211_vif *scan_vif;
418 int scan_idx;
419 enum ath_offchannel_state state;
420 struct ieee80211_channel *roc_chan;
421 struct ieee80211_vif *roc_vif;
422 int roc_duration;
423 int duration;
424 };
425
426 #define case_rtn_string(val) case val: return #val
427
428 #define ath_for_each_chanctx(_sc, _ctx) \
429 for (ctx = &sc->chanctx[0]; \
430 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \
431 ctx++)
432
433 void ath_chanctx_init(struct ath_softc *sc);
434 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
435 struct cfg80211_chan_def *chandef);
436
437 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
438
439 static inline struct ath_chanctx *
440 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
441 {
442 struct ath_chanctx **ptr = (void *) ctx->drv_priv;
443 return *ptr;
444 }
445
446 bool ath9k_is_chanctx_enabled(void);
447 void ath9k_fill_chanctx_ops(void);
448 void ath9k_init_channel_context(struct ath_softc *sc);
449 void ath9k_offchannel_init(struct ath_softc *sc);
450 void ath9k_deinit_channel_context(struct ath_softc *sc);
451 int ath9k_init_p2p(struct ath_softc *sc);
452 void ath9k_deinit_p2p(struct ath_softc *sc);
453 void ath9k_p2p_remove_vif(struct ath_softc *sc,
454 struct ieee80211_vif *vif);
455 void ath9k_p2p_beacon_sync(struct ath_softc *sc);
456 void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
457 struct ieee80211_vif *vif);
458 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
459 struct sk_buff *skb);
460 void ath9k_p2p_ps_timer(void *priv);
461 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
462 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
463 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
464
465 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
466 enum ath_chanctx_event ev);
467 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
468 enum ath_chanctx_event ev);
469 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
470 enum ath_chanctx_event ev);
471 void ath_chanctx_set_next(struct ath_softc *sc, bool force);
472 void ath_offchannel_next(struct ath_softc *sc);
473 void ath_scan_complete(struct ath_softc *sc, bool abort);
474 void ath_roc_complete(struct ath_softc *sc, bool abort);
475 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);
476
477 #else
478
479 static inline bool ath9k_is_chanctx_enabled(void)
480 {
481 return false;
482 }
483 static inline void ath9k_fill_chanctx_ops(void)
484 {
485 }
486 static inline void ath9k_init_channel_context(struct ath_softc *sc)
487 {
488 }
489 static inline void ath9k_offchannel_init(struct ath_softc *sc)
490 {
491 }
492 static inline void ath9k_deinit_channel_context(struct ath_softc *sc)
493 {
494 }
495 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
496 enum ath_chanctx_event ev)
497 {
498 }
499 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
500 enum ath_chanctx_event ev)
501 {
502 }
503 static inline void ath_chanctx_event(struct ath_softc *sc,
504 struct ieee80211_vif *vif,
505 enum ath_chanctx_event ev)
506 {
507 }
508 static inline int ath9k_init_p2p(struct ath_softc *sc)
509 {
510 return 0;
511 }
512 static inline void ath9k_deinit_p2p(struct ath_softc *sc)
513 {
514 }
515 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,
516 struct ieee80211_vif *vif)
517 {
518 }
519 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)
520 {
521 }
522 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
523 struct ieee80211_vif *vif)
524 {
525 }
526 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
527 struct sk_buff *skb)
528 {
529 }
530 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
531 {
532 }
533 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
534 struct ath_chanctx *ctx)
535 {
536 }
537 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
538 struct ath_chanctx *ctx)
539 {
540 }
541 static inline void ath_chanctx_check_active(struct ath_softc *sc,
542 struct ath_chanctx *ctx)
543 {
544 }
545
546 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
547
548 void ath_startrecv(struct ath_softc *sc);
549 bool ath_stoprecv(struct ath_softc *sc);
550 u32 ath_calcrxfilter(struct ath_softc *sc);
551 int ath_rx_init(struct ath_softc *sc, int nbufs);
552 void ath_rx_cleanup(struct ath_softc *sc);
553 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
554 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
555 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
556 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
557 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
558 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
559 bool ath_drain_all_txq(struct ath_softc *sc);
560 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
561 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
562 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
563 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
564 void ath_txq_schedule_all(struct ath_softc *sc);
565 int ath_tx_init(struct ath_softc *sc, int nbufs);
566 int ath_txq_update(struct ath_softc *sc, int qnum,
567 struct ath9k_tx_queue_info *q);
568 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
569 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
570 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
571 struct ath_tx_control *txctl);
572 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
573 struct sk_buff *skb);
574 void ath_tx_tasklet(struct ath_softc *sc);
575 void ath_tx_edma_tasklet(struct ath_softc *sc);
576 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
577 u16 tid, u16 *ssn);
578 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
579 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
580
581 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
582 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
583 struct ath_node *an);
584 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
585 struct ieee80211_sta *sta,
586 u16 tids, int nframes,
587 enum ieee80211_frame_release_type reason,
588 bool more_data);
589
590 /********/
591 /* VIFs */
592 /********/
593
594 #define P2P_DEFAULT_CTWIN 10
595
596 struct ath_vif {
597 struct list_head list;
598
599 u16 seq_no;
600
601 /* BSS info */
602 u8 bssid[ETH_ALEN] __aligned(2);
603 u16 aid;
604 bool assoc;
605
606 struct ieee80211_vif *vif;
607 struct ath_node mcast_node;
608 int av_bslot;
609 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
610 struct ath_buf *av_bcbuf;
611 struct ath_chanctx *chanctx;
612
613 /* P2P Client */
614 struct ieee80211_noa_data noa;
615
616 /* P2P GO */
617 u8 noa_index;
618 u32 offchannel_start;
619 u32 offchannel_duration;
620
621 /* These are used for both periodic and one-shot */
622 u32 noa_start;
623 u32 noa_duration;
624 bool periodic_noa;
625 bool oneshot_noa;
626 };
627
628 struct ath9k_vif_iter_data {
629 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
630 u8 mask[ETH_ALEN]; /* bssid mask */
631 bool has_hw_macaddr;
632 u8 slottime;
633 bool beacons;
634
635 int naps; /* number of AP vifs */
636 int nmeshes; /* number of mesh vifs */
637 int nstations; /* number of station vifs */
638 int nwds; /* number of WDS vifs */
639 int nadhocs; /* number of adhoc vifs */
640 struct ieee80211_vif *primary_sta;
641 };
642
643 void ath9k_calculate_iter_data(struct ath_softc *sc,
644 struct ath_chanctx *ctx,
645 struct ath9k_vif_iter_data *iter_data);
646 void ath9k_calculate_summary_state(struct ath_softc *sc,
647 struct ath_chanctx *ctx);
648 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif);
649
650 /*******************/
651 /* Beacon Handling */
652 /*******************/
653
654 /*
655 * Regardless of the number of beacons we stagger, (i.e. regardless of the
656 * number of BSSIDs) if a given beacon does not go out even after waiting this
657 * number of beacon intervals, the game's up.
658 */
659 #define BSTUCK_THRESH 9
660 #define ATH_BCBUF 8
661 #define ATH_DEFAULT_BINTVAL 100 /* TU */
662 #define ATH_DEFAULT_BMISS_LIMIT 10
663
664 #define TSF_TO_TU(_h,_l) \
665 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
666
667 struct ath_beacon {
668 enum {
669 OK, /* no change needed */
670 UPDATE, /* update pending */
671 COMMIT /* beacon sent, commit change */
672 } updateslot; /* slot time update fsm */
673
674 u32 beaconq;
675 u32 bmisscnt;
676 struct ieee80211_vif *bslot[ATH_BCBUF];
677 int slottime;
678 int slotupdate;
679 struct ath_descdma bdma;
680 struct ath_txq *cabq;
681 struct list_head bbuf;
682
683 bool tx_processed;
684 bool tx_last;
685 };
686
687 void ath9k_beacon_tasklet(unsigned long data);
688 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
689 u32 changed);
690 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
691 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
692 void ath9k_set_beacon(struct ath_softc *sc);
693 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
694 void ath9k_csa_update(struct ath_softc *sc);
695
696 /*******************/
697 /* Link Monitoring */
698 /*******************/
699
700 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
701 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
702 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
703 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
704 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
705 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
706 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
707 #define ATH_ANI_MAX_SKIP_COUNT 10
708 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
709 #define ATH_PLL_WORK_INTERVAL 100
710
711 void ath_tx_complete_poll_work(struct work_struct *work);
712 void ath_reset_work(struct work_struct *work);
713 bool ath_hw_check(struct ath_softc *sc);
714 void ath_hw_pll_work(struct work_struct *work);
715 void ath_paprd_calibrate(struct work_struct *work);
716 void ath_ani_calibrate(unsigned long data);
717 void ath_start_ani(struct ath_softc *sc);
718 void ath_stop_ani(struct ath_softc *sc);
719 void ath_check_ani(struct ath_softc *sc);
720 int ath_update_survey_stats(struct ath_softc *sc);
721 void ath_update_survey_nf(struct ath_softc *sc, int channel);
722 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
723 void ath_ps_full_sleep(unsigned long data);
724 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
725 bool sw_pending, bool timeout_override);
726
727 /**********/
728 /* BTCOEX */
729 /**********/
730
731 #define ATH_DUMP_BTCOEX(_s, _val) \
732 do { \
733 len += scnprintf(buf + len, size - len, \
734 "%20s : %10d\n", _s, (_val)); \
735 } while (0)
736
737 enum bt_op_flags {
738 BT_OP_PRIORITY_DETECTED,
739 BT_OP_SCAN,
740 };
741
742 struct ath_btcoex {
743 spinlock_t btcoex_lock;
744 struct timer_list period_timer; /* Timer for BT period */
745 struct timer_list no_stomp_timer;
746 u32 bt_priority_cnt;
747 unsigned long bt_priority_time;
748 unsigned long op_flags;
749 int bt_stomp_type; /* Types of BT stomping */
750 u32 btcoex_no_stomp; /* in msec */
751 u32 btcoex_period; /* in msec */
752 u32 btscan_no_stomp; /* in msec */
753 u32 duty_cycle;
754 u32 bt_wait_time;
755 int rssi_count;
756 struct ath_mci_profile mci;
757 u8 stomp_audio;
758 };
759
760 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
761 int ath9k_init_btcoex(struct ath_softc *sc);
762 void ath9k_deinit_btcoex(struct ath_softc *sc);
763 void ath9k_start_btcoex(struct ath_softc *sc);
764 void ath9k_stop_btcoex(struct ath_softc *sc);
765 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
766 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
767 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
768 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
769 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
770 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
771 #else
772 static inline int ath9k_init_btcoex(struct ath_softc *sc)
773 {
774 return 0;
775 }
776 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
777 {
778 }
779 static inline void ath9k_start_btcoex(struct ath_softc *sc)
780 {
781 }
782 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
783 {
784 }
785 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
786 u32 status)
787 {
788 }
789 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
790 u32 max_4ms_framelen)
791 {
792 return 0;
793 }
794 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
795 {
796 }
797 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
798 {
799 return 0;
800 }
801 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
802
803 /********************/
804 /* LED Control */
805 /********************/
806
807 #define ATH_LED_PIN_DEF 1
808 #define ATH_LED_PIN_9287 8
809 #define ATH_LED_PIN_9300 10
810 #define ATH_LED_PIN_9485 6
811 #define ATH_LED_PIN_9462 4
812
813 #ifdef CONFIG_MAC80211_LEDS
814 void ath_init_leds(struct ath_softc *sc);
815 void ath_deinit_leds(struct ath_softc *sc);
816 void ath_fill_led_pin(struct ath_softc *sc);
817 #else
818 static inline void ath_init_leds(struct ath_softc *sc)
819 {
820 }
821
822 static inline void ath_deinit_leds(struct ath_softc *sc)
823 {
824 }
825 static inline void ath_fill_led_pin(struct ath_softc *sc)
826 {
827 }
828 #endif
829
830 /************************/
831 /* Wake on Wireless LAN */
832 /************************/
833
834 #ifdef CONFIG_ATH9K_WOW
835 void ath9k_init_wow(struct ieee80211_hw *hw);
836 void ath9k_deinit_wow(struct ieee80211_hw *hw);
837 int ath9k_suspend(struct ieee80211_hw *hw,
838 struct cfg80211_wowlan *wowlan);
839 int ath9k_resume(struct ieee80211_hw *hw);
840 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
841 #else
842 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
843 {
844 }
845 static inline void ath9k_deinit_wow(struct ieee80211_hw *hw)
846 {
847 }
848 static inline int ath9k_suspend(struct ieee80211_hw *hw,
849 struct cfg80211_wowlan *wowlan)
850 {
851 return 0;
852 }
853 static inline int ath9k_resume(struct ieee80211_hw *hw)
854 {
855 return 0;
856 }
857 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
858 {
859 }
860 #endif /* CONFIG_ATH9K_WOW */
861
862 /*******************************/
863 /* Antenna diversity/combining */
864 /*******************************/
865
866 #define ATH_ANT_RX_CURRENT_SHIFT 4
867 #define ATH_ANT_RX_MAIN_SHIFT 2
868 #define ATH_ANT_RX_MASK 0x3
869
870 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
871 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
872 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
873 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
874 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
875 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
876 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
877 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
878 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
879
880 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
881 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
882 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
883
884 struct ath_ant_comb {
885 u16 count;
886 u16 total_pkt_count;
887 bool scan;
888 bool scan_not_start;
889 int main_total_rssi;
890 int alt_total_rssi;
891 int alt_recv_cnt;
892 int main_recv_cnt;
893 int rssi_lna1;
894 int rssi_lna2;
895 int rssi_add;
896 int rssi_sub;
897 int rssi_first;
898 int rssi_second;
899 int rssi_third;
900 int ant_ratio;
901 int ant_ratio2;
902 bool alt_good;
903 int quick_scan_cnt;
904 enum ath9k_ant_div_comb_lna_conf main_conf;
905 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
906 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
907 bool first_ratio;
908 bool second_ratio;
909 unsigned long scan_start_time;
910
911 /*
912 * Card-specific config values.
913 */
914 int low_rssi_thresh;
915 int fast_div_bias;
916 };
917
918 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
919
920 /********************/
921 /* Main driver core */
922 /********************/
923
924 #define ATH9K_PCI_CUS198 0x0001
925 #define ATH9K_PCI_CUS230 0x0002
926 #define ATH9K_PCI_CUS217 0x0004
927 #define ATH9K_PCI_CUS252 0x0008
928 #define ATH9K_PCI_WOW 0x0010
929 #define ATH9K_PCI_BT_ANT_DIV 0x0020
930 #define ATH9K_PCI_D3_L1_WAR 0x0040
931 #define ATH9K_PCI_AR9565_1ANT 0x0080
932 #define ATH9K_PCI_AR9565_2ANT 0x0100
933 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
934 #define ATH9K_PCI_KILLER 0x0400
935 #define ATH9K_PCI_LED_ACT_HI 0x0800
936
937 /*
938 * Default cache line size, in bytes.
939 * Used when PCI device not fully initialized by bootrom/BIOS
940 */
941 #define DEFAULT_CACHELINE 32
942 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
943 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
944 #define MAX_GTT_CNT 5
945
946 /* Powersave flags */
947 #define PS_WAIT_FOR_BEACON BIT(0)
948 #define PS_WAIT_FOR_CAB BIT(1)
949 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
950 #define PS_WAIT_FOR_TX_ACK BIT(3)
951 #define PS_BEACON_SYNC BIT(4)
952 #define PS_WAIT_FOR_ANI BIT(5)
953
954 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
955
956 struct ath_softc {
957 struct ieee80211_hw *hw;
958 struct device *dev;
959
960 struct survey_info *cur_survey;
961 struct survey_info survey[ATH9K_NUM_CHANNELS];
962
963 struct tasklet_struct intr_tq;
964 struct tasklet_struct bcon_tasklet;
965 struct ath_hw *sc_ah;
966 void __iomem *mem;
967 int irq;
968 spinlock_t sc_serial_rw;
969 spinlock_t sc_pm_lock;
970 spinlock_t sc_pcu_lock;
971 struct mutex mutex;
972 struct work_struct paprd_work;
973 struct work_struct hw_reset_work;
974 struct completion paprd_complete;
975 wait_queue_head_t tx_wait;
976
977 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
978 struct work_struct chanctx_work;
979 struct ath_gen_timer *p2p_ps_timer;
980 struct ath_vif *p2p_ps_vif;
981 struct ath_chanctx_sched sched;
982 struct ath_offchannel offchannel;
983 struct ath_chanctx *next_chan;
984 struct completion go_beacon;
985 #endif
986
987 unsigned long driver_data;
988
989 u8 gtt_cnt;
990 u32 intrstatus;
991 u16 ps_flags; /* PS_* */
992 bool ps_enabled;
993 bool ps_idle;
994 short nbcnvifs;
995 unsigned long ps_usecount;
996
997 struct ath_rx rx;
998 struct ath_tx tx;
999 struct ath_beacon beacon;
1000
1001 struct cfg80211_chan_def cur_chandef;
1002 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
1003 struct ath_chanctx *cur_chan;
1004 spinlock_t chan_lock;
1005
1006 #ifdef CONFIG_MAC80211_LEDS
1007 bool led_registered;
1008 char led_name[32];
1009 struct led_classdev led_cdev;
1010 #endif
1011
1012 #ifdef CONFIG_ATH9K_DEBUGFS
1013 struct ath9k_debug debug;
1014 #endif
1015 struct delayed_work tx_complete_work;
1016 struct delayed_work hw_pll_work;
1017 struct timer_list sleep_timer;
1018
1019 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1020 struct ath_btcoex btcoex;
1021 struct ath_mci_coex mci_coex;
1022 struct work_struct mci_work;
1023 #endif
1024
1025 struct ath_descdma txsdma;
1026
1027 struct ath_ant_comb ant_comb;
1028 u8 ant_tx, ant_rx;
1029 struct dfs_pattern_detector *dfs_detector;
1030 u64 dfs_prev_pulse_ts;
1031 u32 wow_enabled;
1032
1033 struct ath_spec_scan_priv spec_priv;
1034
1035 struct ieee80211_vif *tx99_vif;
1036 struct sk_buff *tx99_skb;
1037 bool tx99_state;
1038 s16 tx99_power;
1039
1040 #ifdef CONFIG_ATH9K_WOW
1041 u32 wow_intr_before_sleep;
1042 bool force_wow;
1043 #endif
1044 };
1045
1046 /********/
1047 /* TX99 */
1048 /********/
1049
1050 #ifdef CONFIG_ATH9K_TX99
1051 void ath9k_tx99_init_debug(struct ath_softc *sc);
1052 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
1053 struct ath_tx_control *txctl);
1054 #else
1055 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
1056 {
1057 }
1058 static inline int ath9k_tx99_send(struct ath_softc *sc,
1059 struct sk_buff *skb,
1060 struct ath_tx_control *txctl)
1061 {
1062 return 0;
1063 }
1064 #endif /* CONFIG_ATH9K_TX99 */
1065
1066 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
1067 {
1068 common->bus_ops->read_cachesize(common, csz);
1069 }
1070
1071 void ath9k_tasklet(unsigned long data);
1072 int ath_cabq_update(struct ath_softc *);
1073 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
1074 irqreturn_t ath_isr(int irq, void *dev);
1075 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);
1076 void ath_cancel_work(struct ath_softc *sc);
1077 void ath_restart_work(struct ath_softc *sc);
1078 int ath9k_init_device(u16 devid, struct ath_softc *sc,
1079 const struct ath_bus_ops *bus_ops);
1080 void ath9k_deinit_device(struct ath_softc *sc);
1081 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
1082 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1083 void ath_start_rfkill_poll(struct ath_softc *sc);
1084 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
1085 void ath9k_ps_wakeup(struct ath_softc *sc);
1086 void ath9k_ps_restore(struct ath_softc *sc);
1087
1088 #ifdef CONFIG_ATH9K_PCI
1089 int ath_pci_init(void);
1090 void ath_pci_exit(void);
1091 #else
1092 static inline int ath_pci_init(void) { return 0; };
1093 static inline void ath_pci_exit(void) {};
1094 #endif
1095
1096 #ifdef CONFIG_ATH9K_AHB
1097 int ath_ahb_init(void);
1098 void ath_ahb_exit(void);
1099 #else
1100 static inline int ath_ahb_init(void) { return 0; };
1101 static inline void ath_ahb_exit(void) {};
1102 #endif
1103
1104 #endif /* ATH9K_H */
Linux with added FPC-III support