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Linux 4.2.1
[linux/fpc-iii.git] / drivers / rtc / rtc-ds1307.c
blob6e76de1856fc14c6ae5168cf0980735ec02d5550
1 /*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
3 *
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
7 * Copyright (C) 2012 Bertrand Achard (nvram access fixes)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/slab.h>
17 #include <linux/i2c.h>
18 #include <linux/string.h>
19 #include <linux/rtc.h>
20 #include <linux/bcd.h>
21 #include <linux/rtc/ds1307.h>
22
23 /*
24 * We can't determine type by probing, but if we expect pre-Linux code
25 * to have set the chip up as a clock (turning on the oscillator and
26 * setting the date and time), Linux can ignore the non-clock features.
27 * That's a natural job for a factory or repair bench.
28 */
29 enum ds_type {
30 ds_1307,
31 ds_1337,
32 ds_1338,
33 ds_1339,
34 ds_1340,
35 ds_1388,
36 ds_3231,
37 m41t00,
38 mcp794xx,
39 rx_8025,
40 last_ds_type /* always last */
41 /* rs5c372 too? different address... */
42 };
43
44
45 /* RTC registers don't differ much, except for the century flag */
46 #define DS1307_REG_SECS 0x00 /* 00-59 */
47 # define DS1307_BIT_CH 0x80
48 # define DS1340_BIT_nEOSC 0x80
49 # define MCP794XX_BIT_ST 0x80
50 #define DS1307_REG_MIN 0x01 /* 00-59 */
51 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
52 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
53 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
54 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
55 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
56 #define DS1307_REG_WDAY 0x03 /* 01-07 */
57 # define MCP794XX_BIT_VBATEN 0x08
58 #define DS1307_REG_MDAY 0x04 /* 01-31 */
59 #define DS1307_REG_MONTH 0x05 /* 01-12 */
60 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
61 #define DS1307_REG_YEAR 0x06 /* 00-99 */
62
63 /*
64 * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
65 * start at 7, and they differ a LOT. Only control and status matter for
66 * basic RTC date and time functionality; be careful using them.
67 */
68 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
69 # define DS1307_BIT_OUT 0x80
70 # define DS1338_BIT_OSF 0x20
71 # define DS1307_BIT_SQWE 0x10
72 # define DS1307_BIT_RS1 0x02
73 # define DS1307_BIT_RS0 0x01
74 #define DS1337_REG_CONTROL 0x0e
75 # define DS1337_BIT_nEOSC 0x80
76 # define DS1339_BIT_BBSQI 0x20
77 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
78 # define DS1337_BIT_RS2 0x10
79 # define DS1337_BIT_RS1 0x08
80 # define DS1337_BIT_INTCN 0x04
81 # define DS1337_BIT_A2IE 0x02
82 # define DS1337_BIT_A1IE 0x01
83 #define DS1340_REG_CONTROL 0x07
84 # define DS1340_BIT_OUT 0x80
85 # define DS1340_BIT_FT 0x40
86 # define DS1340_BIT_CALIB_SIGN 0x20
87 # define DS1340_M_CALIBRATION 0x1f
88 #define DS1340_REG_FLAG 0x09
89 # define DS1340_BIT_OSF 0x80
90 #define DS1337_REG_STATUS 0x0f
91 # define DS1337_BIT_OSF 0x80
92 # define DS1337_BIT_A2I 0x02
93 # define DS1337_BIT_A1I 0x01
94 #define DS1339_REG_ALARM1_SECS 0x07
95
96 #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0
97
98 #define RX8025_REG_CTRL1 0x0e
99 # define RX8025_BIT_2412 0x20
100 #define RX8025_REG_CTRL2 0x0f
101 # define RX8025_BIT_PON 0x10
102 # define RX8025_BIT_VDET 0x40
103 # define RX8025_BIT_XST 0x20
104
105
106 struct ds1307 {
107 u8 offset; /* register's offset */
108 u8 regs[11];
109 u16 nvram_offset;
110 struct bin_attribute *nvram;
111 enum ds_type type;
112 unsigned long flags;
113 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
114 #define HAS_ALARM 1 /* bit 1 == irq claimed */
115 struct i2c_client *client;
116 struct rtc_device *rtc;
117 struct work_struct work;
118 s32 (*read_block_data)(const struct i2c_client *client, u8 command,
119 u8 length, u8 *values);
120 s32 (*write_block_data)(const struct i2c_client *client, u8 command,
121 u8 length, const u8 *values);
122 };
123
124 struct chip_desc {
125 unsigned alarm:1;
126 u16 nvram_offset;
127 u16 nvram_size;
128 u16 trickle_charger_reg;
129 u8 trickle_charger_setup;
130 u8 (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
131 };
132
133 static u8 do_trickle_setup_ds1339(struct i2c_client *,
134 uint32_t ohms, bool diode);
135
136 static struct chip_desc chips[last_ds_type] = {
137 [ds_1307] = {
138 .nvram_offset = 8,
139 .nvram_size = 56,
140 },
141 [ds_1337] = {
142 .alarm = 1,
143 },
144 [ds_1338] = {
145 .nvram_offset = 8,
146 .nvram_size = 56,
147 },
148 [ds_1339] = {
149 .alarm = 1,
150 .trickle_charger_reg = 0x10,
151 .do_trickle_setup = &do_trickle_setup_ds1339,
152 },
153 [ds_1340] = {
154 .trickle_charger_reg = 0x08,
155 },
156 [ds_1388] = {
157 .trickle_charger_reg = 0x0a,
158 },
159 [ds_3231] = {
160 .alarm = 1,
161 },
162 [mcp794xx] = {
163 .alarm = 1,
164 /* this is battery backed SRAM */
165 .nvram_offset = 0x20,
166 .nvram_size = 0x40,
167 },
168 };
169
170 static const struct i2c_device_id ds1307_id[] = {
171 { "ds1307", ds_1307 },
172 { "ds1337", ds_1337 },
173 { "ds1338", ds_1338 },
174 { "ds1339", ds_1339 },
175 { "ds1388", ds_1388 },
176 { "ds1340", ds_1340 },
177 { "ds3231", ds_3231 },
178 { "m41t00", m41t00 },
179 { "mcp7940x", mcp794xx },
180 { "mcp7941x", mcp794xx },
181 { "pt7c4338", ds_1307 },
182 { "rx8025", rx_8025 },
183 { }
184 };
185 MODULE_DEVICE_TABLE(i2c, ds1307_id);
186
187 /*----------------------------------------------------------------------*/
188
189 #define BLOCK_DATA_MAX_TRIES 10
190
191 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
192 u8 command, u8 length, u8 *values)
193 {
194 s32 i, data;
195
196 for (i = 0; i < length; i++) {
197 data = i2c_smbus_read_byte_data(client, command + i);
198 if (data < 0)
199 return data;
200 values[i] = data;
201 }
202 return i;
203 }
204
205 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
206 u8 length, u8 *values)
207 {
208 u8 oldvalues[255];
209 s32 ret;
210 int tries = 0;
211
212 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
213 ret = ds1307_read_block_data_once(client, command, length, values);
214 if (ret < 0)
215 return ret;
216 do {
217 if (++tries > BLOCK_DATA_MAX_TRIES) {
218 dev_err(&client->dev,
219 "ds1307_read_block_data failed\n");
220 return -EIO;
221 }
222 memcpy(oldvalues, values, length);
223 ret = ds1307_read_block_data_once(client, command, length,
224 values);
225 if (ret < 0)
226 return ret;
227 } while (memcmp(oldvalues, values, length));
228 return length;
229 }
230
231 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
232 u8 length, const u8 *values)
233 {
234 u8 currvalues[255];
235 int tries = 0;
236
237 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
238 do {
239 s32 i, ret;
240
241 if (++tries > BLOCK_DATA_MAX_TRIES) {
242 dev_err(&client->dev,
243 "ds1307_write_block_data failed\n");
244 return -EIO;
245 }
246 for (i = 0; i < length; i++) {
247 ret = i2c_smbus_write_byte_data(client, command + i,
248 values[i]);
249 if (ret < 0)
250 return ret;
251 }
252 ret = ds1307_read_block_data_once(client, command, length,
253 currvalues);
254 if (ret < 0)
255 return ret;
256 } while (memcmp(currvalues, values, length));
257 return length;
258 }
259
260 /*----------------------------------------------------------------------*/
261
262 /* These RTC devices are not designed to be connected to a SMbus adapter.
263 SMbus limits block operations length to 32 bytes, whereas it's not
264 limited on I2C buses. As a result, accesses may exceed 32 bytes;
265 in that case, split them into smaller blocks */
266
267 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
268 u8 command, u8 length, const u8 *values)
269 {
270 u8 suboffset = 0;
271
272 if (length <= I2C_SMBUS_BLOCK_MAX)
273 return i2c_smbus_write_i2c_block_data(client,
274 command, length, values);
275
276 while (suboffset < length) {
277 s32 retval = i2c_smbus_write_i2c_block_data(client,
278 command + suboffset,
279 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
280 values + suboffset);
281 if (retval < 0)
282 return retval;
283
284 suboffset += I2C_SMBUS_BLOCK_MAX;
285 }
286 return length;
287 }
288
289 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
290 u8 command, u8 length, u8 *values)
291 {
292 u8 suboffset = 0;
293
294 if (length <= I2C_SMBUS_BLOCK_MAX)
295 return i2c_smbus_read_i2c_block_data(client,
296 command, length, values);
297
298 while (suboffset < length) {
299 s32 retval = i2c_smbus_read_i2c_block_data(client,
300 command + suboffset,
301 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
302 values + suboffset);
303 if (retval < 0)
304 return retval;
305
306 suboffset += I2C_SMBUS_BLOCK_MAX;
307 }
308 return length;
309 }
310
311 /*----------------------------------------------------------------------*/
312
313 /*
314 * The IRQ logic includes a "real" handler running in IRQ context just
315 * long enough to schedule this workqueue entry. We need a task context
316 * to talk to the RTC, since I2C I/O calls require that; and disable the
317 * IRQ until we clear its status on the chip, so that this handler can
318 * work with any type of triggering (not just falling edge).
319 *
320 * The ds1337 and ds1339 both have two alarms, but we only use the first
321 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
322 * signal; ds1339 chips have only one alarm signal.
323 */
324 static void ds1307_work(struct work_struct *work)
325 {
326 struct ds1307 *ds1307;
327 struct i2c_client *client;
328 struct mutex *lock;
329 int stat, control;
330
331 ds1307 = container_of(work, struct ds1307, work);
332 client = ds1307->client;
333 lock = &ds1307->rtc->ops_lock;
334
335 mutex_lock(lock);
336 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
337 if (stat < 0)
338 goto out;
339
340 if (stat & DS1337_BIT_A1I) {
341 stat &= ~DS1337_BIT_A1I;
342 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
343
344 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
345 if (control < 0)
346 goto out;
347
348 control &= ~DS1337_BIT_A1IE;
349 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
350
351 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
352 }
353
354 out:
355 if (test_bit(HAS_ALARM, &ds1307->flags))
356 enable_irq(client->irq);
357 mutex_unlock(lock);
358 }
359
360 static irqreturn_t ds1307_irq(int irq, void *dev_id)
361 {
362 struct i2c_client *client = dev_id;
363 struct ds1307 *ds1307 = i2c_get_clientdata(client);
364
365 disable_irq_nosync(irq);
366 schedule_work(&ds1307->work);
367 return IRQ_HANDLED;
368 }
369
370 /*----------------------------------------------------------------------*/
371
372 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
373 {
374 struct ds1307 *ds1307 = dev_get_drvdata(dev);
375 int tmp;
376
377 /* read the RTC date and time registers all at once */
378 tmp = ds1307->read_block_data(ds1307->client,
379 ds1307->offset, 7, ds1307->regs);
380 if (tmp != 7) {
381 dev_err(dev, "%s error %d\n", "read", tmp);
382 return -EIO;
383 }
384
385 dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
386
387 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
388 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
389 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
390 t->tm_hour = bcd2bin(tmp);
391 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
392 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
393 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
394 t->tm_mon = bcd2bin(tmp) - 1;
395
396 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
397 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
398
399 dev_dbg(dev, "%s secs=%d, mins=%d, "
400 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
401 "read", t->tm_sec, t->tm_min,
402 t->tm_hour, t->tm_mday,
403 t->tm_mon, t->tm_year, t->tm_wday);
404
405 /* initial clock setting can be undefined */
406 return rtc_valid_tm(t);
407 }
408
409 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
410 {
411 struct ds1307 *ds1307 = dev_get_drvdata(dev);
412 int result;
413 int tmp;
414 u8 *buf = ds1307->regs;
415
416 dev_dbg(dev, "%s secs=%d, mins=%d, "
417 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
418 "write", t->tm_sec, t->tm_min,
419 t->tm_hour, t->tm_mday,
420 t->tm_mon, t->tm_year, t->tm_wday);
421
422 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
423 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
424 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
425 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
426 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
427 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
428
429 /* assume 20YY not 19YY */
430 tmp = t->tm_year - 100;
431 buf[DS1307_REG_YEAR] = bin2bcd(tmp);
432
433 switch (ds1307->type) {
434 case ds_1337:
435 case ds_1339:
436 case ds_3231:
437 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
438 break;
439 case ds_1340:
440 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
441 | DS1340_BIT_CENTURY;
442 break;
443 case mcp794xx:
444 /*
445 * these bits were cleared when preparing the date/time
446 * values and need to be set again before writing the
447 * buffer out to the device.
448 */
449 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
450 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
451 break;
452 default:
453 break;
454 }
455
456 dev_dbg(dev, "%s: %7ph\n", "write", buf);
457
458 result = ds1307->write_block_data(ds1307->client,
459 ds1307->offset, 7, buf);
460 if (result < 0) {
461 dev_err(dev, "%s error %d\n", "write", result);
462 return result;
463 }
464 return 0;
465 }
466
467 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
468 {
469 struct i2c_client *client = to_i2c_client(dev);
470 struct ds1307 *ds1307 = i2c_get_clientdata(client);
471 int ret;
472
473 if (!test_bit(HAS_ALARM, &ds1307->flags))
474 return -EINVAL;
475
476 /* read all ALARM1, ALARM2, and status registers at once */
477 ret = ds1307->read_block_data(client,
478 DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
479 if (ret != 9) {
480 dev_err(dev, "%s error %d\n", "alarm read", ret);
481 return -EIO;
482 }
483
484 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
485 "alarm read",
486 ds1307->regs[0], ds1307->regs[1],
487 ds1307->regs[2], ds1307->regs[3],
488 ds1307->regs[4], ds1307->regs[5],
489 ds1307->regs[6], ds1307->regs[7],
490 ds1307->regs[8]);
491
492 /*
493 * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
494 * and that all four fields are checked matches
495 */
496 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
497 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
498 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
499 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
500 t->time.tm_mon = -1;
501 t->time.tm_year = -1;
502 t->time.tm_wday = -1;
503 t->time.tm_yday = -1;
504 t->time.tm_isdst = -1;
505
506 /* ... and status */
507 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
508 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
509
510 dev_dbg(dev, "%s secs=%d, mins=%d, "
511 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
512 "alarm read", t->time.tm_sec, t->time.tm_min,
513 t->time.tm_hour, t->time.tm_mday,
514 t->enabled, t->pending);
515
516 return 0;
517 }
518
519 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
520 {
521 struct i2c_client *client = to_i2c_client(dev);
522 struct ds1307 *ds1307 = i2c_get_clientdata(client);
523 unsigned char *buf = ds1307->regs;
524 u8 control, status;
525 int ret;
526
527 if (!test_bit(HAS_ALARM, &ds1307->flags))
528 return -EINVAL;
529
530 dev_dbg(dev, "%s secs=%d, mins=%d, "
531 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
532 "alarm set", t->time.tm_sec, t->time.tm_min,
533 t->time.tm_hour, t->time.tm_mday,
534 t->enabled, t->pending);
535
536 /* read current status of both alarms and the chip */
537 ret = ds1307->read_block_data(client,
538 DS1339_REG_ALARM1_SECS, 9, buf);
539 if (ret != 9) {
540 dev_err(dev, "%s error %d\n", "alarm write", ret);
541 return -EIO;
542 }
543 control = ds1307->regs[7];
544 status = ds1307->regs[8];
545
546 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
547 "alarm set (old status)",
548 ds1307->regs[0], ds1307->regs[1],
549 ds1307->regs[2], ds1307->regs[3],
550 ds1307->regs[4], ds1307->regs[5],
551 ds1307->regs[6], control, status);
552
553 /* set ALARM1, using 24 hour and day-of-month modes */
554 buf[0] = bin2bcd(t->time.tm_sec);
555 buf[1] = bin2bcd(t->time.tm_min);
556 buf[2] = bin2bcd(t->time.tm_hour);
557 buf[3] = bin2bcd(t->time.tm_mday);
558
559 /* set ALARM2 to non-garbage */
560 buf[4] = 0;
561 buf[5] = 0;
562 buf[6] = 0;
563
564 /* optionally enable ALARM1 */
565 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
566 if (t->enabled) {
567 dev_dbg(dev, "alarm IRQ armed\n");
568 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
569 }
570 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
571
572 ret = ds1307->write_block_data(client,
573 DS1339_REG_ALARM1_SECS, 9, buf);
574 if (ret < 0) {
575 dev_err(dev, "can't set alarm time\n");
576 return ret;
577 }
578
579 return 0;
580 }
581
582 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
583 {
584 struct i2c_client *client = to_i2c_client(dev);
585 struct ds1307 *ds1307 = i2c_get_clientdata(client);
586 int ret;
587
588 if (!test_bit(HAS_ALARM, &ds1307->flags))
589 return -ENOTTY;
590
591 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
592 if (ret < 0)
593 return ret;
594
595 if (enabled)
596 ret |= DS1337_BIT_A1IE;
597 else
598 ret &= ~DS1337_BIT_A1IE;
599
600 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
601 if (ret < 0)
602 return ret;
603
604 return 0;
605 }
606
607 static const struct rtc_class_ops ds13xx_rtc_ops = {
608 .read_time = ds1307_get_time,
609 .set_time = ds1307_set_time,
610 .read_alarm = ds1337_read_alarm,
611 .set_alarm = ds1337_set_alarm,
612 .alarm_irq_enable = ds1307_alarm_irq_enable,
613 };
614
615 /*----------------------------------------------------------------------*/
616
617 /*
618 * Alarm support for mcp794xx devices.
619 */
620
621 #define MCP794XX_REG_CONTROL 0x07
622 # define MCP794XX_BIT_ALM0_EN 0x10
623 # define MCP794XX_BIT_ALM1_EN 0x20
624 #define MCP794XX_REG_ALARM0_BASE 0x0a
625 #define MCP794XX_REG_ALARM0_CTRL 0x0d
626 #define MCP794XX_REG_ALARM1_BASE 0x11
627 #define MCP794XX_REG_ALARM1_CTRL 0x14
628 # define MCP794XX_BIT_ALMX_IF (1 << 3)
629 # define MCP794XX_BIT_ALMX_C0 (1 << 4)
630 # define MCP794XX_BIT_ALMX_C1 (1 << 5)
631 # define MCP794XX_BIT_ALMX_C2 (1 << 6)
632 # define MCP794XX_BIT_ALMX_POL (1 << 7)
633 # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
634 MCP794XX_BIT_ALMX_C1 | \
635 MCP794XX_BIT_ALMX_C2)
636
637 static void mcp794xx_work(struct work_struct *work)
638 {
639 struct ds1307 *ds1307 = container_of(work, struct ds1307, work);
640 struct i2c_client *client = ds1307->client;
641 int reg, ret;
642
643 mutex_lock(&ds1307->rtc->ops_lock);
644
645 /* Check and clear alarm 0 interrupt flag. */
646 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
647 if (reg < 0)
648 goto out;
649 if (!(reg & MCP794XX_BIT_ALMX_IF))
650 goto out;
651 reg &= ~MCP794XX_BIT_ALMX_IF;
652 ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
653 if (ret < 0)
654 goto out;
655
656 /* Disable alarm 0. */
657 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
658 if (reg < 0)
659 goto out;
660 reg &= ~MCP794XX_BIT_ALM0_EN;
661 ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
662 if (ret < 0)
663 goto out;
664
665 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
666
667 out:
668 if (test_bit(HAS_ALARM, &ds1307->flags))
669 enable_irq(client->irq);
670 mutex_unlock(&ds1307->rtc->ops_lock);
671 }
672
673 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
674 {
675 struct i2c_client *client = to_i2c_client(dev);
676 struct ds1307 *ds1307 = i2c_get_clientdata(client);
677 u8 *regs = ds1307->regs;
678 int ret;
679
680 if (!test_bit(HAS_ALARM, &ds1307->flags))
681 return -EINVAL;
682
683 /* Read control and alarm 0 registers. */
684 ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
685 if (ret < 0)
686 return ret;
687
688 t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
689
690 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
691 t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
692 t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
693 t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
694 t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
695 t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
696 t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
697 t->time.tm_year = -1;
698 t->time.tm_yday = -1;
699 t->time.tm_isdst = -1;
700
701 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
702 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
703 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
704 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
705 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
706 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
707 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
708
709 return 0;
710 }
711
712 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
713 {
714 struct i2c_client *client = to_i2c_client(dev);
715 struct ds1307 *ds1307 = i2c_get_clientdata(client);
716 unsigned char *regs = ds1307->regs;
717 int ret;
718
719 if (!test_bit(HAS_ALARM, &ds1307->flags))
720 return -EINVAL;
721
722 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
723 "enabled=%d pending=%d\n", __func__,
724 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
725 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
726 t->enabled, t->pending);
727
728 /* Read control and alarm 0 registers. */
729 ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
730 if (ret < 0)
731 return ret;
732
733 /* Set alarm 0, using 24-hour and day-of-month modes. */
734 regs[3] = bin2bcd(t->time.tm_sec);
735 regs[4] = bin2bcd(t->time.tm_min);
736 regs[5] = bin2bcd(t->time.tm_hour);
737 regs[6] = bin2bcd(t->time.tm_wday) + 1;
738 regs[7] = bin2bcd(t->time.tm_mday);
739 regs[8] = bin2bcd(t->time.tm_mon) + 1;
740
741 /* Clear the alarm 0 interrupt flag. */
742 regs[6] &= ~MCP794XX_BIT_ALMX_IF;
743 /* Set alarm match: second, minute, hour, day, date, month. */
744 regs[6] |= MCP794XX_MSK_ALMX_MATCH;
745 /* Disable interrupt. We will not enable until completely programmed */
746 regs[0] &= ~MCP794XX_BIT_ALM0_EN;
747
748 ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
749 if (ret < 0)
750 return ret;
751
752 if (!t->enabled)
753 return 0;
754 regs[0] |= MCP794XX_BIT_ALM0_EN;
755 return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
756 }
757
758 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
759 {
760 struct i2c_client *client = to_i2c_client(dev);
761 struct ds1307 *ds1307 = i2c_get_clientdata(client);
762 int reg;
763
764 if (!test_bit(HAS_ALARM, &ds1307->flags))
765 return -EINVAL;
766
767 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
768 if (reg < 0)
769 return reg;
770
771 if (enabled)
772 reg |= MCP794XX_BIT_ALM0_EN;
773 else
774 reg &= ~MCP794XX_BIT_ALM0_EN;
775
776 return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
777 }
778
779 static const struct rtc_class_ops mcp794xx_rtc_ops = {
780 .read_time = ds1307_get_time,
781 .set_time = ds1307_set_time,
782 .read_alarm = mcp794xx_read_alarm,
783 .set_alarm = mcp794xx_set_alarm,
784 .alarm_irq_enable = mcp794xx_alarm_irq_enable,
785 };
786
787 /*----------------------------------------------------------------------*/
788
789 static ssize_t
790 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
791 struct bin_attribute *attr,
792 char *buf, loff_t off, size_t count)
793 {
794 struct i2c_client *client;
795 struct ds1307 *ds1307;
796 int result;
797
798 client = kobj_to_i2c_client(kobj);
799 ds1307 = i2c_get_clientdata(client);
800
801 if (unlikely(off >= ds1307->nvram->size))
802 return 0;
803 if ((off + count) > ds1307->nvram->size)
804 count = ds1307->nvram->size - off;
805 if (unlikely(!count))
806 return count;
807
808 result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
809 count, buf);
810 if (result < 0)
811 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
812 return result;
813 }
814
815 static ssize_t
816 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
817 struct bin_attribute *attr,
818 char *buf, loff_t off, size_t count)
819 {
820 struct i2c_client *client;
821 struct ds1307 *ds1307;
822 int result;
823
824 client = kobj_to_i2c_client(kobj);
825 ds1307 = i2c_get_clientdata(client);
826
827 if (unlikely(off >= ds1307->nvram->size))
828 return -EFBIG;
829 if ((off + count) > ds1307->nvram->size)
830 count = ds1307->nvram->size - off;
831 if (unlikely(!count))
832 return count;
833
834 result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
835 count, buf);
836 if (result < 0) {
837 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
838 return result;
839 }
840 return count;
841 }
842
843
844 /*----------------------------------------------------------------------*/
845
846 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
847 uint32_t ohms, bool diode)
848 {
849 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
850 DS1307_TRICKLE_CHARGER_NO_DIODE;
851
852 switch (ohms) {
853 case 250:
854 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
855 break;
856 case 2000:
857 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
858 break;
859 case 4000:
860 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
861 break;
862 default:
863 dev_warn(&client->dev,
864 "Unsupported ohm value %u in dt\n", ohms);
865 return 0;
866 }
867 return setup;
868 }
869
870 static void ds1307_trickle_of_init(struct i2c_client *client,
871 struct chip_desc *chip)
872 {
873 uint32_t ohms = 0;
874 bool diode = true;
875
876 if (!chip->do_trickle_setup)
877 goto out;
878 if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
879 goto out;
880 if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
881 diode = false;
882 chip->trickle_charger_setup = chip->do_trickle_setup(client,
883 ohms, diode);
884 out:
885 return;
886 }
887
888 static int ds1307_probe(struct i2c_client *client,
889 const struct i2c_device_id *id)
890 {
891 struct ds1307 *ds1307;
892 int err = -ENODEV;
893 int tmp;
894 struct chip_desc *chip = &chips[id->driver_data];
895 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
896 bool want_irq = false;
897 unsigned char *buf;
898 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
899 static const int bbsqi_bitpos[] = {
900 [ds_1337] = 0,
901 [ds_1339] = DS1339_BIT_BBSQI,
902 [ds_3231] = DS3231_BIT_BBSQW,
903 };
904 const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
905
906 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
907 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
908 return -EIO;
909
910 ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
911 if (!ds1307)
912 return -ENOMEM;
913
914 i2c_set_clientdata(client, ds1307);
915
916 ds1307->client = client;
917 ds1307->type = id->driver_data;
918
919 if (!pdata && client->dev.of_node)
920 ds1307_trickle_of_init(client, chip);
921 else if (pdata && pdata->trickle_charger_setup)
922 chip->trickle_charger_setup = pdata->trickle_charger_setup;
923
924 if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
925 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
926 DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
927 chip->trickle_charger_reg);
928 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
929 DS13XX_TRICKLE_CHARGER_MAGIC |
930 chip->trickle_charger_setup);
931 }
932
933 buf = ds1307->regs;
934 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
935 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
936 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
937 } else {
938 ds1307->read_block_data = ds1307_read_block_data;
939 ds1307->write_block_data = ds1307_write_block_data;
940 }
941
942 switch (ds1307->type) {
943 case ds_1337:
944 case ds_1339:
945 case ds_3231:
946 /* get registers that the "rtc" read below won't read... */
947 tmp = ds1307->read_block_data(ds1307->client,
948 DS1337_REG_CONTROL, 2, buf);
949 if (tmp != 2) {
950 dev_dbg(&client->dev, "read error %d\n", tmp);
951 err = -EIO;
952 goto exit;
953 }
954
955 /* oscillator off? turn it on, so clock can tick. */
956 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
957 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
958
959 /*
960 * Using IRQ? Disable the square wave and both alarms.
961 * For some variants, be sure alarms can trigger when we're
962 * running on Vbackup (BBSQI/BBSQW)
963 */
964 if (ds1307->client->irq > 0 && chip->alarm) {
965 INIT_WORK(&ds1307->work, ds1307_work);
966
967 ds1307->regs[0] |= DS1337_BIT_INTCN
968 | bbsqi_bitpos[ds1307->type];
969 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
970
971 want_irq = true;
972 }
973
974 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
975 ds1307->regs[0]);
976
977 /* oscillator fault? clear flag, and warn */
978 if (ds1307->regs[1] & DS1337_BIT_OSF) {
979 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
980 ds1307->regs[1] & ~DS1337_BIT_OSF);
981 dev_warn(&client->dev, "SET TIME!\n");
982 }
983 break;
984
985 case rx_8025:
986 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
987 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
988 if (tmp != 2) {
989 dev_dbg(&client->dev, "read error %d\n", tmp);
990 err = -EIO;
991 goto exit;
992 }
993
994 /* oscillator off? turn it on, so clock can tick. */
995 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
996 ds1307->regs[1] |= RX8025_BIT_XST;
997 i2c_smbus_write_byte_data(client,
998 RX8025_REG_CTRL2 << 4 | 0x08,
999 ds1307->regs[1]);
1000 dev_warn(&client->dev,
1001 "oscillator stop detected - SET TIME!\n");
1002 }
1003
1004 if (ds1307->regs[1] & RX8025_BIT_PON) {
1005 ds1307->regs[1] &= ~RX8025_BIT_PON;
1006 i2c_smbus_write_byte_data(client,
1007 RX8025_REG_CTRL2 << 4 | 0x08,
1008 ds1307->regs[1]);
1009 dev_warn(&client->dev, "power-on detected\n");
1010 }
1011
1012 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1013 ds1307->regs[1] &= ~RX8025_BIT_VDET;
1014 i2c_smbus_write_byte_data(client,
1015 RX8025_REG_CTRL2 << 4 | 0x08,
1016 ds1307->regs[1]);
1017 dev_warn(&client->dev, "voltage drop detected\n");
1018 }
1019
1020 /* make sure we are running in 24hour mode */
1021 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1022 u8 hour;
1023
1024 /* switch to 24 hour mode */
1025 i2c_smbus_write_byte_data(client,
1026 RX8025_REG_CTRL1 << 4 | 0x08,
1027 ds1307->regs[0] |
1028 RX8025_BIT_2412);
1029
1030 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1031 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1032 if (tmp != 2) {
1033 dev_dbg(&client->dev, "read error %d\n", tmp);
1034 err = -EIO;
1035 goto exit;
1036 }
1037
1038 /* correct hour */
1039 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1040 if (hour == 12)
1041 hour = 0;
1042 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1043 hour += 12;
1044
1045 i2c_smbus_write_byte_data(client,
1046 DS1307_REG_HOUR << 4 | 0x08,
1047 hour);
1048 }
1049 break;
1050 case ds_1388:
1051 ds1307->offset = 1; /* Seconds starts at 1 */
1052 break;
1053 case mcp794xx:
1054 rtc_ops = &mcp794xx_rtc_ops;
1055 if (ds1307->client->irq > 0 && chip->alarm) {
1056 INIT_WORK(&ds1307->work, mcp794xx_work);
1057 want_irq = true;
1058 }
1059 break;
1060 default:
1061 break;
1062 }
1063
1064 read_rtc:
1065 /* read RTC registers */
1066 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1067 if (tmp != 8) {
1068 dev_dbg(&client->dev, "read error %d\n", tmp);
1069 err = -EIO;
1070 goto exit;
1071 }
1072
1073 /*
1074 * minimal sanity checking; some chips (like DS1340) don't
1075 * specify the extra bits as must-be-zero, but there are
1076 * still a few values that are clearly out-of-range.
1077 */
1078 tmp = ds1307->regs[DS1307_REG_SECS];
1079 switch (ds1307->type) {
1080 case ds_1307:
1081 case m41t00:
1082 /* clock halted? turn it on, so clock can tick. */
1083 if (tmp & DS1307_BIT_CH) {
1084 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1085 dev_warn(&client->dev, "SET TIME!\n");
1086 goto read_rtc;
1087 }
1088 break;
1089 case ds_1338:
1090 /* clock halted? turn it on, so clock can tick. */
1091 if (tmp & DS1307_BIT_CH)
1092 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1093
1094 /* oscillator fault? clear flag, and warn */
1095 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1096 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1097 ds1307->regs[DS1307_REG_CONTROL]
1098 & ~DS1338_BIT_OSF);
1099 dev_warn(&client->dev, "SET TIME!\n");
1100 goto read_rtc;
1101 }
1102 break;
1103 case ds_1340:
1104 /* clock halted? turn it on, so clock can tick. */
1105 if (tmp & DS1340_BIT_nEOSC)
1106 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1107
1108 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1109 if (tmp < 0) {
1110 dev_dbg(&client->dev, "read error %d\n", tmp);
1111 err = -EIO;
1112 goto exit;
1113 }
1114
1115 /* oscillator fault? clear flag, and warn */
1116 if (tmp & DS1340_BIT_OSF) {
1117 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1118 dev_warn(&client->dev, "SET TIME!\n");
1119 }
1120 break;
1121 case mcp794xx:
1122 /* make sure that the backup battery is enabled */
1123 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1124 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1125 ds1307->regs[DS1307_REG_WDAY]
1126 | MCP794XX_BIT_VBATEN);
1127 }
1128
1129 /* clock halted? turn it on, so clock can tick. */
1130 if (!(tmp & MCP794XX_BIT_ST)) {
1131 i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1132 MCP794XX_BIT_ST);
1133 dev_warn(&client->dev, "SET TIME!\n");
1134 goto read_rtc;
1135 }
1136
1137 break;
1138 default:
1139 break;
1140 }
1141
1142 tmp = ds1307->regs[DS1307_REG_HOUR];
1143 switch (ds1307->type) {
1144 case ds_1340:
1145 case m41t00:
1146 /*
1147 * NOTE: ignores century bits; fix before deploying
1148 * systems that will run through year 2100.
1149 */
1150 break;
1151 case rx_8025:
1152 break;
1153 default:
1154 if (!(tmp & DS1307_BIT_12HR))
1155 break;
1156
1157 /*
1158 * Be sure we're in 24 hour mode. Multi-master systems
1159 * take note...
1160 */
1161 tmp = bcd2bin(tmp & 0x1f);
1162 if (tmp == 12)
1163 tmp = 0;
1164 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1165 tmp += 12;
1166 i2c_smbus_write_byte_data(client,
1167 ds1307->offset + DS1307_REG_HOUR,
1168 bin2bcd(tmp));
1169 }
1170
1171 device_set_wakeup_capable(&client->dev, want_irq);
1172 ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1173 rtc_ops, THIS_MODULE);
1174 if (IS_ERR(ds1307->rtc)) {
1175 return PTR_ERR(ds1307->rtc);
1176 }
1177
1178 if (want_irq) {
1179 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
1180 ds1307->rtc->name, client);
1181 if (err) {
1182 client->irq = 0;
1183 dev_err(&client->dev, "unable to request IRQ!\n");
1184 } else {
1185
1186 set_bit(HAS_ALARM, &ds1307->flags);
1187 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1188 }
1189 }
1190
1191 if (chip->nvram_size) {
1192
1193 ds1307->nvram = devm_kzalloc(&client->dev,
1194 sizeof(struct bin_attribute),
1195 GFP_KERNEL);
1196 if (!ds1307->nvram) {
1197 dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1198 } else {
1199
1200 ds1307->nvram->attr.name = "nvram";
1201 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1202
1203 sysfs_bin_attr_init(ds1307->nvram);
1204
1205 ds1307->nvram->read = ds1307_nvram_read;
1206 ds1307->nvram->write = ds1307_nvram_write;
1207 ds1307->nvram->size = chip->nvram_size;
1208 ds1307->nvram_offset = chip->nvram_offset;
1209
1210 err = sysfs_create_bin_file(&client->dev.kobj,
1211 ds1307->nvram);
1212 if (err) {
1213 dev_err(&client->dev,
1214 "unable to create sysfs file: %s\n",
1215 ds1307->nvram->attr.name);
1216 } else {
1217 set_bit(HAS_NVRAM, &ds1307->flags);
1218 dev_info(&client->dev, "%zu bytes nvram\n",
1219 ds1307->nvram->size);
1220 }
1221 }
1222 }
1223
1224 return 0;
1225
1226 exit:
1227 return err;
1228 }
1229
1230 static int ds1307_remove(struct i2c_client *client)
1231 {
1232 struct ds1307 *ds1307 = i2c_get_clientdata(client);
1233
1234 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
1235 free_irq(client->irq, client);
1236 cancel_work_sync(&ds1307->work);
1237 }
1238
1239 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1240 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1241
1242 return 0;
1243 }
1244
1245 static struct i2c_driver ds1307_driver = {
1246 .driver = {
1247 .name = "rtc-ds1307",
1248 .owner = THIS_MODULE,
1249 },
1250 .probe = ds1307_probe,
1251 .remove = ds1307_remove,
1252 .id_table = ds1307_id,
1253 };
1254
1255 module_i2c_driver(ds1307_driver);
1256
1257 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1258 MODULE_LICENSE("GPL");
Linux with added FPC-III support