| blob | 000ed80ab592a0ce731023386a3636d3bd920976 |
1 /*
2 * Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 * for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software Foundation,
24 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26 #include <linux/module.h>
27 #include <linux/device.h>
28 #include <linux/dmapool.h>
29 #include <linux/kernel.h>
30 #include <linux/delay.h>
31 #include <linux/ioport.h>
32 #include <linux/sched.h>
33 #include <linux/vmalloc.h>
34 #include <linux/errno.h>
35 #include <linux/init.h>
36 #include <linux/hrtimer.h>
37 #include <linux/list.h>
38 #include <linux/interrupt.h>
39 #include <linux/usb.h>
40 #include <linux/usb/hcd.h>
41 #include <linux/moduleparam.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/debugfs.h>
44 #include <linux/slab.h>
45 #include <linux/uaccess.h>
46 #include <linux/platform_device.h>
47 #include <linux/io.h>
49 #include <asm/byteorder.h>
50 #include <asm/irq.h>
51 #include <asm/unaligned.h>
53 /*-------------------------------------------------------------------------*/
59 #undef FOTG210_URB_TRACE
61 #define FOTG210_STATS
63 /* magic numbers that can affect system performance */
66 #define FOTG210_TUNE_RL_TT 0
68 #define FOTG210_TUNE_MULT_TT 1
69 /*
70 * Some drivers think it's safe to schedule isochronous transfers more than
71 * 256 ms into the future (partly as a result of an old bug in the scheduling
72 * code). In an attempt to avoid trouble, we will use a minimum scheduling
73 * length of 512 frames instead of 256.
74 */
77 /* Initial IRQ latency: faster than hw default */
82 /* initial park setting: slower than hw default */
87 /* for link power management(LPM) feature */
92 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
96 /*-------------------------------------------------------------------------*/
98 #define fotg210_dbg(fotg210, fmt, args...) \
99 dev_dbg(fotg210_to_hcd(fotg210)->self.controller , fmt , ## args)
100 #define fotg210_err(fotg210, fmt, args...) \
101 dev_err(fotg210_to_hcd(fotg210)->self.controller , fmt , ## args)
102 #define fotg210_info(fotg210, fmt, args...) \
103 dev_info(fotg210_to_hcd(fotg210)->self.controller , fmt , ## args)
104 #define fotg210_warn(fotg210, fmt, args...) \
105 dev_warn(fotg210_to_hcd(fotg210)->self.controller , fmt , ## args)
107 /* check the values in the HCSPARAMS register
108 * (host controller _Structural_ parameters)
109 * see EHCI spec, Table 2-4 for each value
110 */
112 {
119 );
120 }
122 /* check the values in the HCCPARAMS register
123 * (host controller _Capability_ parameters)
124 * see EHCI Spec, Table 2-5 for each value
125 * */
127 {
132 label,
133 params,
136 }
138 static void __maybe_unused
140 {
152 }
154 static void __maybe_unused
156 {
162 }
164 static void __maybe_unused
166 {
193 }
195 static int __maybe_unused
197 {
211 );
212 }
214 static int __maybe_unused
216 {
226 );
227 }
231 static int
233 {
235 "%s%scommand %07x %s=%d ithresh=%d%s%s%s "
247 );
248 }
250 static char
252 {
255 /* signaling state */
269 }
272 "%s%sport:%d status %06x %d "
276 sig,
285 }
287 /* functions have the "wrong" filename when they're output... */
288 #define dbg_status(fotg210, label, status) { \
289 char _buf[80]; \
290 dbg_status_buf(_buf, sizeof(_buf), label, status); \
292 }
294 #define dbg_cmd(fotg210, label, command) { \
295 char _buf[80]; \
296 dbg_command_buf(_buf, sizeof(_buf), label, command); \
298 }
300 #define dbg_port(fotg210, label, port, status) { \
301 char _buf[80]; \
303 }
305 /*-------------------------------------------------------------------------*/
307 /* troubleshooting help: expose state in debugfs */
323 };
330 };
337 };
348 };
350 #define speed_char(info1)({ char tmp; \
351 switch (info1 & (3 << 12)) { \
352 case QH_FULL_SPEED: \
354 case QH_LOW_SPEED: \
356 case QH_HIGH_SPEED: \
358 default: \
360 } tmp; })
363 {
372 /* tries to advance through hw_alt_next */
374 }
381 )
382 {
383 u32 scratch;
384 u32 hw_curr;
395 else
403 /* else alt_next points to some other qtd */
404 }
420 /* hc may be modifying the list as we read it ... */
433 }
452 scratch,
460 }
468 done:
471 }
474 {
489 /* dumps a snapshot of the async schedule.
490 * usually empty except for long-term bulk reads, or head.
491 * one QH per line, and TDs we know about
492 */
505 }
509 }
511 #define DBG_SCHED_LIMIT 64
513 {
521 __hc32 tag;
537 /* dump a snapshot of the periodic schedule.
538 * iso changes, interrupt usually doesn't.
539 */
561 /* uframe masks */
566 /* don't repeat what follows this qh */
575 }
577 }
578 /* show more info the first time around */
585 /* count tds, get ep direction */
589 qtd_list) {
590 temp++;
592 fotg210,
600 }
601 }
604 "(%c%d ep%d%s "
610 temp,
633 }
641 }
646 }
647 #undef DBG_SCHED_LIMIT
650 {
660 }
662 }
665 {
690 }
692 /* Capability Registers */
706 /* FIXME interpret both types of params */
717 /* Operational Registers */
746 }
748 #ifdef FOTG210_STATS
760 #endif
762 done:
766 }
770 {
780 }
783 }
786 {
795 }
802 }
804 out:
806 }
810 {
820 }
821 }
827 out:
830 }
833 {
839 }
842 }
844 {
848 }
851 {
860 }
863 {
865 fill_registers_buffer);
868 }
871 {
875 fotg210_debug_root);
893 file_error:
895 }
898 {
900 }
902 /*-------------------------------------------------------------------------*/
904 /*
905 * handshake - spin reading hc until handshake completes or fails
906 * @ptr: address of hc register to be read
907 * @mask: bits to look at in result of read
908 * @done: value of those bits when handshake succeeds
909 * @usec: timeout in microseconds
910 *
911 * Returns negative errno, or zero on success
912 *
913 * Success happens when the "mask" bits have the specified value (hardware
914 * handshake done). There are two failure modes: "usec" have passed (major
915 * hardware flakeout), or the register reads as all-ones (hardware removed).
916 *
917 * That last failure should_only happen in cases like physical cardbus eject
918 * before driver shutdown. But it also seems to be caused by bugs in cardbus
919 * bridge shutdown: shutting down the bridge before the devices using it.
920 */
923 {
924 u32 result;
934 usec--;
937 }
939 /*
940 * Force HC to halt state from unknown (EHCI spec section 2.3).
941 * Must be called with interrupts enabled and the lock not held.
942 */
944 {
945 u32 temp;
949 /* disable any irqs left enabled by previous code */
952 /*
953 * This routine gets called during probe before fotg210->command
954 * has been initialized, so we can't rely on its value.
955 */
966 }
968 /*
969 * Reset a non-running (STS_HALT == 1) controller.
970 * Must be called with interrupts enabled and the lock not held.
971 */
973 {
977 /* If the EHCI debug controller is active, special care must be
978 * taken before and after a host controller reset */
999 }
1001 /*
1002 * Idle the controller (turn off the schedules).
1003 * Must be called with interrupts enabled and the lock not held.
1004 */
1006 {
1007 u32 temp;
1012 /* wait for any schedule enables/disables to take effect */
1017 /* then disable anything that's still active */
1023 /* hardware can take 16 microframes to turn off ... */
1026 }
1028 /*-------------------------------------------------------------------------*/
1037 /*-------------------------------------------------------------------------*/
1039 /* Set a bit in the USBCMD register */
1041 {
1045 /* unblock posted write */
1047 }
1049 /* Clear a bit in the USBCMD register */
1051 {
1055 /* unblock posted write */
1057 }
1059 /*-------------------------------------------------------------------------*/
1061 /*
1062 * EHCI timer support... Now using hrtimers.
1063 *
1064 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1065 * the timer routine runs, it checks each possible event; events that are
1066 * currently enabled and whose expiration time has passed get handled.
1067 * The set of enabled events is stored as a collection of bitflags in
1068 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1069 * increasing delay values (ranging between 1 ms and 100 ms).
1070 *
1071 * Rather than implementing a sorted list or tree of all pending events,
1072 * we keep track only of the lowest-numbered pending event, in
1073 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1074 * expiration time is set to the timeout value for this event.
1075 *
1076 * As a result, events might not get handled right away; the actual delay
1077 * could be anywhere up to twice the requested delay. This doesn't
1078 * matter, because none of the events are especially time-critical. The
1079 * ones that matter most all have a delay of 1 ms, so they will be
1080 * handled after 2 ms at most, which is okay. In addition to this, we
1081 * allow for an expiration range of 1 ms.
1082 */
1084 /*
1085 * Delay lengths for the hrtimer event types.
1086 * Keep this list sorted by delay length, in the same order as
1087 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1088 */
1100 };
1102 /* Enable a pending hrtimer event */
1105 {
1113 /* Track only the lowest-numbered pending event */
1118 }
1119 }
1122 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1124 {
1127 /* Don't enable anything if the controller isn't running (e.g., died) */
1136 /* Poll again later, but give up after about 20 ms */
1141 }
1144 }
1147 /* The status is up-to-date; restart or stop the schedule as needed */
1155 /* Turn off the schedule after a while */
1157 FOTG210_HRTIMER_DISABLE_ASYNC,
1159 }
1160 }
1161 }
1163 /* Turn off the async schedule after a brief delay */
1165 {
1167 }
1170 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1172 {
1175 /* Don't do anything if the controller isn't running (e.g., died) */
1184 /* Poll again later, but give up after about 20 ms */
1189 }
1192 }
1195 /* The status is up-to-date; restart or stop the schedule as needed */
1203 /* Turn off the schedule after a while */
1205 FOTG210_HRTIMER_DISABLE_PERIODIC,
1207 }
1208 }
1209 }
1211 /* Turn off the periodic schedule after a brief delay */
1213 {
1215 }
1218 /* Poll the STS_HALT status bit; see when a dead controller stops */
1220 {
1223 /* Give up after a few milliseconds */
1225 /* Try again later */
1229 }
1231 }
1233 /* Clean up the mess */
1239 /* Not in process context, so don't try to reset the controller */
1240 }
1243 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1245 {
1248 /*
1249 * Process all the QHs on the intr_unlink list that were added
1250 * before the current unlink cycle began. The list is in
1251 * temporal order, so stop when we reach the first entry in the
1252 * current cycle. But if the root hub isn't running then
1253 * process all the QHs on the list.
1254 */
1264 }
1266 /* Handle remaining entries later */
1271 }
1273 }
1276 /* Start another free-iTDs/siTDs cycle */
1278 {
1285 }
1286 }
1288 /* Wait for controller to stop using old iTDs and siTDs */
1290 {
1301 }
1305 }
1308 /* Handle lost (or very late) IAA interrupts */
1310 {
1314 /*
1315 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1316 * So we need this watchdog, but must protect it against both
1317 * (a) SMP races against real IAA firing and retriggering, and
1318 * (b) clean HC shutdown, when IAA watchdog was pending.
1319 */
1323 /* If we get here, IAA is *REALLY* late. It's barely
1324 * conceivable that the system is so busy that CMD_IAAD
1325 * is still legitimately set, so let's be sure it's
1326 * clear before we read STS_IAA. (The HC should clear
1327 * CMD_IAAD when it sets STS_IAA.)
1328 */
1331 /*
1332 * If IAA is set here it either legitimately triggered
1333 * after the watchdog timer expired (_way_ late, so we'll
1334 * still count it as lost) ... or a silicon erratum:
1335 * - VIA seems to set IAA without triggering the IRQ;
1336 * - IAAD potentially cleared without setting IAA.
1337 */
1343 }
1348 }
1349 }
1352 /* Enable the I/O watchdog, if appropriate */
1354 {
1355 /* Not needed if the controller isn't running or it's already enabled */
1361 /*
1362 * Isochronous transfers always need the watchdog.
1363 * For other sorts we use it only if the flag is set.
1364 */
1369 }
1372 /*
1373 * Handler functions for the hrtimer event types.
1374 * Keep this array in the same order as the event types indexed by
1375 * enum fotg210_hrtimer_event in fotg210.h.
1376 */
1388 };
1391 {
1394 ktime_t now;
1405 /*
1406 * Check each pending event. If its time has expired, handle
1407 * the event; otherwise re-enable it.
1408 */
1413 else
1415 }
1419 }
1421 /*-------------------------------------------------------------------------*/
1423 #define fotg210_bus_suspend NULL
1424 #define fotg210_bus_resume NULL
1426 /*-------------------------------------------------------------------------*/
1432 int port_status
1433 ) {
1437 /* if reset finished and it's still not enabled -- handoff */
1439 /* with integrated TT, there's nobody to hand it to! */
1447 }
1450 }
1452 /*-------------------------------------------------------------------------*/
1455 /* build "status change" packet (one or two bytes) from HC registers */
1457 static int
1459 {
1462 u32 mask;
1466 /* init status to no-changes */
1469 /* Inform the core about resumes-in-progress by returning
1470 * a non-zero value even if there are no status changes.
1471 */
1475 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1477 /* no hub change reports (bit 0) for now (power, ...) */
1479 /* port N changes (bit N)? */
1484 /*
1485 * Return status information even for ports with OWNER set.
1486 * Otherwise hub_wq wouldn't see the disconnect event when a
1487 * high-speed device is switched over to the companion
1488 * controller by the user.
1489 */
1496 }
1497 /* FIXME autosuspend idle root hubs */
1500 }
1502 /*-------------------------------------------------------------------------*/
1504 static void
1508 ) {
1510 u16 temp;
1520 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1527 }
1529 /*-------------------------------------------------------------------------*/
1533 u16 typeReq,
1534 u16 wValue,
1535 u16 wIndex,
1537 u16 wLength
1538 ) {
1547 /*
1548 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1549 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1550 * (track current state ourselves) ... blink for diagnostics,
1551 * power, "this is the one", etc. EHCI spec supports this.
1552 */
1560 /* no hub-wide feature/status flags */
1564 }
1569 wIndex--;
1573 /*
1574 * Even if OWNER is set, so the port is owned by the
1575 * companion controller, hub_wq needs to be able to clear
1576 * the port-change status bits (especially
1577 * USB_PORT_STAT_C_CONNECTION).
1578 */
1595 /* resume signaling for 20 msec */
1611 /* GetPortStatus clears reset */
1615 }
1620 buf);
1623 /* no hub-wide feature/status flags */
1625 /*cpu_to_le32s ((u32 *) buf); */
1630 wIndex--;
1634 /* wPortChange bits */
1644 /* whoever resumes must GetPortStatus to complete it!! */
1647 /* Remote Wakeup received? */
1649 /* resume signaling for 20 msec */
1652 /* check the port again */
1655 }
1657 /* resume completed? */
1664 /* stop resume signaling */
1668 status_reg);
1677 }
1679 }
1680 }
1682 /* whoever resets must GetPortStatus to complete it!! */
1690 /* force reset to complete */
1693 status_reg);
1694 /* REVISIT: some hardware needs 550+ usec to clear
1695 * this bit; seems too long to spin routinely...
1696 */
1703 }
1705 /* see what we found out */
1708 }
1713 }
1715 /* transfer dedicated ports to the companion hc */
1723 }
1725 /*
1726 * Even if OWNER is set, there's no harm letting hub_wq
1727 * see the wPortStatus values (they should all be 0 except
1728 * for PORT_POWER anyway).
1729 */
1734 }
1738 /* maybe the port was unsuspended without our knowledge */
1747 }
1765 /* no hub-wide feature/status flags */
1769 }
1777 wIndex--;
1786 /* After above check the port must be connected.
1787 * Set appropriate bit thus could put phy into low power
1788 * mode if we have hostpc feature
1789 */
1791 status_reg);
1797 /* line status bits may report this as low speed,
1798 * which can be fine if this root hub has a
1799 * transaction translator built in.
1800 */
1805 /*
1806 * caller must wait, then call GetPortStatus
1807 * usb 2.0 spec says 50 ms resets on root
1808 */
1814 /* For downstream facing ports (these): one hub port is put
1815 * into test mode according to USB2 11.24.2.13, then the hub
1816 * must be reset (which for root hub now means rmmod+modprobe,
1817 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1818 * about the EHCI-specific stuff.
1819 */
1827 /* Put all enabled ports into suspend */
1832 status_reg);
1845 }
1850 error:
1851 /* "stall" on error */
1853 }
1856 }
1860 {
1862 }
1866 {
1868 }
1869 /*-------------------------------------------------------------------------*/
1870 /*
1871 * There's basically three types of memory:
1872 * - data used only by the HCD ... kmalloc is fine
1873 * - async and periodic schedules, shared by HC and HCD ... these
1874 * need to use dma_pool or dma_alloc_coherent
1875 * - driver buffers, read/written by HC ... single shot DMA mapped
1876 *
1877 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1878 * No memory seen by this driver is pageable.
1879 */
1881 /*-------------------------------------------------------------------------*/
1883 /* Allocate the key transfer structures from the previously allocated pool */
1887 {
1894 }
1897 gfp_t flags)
1898 {
1900 dma_addr_t dma;
1907 }
1911 {
1913 }
1917 {
1918 /* clean qtds first, and know this is not linked */
1922 }
1927 }
1930 gfp_t flags)
1931 {
1933 dma_addr_t dma;
1946 /* dummy td enables safe urb queuing */
1951 }
1952 done:
1954 fail1:
1956 fail:
1959 }
1961 /*-------------------------------------------------------------------------*/
1963 /* The queue heads and transfer descriptors are managed from pools tied
1964 * to each of the "per device" structures.
1965 * This is the initialisation and cleanup code.
1966 */
1969 {
1978 /* DMA consistent memory and pools */
1986 }
1998 /* shadow periodic table */
2001 }
2003 /* remember to add cleanup code (above) if you add anything here */
2005 {
2008 /* QTDs for control/bulk/intr transfers */
2017 /* QHs for control/bulk/intr transfers */
2030 /* ITD for high speed ISO transfers */
2039 /* Hardware periodic table */
2050 /* software shadow of hardware table */
2052 flags);
2056 fail:
2060 }
2061 /*-------------------------------------------------------------------------*/
2062 /*
2063 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
2064 *
2065 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
2066 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
2067 * buffers needed for the larger number). We use one QH per endpoint, queue
2068 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
2069 *
2070 * ISO traffic uses "ISO TD" (itd) records, and (along with
2071 * interrupts) needs careful scheduling. Performance improvements can be
2072 * an ongoing challenge. That's in "ehci-sched.c".
2073 *
2074 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
2075 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
2076 * (b) special fields in qh entries or (c) split iso entries. TTs will
2077 * buffer low/full speed data so the host collects it at high speed.
2078 */
2080 /*-------------------------------------------------------------------------*/
2082 /* fill a qtd, returning how much of the buffer we were able to queue up */
2084 static int
2087 {
2091 /* one buffer entry per 4K ... first might be short or unaligned */
2101 /* per-qtd limit: from 16K to 20K (best alignment) */
2110 else
2112 }
2114 /* short packets may only terminate transfers */
2117 }
2122 }
2124 /*-------------------------------------------------------------------------*/
2129 {
2132 /* writes to an active overlay are unsafe */
2138 /* Except for control endpoints, we make hardware maintain data
2139 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2140 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2141 * ever clear it.
2142 */
2151 }
2152 }
2155 }
2157 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2158 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2159 * recovery (including urb dequeue) would need software changes to a QH...
2160 */
2161 static void
2163 {
2171 /*
2172 * first qtd may already be partially processed.
2173 * If we come here during unlink, the QH overlay region
2174 * might have reference to the just unlinked qtd. The
2175 * qtd is updated in qh_completions(). Update the QH
2176 * overlay here.
2177 */
2181 }
2182 }
2186 }
2188 /*-------------------------------------------------------------------------*/
2194 {
2205 }
2210 {
2212 /* If an async split transaction gets an error or is unlinked,
2213 * the TT buffer may be left in an indeterminate state. We
2214 * have to clear the TT buffer.
2215 *
2216 * Note: this routine is never called for Isochronous transfers.
2217 */
2229 }
2230 }
2231 }
2237 u32 token
2238 )
2239 {
2242 /* count IN/OUT bytes, not SETUP (even short packets) */
2246 /* don't modify error codes */
2250 /* force cleanup after short read; not always an error */
2254 /* serious "can't proceed" faults reported by the hardware */
2257 /* FIXME "must" disable babbling device's port too */
2259 /* CERR nonzero + halt --> stall */
2263 /* In theory, more than one of the following bits can be set
2264 * since they are sticky and the transaction is retried.
2265 * Which to test first is rather arbitrary.
2266 */
2268 /* fs/ls interrupt xfer missed the complete-split */
2275 /* timeout, bad CRC, wrong PID, etc */
2283 }
2291 }
2294 }
2296 static void
2300 {
2304 /* S-mask in a QH means it's an interrupt urb */
2307 /* ... update hc-wide periodic stats (for usbfs) */
2309 }
2310 }
2315 /* report non-error and short read status as zero */
2319 }
2321 #ifdef FOTG210_URB_TRACE
2327 status,
2329 #endif
2331 /* complete() can reenter this HCD */
2336 }
2340 /*
2341 * Process and free completed qtds for a qh, returning URBs to drivers.
2342 * Chases up to qh->hw_current. Returns number of completions called,
2343 * indicating how much "real" work we did.
2344 */
2345 static unsigned
2347 {
2353 u8 state;
2359 /* completions (or tasks on other cpus) must never clobber HALT
2360 * till we've gone through and cleaned everything up, even when
2361 * they add urbs to this qh's queue or mark them for unlinking.
2362 *
2363 * NOTE: unlinking expects to be done in queue order.
2364 *
2365 * It's a bug for qh->qh_state to be anything other than
2366 * QH_STATE_IDLE, unless our caller is scan_async() or
2367 * scan_intr().
2368 */
2373 rescan:
2378 /* remove de-activated QTDs from front of queue.
2379 * after faults (including short reads), cleanup this urb
2380 * then let the queue advance.
2381 * if queue is stopped, handles unlinks.
2382 */
2391 /* clean up any state from previous QTD ...*/
2395 last_status);
2396 count++;
2398 }
2401 }
2403 /* ignore urbs submitted during completions we reported */
2407 /* hardware copies qtd out of qh overlay */
2411 /* always clean up qtds the hc de-activated */
2412 retry_xacterr:
2415 /* Report Data Buffer Error: non-fatal but useful */
2419 urb,
2424 qtd,
2425 qh);
2427 /* on STALL, error, and short reads this urb must
2428 * complete and all its qtds must be recycled.
2429 */
2432 /* retry transaction errors until we
2433 * reach the software xacterr limit
2434 */
2443 /* reset the token in the qtd and the
2444 * qh overlay (which still contains
2445 * the qtd) so that we pick up from
2446 * where we left off
2447 */
2452 token);
2455 token);
2457 }
2460 /* magic dummy for some short reads; qh won't advance.
2461 * that silicon quirk can kick in with this dummy too.
2462 *
2463 * other short reads won't stop the queue, including
2464 * control transfers (status stage handles that) or
2465 * most other single-qtd reads ... the queue stops if
2466 * URB_SHORT_NOT_OK was set so the driver submitting
2467 * the urbs could clean it up.
2468 */
2473 }
2475 /* stop scanning when we reach qtds the hc is using */
2480 /* scan the whole queue for unlinks whenever it stops */
2484 /* cancel everything if we halt, suspend, etc */
2488 /* this qtd is active; skip it unless a previous qtd
2489 * for its urb faulted, or its urb was canceled.
2490 */
2494 /* qh unlinked; token in overlay may be most current */
2500 /* An unlink may leave an incomplete
2501 * async transaction in the TT buffer.
2502 * We have to clear it.
2503 */
2505 token);
2506 }
2507 }
2509 /* unless we already know the urb's status, collect qtd status
2510 * and update count of bytes transferred. in common short read
2511 * cases with only one data qtd (including control transfers),
2512 * queue processing won't halt. but with two or more qtds (for
2513 * example, with a 32 KB transfer), when the first qtd gets a
2514 * short read the second must be removed by hand.
2515 */
2524 /* As part of low/full-speed endpoint-halt processing
2525 * we must clear the TT buffer (11.17.5).
2526 */
2529 /* The TT's in some hubs malfunction when they
2530 * receive this request following a STALL (they
2531 * stop sending isochronous packets). Since a
2532 * STALL can't leave the TT buffer in a busy
2533 * state (if you believe Figures 11-48 - 11-51
2534 * in the USB 2.0 spec), we won't clear the TT
2535 * buffer in this case. Strictly speaking this
2536 * is a violation of the spec.
2537 */
2541 }
2542 }
2544 /* if we're removing something not at the queue head,
2545 * patch the hardware queue pointer.
2546 */
2551 }
2553 /* remove qtd; it's recycled after possible urb completion */
2557 /* reinit the xacterr counter for the next qtd */
2559 }
2561 /* last urb's completion might still need calling */
2564 count++;
2566 }
2568 /* Do we need to rescan for URBs dequeued during a giveback? */
2570 /* If the QH is already unlinked, do the rescan now. */
2574 /* Otherwise we have to wait until the QH is fully unlinked.
2575 * Our caller will start an unlink if qh->needs_rescan is
2576 * set. But if an unlink has already started, nothing needs
2577 * to be done.
2578 */
2581 }
2583 /* restore original state; caller must unlink or relink */
2586 /* be sure the hardware's done with the qh before refreshing
2587 * it after fault cleanup, or recovering from silicon wrongly
2588 * overlaying the dummy qtd (which reduces DMA chatter).
2589 */
2596 /* We won't refresh a QH that's linked (after the HC
2597 * stopped the queue). That avoids a race:
2598 * - HC reads first part of QH;
2599 * - CPU updates that first part and the token;
2600 * - HC reads rest of that QH, including token
2601 * Result: HC gets an inconsistent image, and then
2602 * DMAs to/from the wrong memory (corrupting it).
2603 *
2604 * That should be rare for interrupt transfers,
2605 * except maybe high bandwidth ...
2606 */
2608 /* Tell the caller to start an unlink */
2611 /* otherwise, unlink already started */
2612 }
2613 }
2616 }
2618 /*-------------------------------------------------------------------------*/
2620 /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */
2621 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2622 /* ... and packet size, for any kind of endpoint descriptor */
2623 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2625 /*
2626 * reverse of qh_urb_transaction: free a list of TDs.
2627 * used for cleanup after errors, before HC sees an URB's TDs.
2628 */
2633 ) {
2642 }
2643 }
2645 /*
2646 * create a list of filled qtds for this URB; won't link into qh.
2647 */
2653 gfp_t flags
2654 ) {
2656 dma_addr_t buf;
2659 u32 token;
2663 /*
2664 * URBs map to sequences of QTDs: one logical transaction
2665 */
2674 /* for split transactions, SplitXState initialized to zero */
2679 /* SETUP pid */
2684 /* ... and always at least one more pid */
2694 /* for zero length DATA stages, STATUS is always IN */
2697 }
2699 /*
2700 * data transfer stage: buffer setup
2701 */
2707 /* urb->transfer_buffer_length may be smaller than the
2708 * size of the scatterlist (or vice versa)
2709 */
2715 }
2719 /* else it's already initted to "out" pid (0 << 8) */
2723 /*
2724 * buffer gets wrapped in one or more qtds;
2725 * last one may be "short" (including zero len)
2726 * and may serve as a control status ack
2727 */
2732 maxpacket);
2737 /*
2738 * short reads advance to a "magic" dummy instead of the next
2739 * qtd ... that forces the queue to stop, for manual cleanup.
2740 * (this will usually be overridden later.)
2741 */
2745 /* qh makes control packets use qtd toggle; maybe switch it */
2755 }
2764 }
2766 /*
2767 * unless the caller requires manual cleanup after short reads,
2768 * have the alt_next mechanism keep the queue running after the
2769 * last data qtd (the only one, for control and most other cases).
2770 */
2775 /*
2776 * control requests may need a terminating data "status" ack;
2777 * other OUT ones may need a terminating short packet
2778 * (zero length).
2779 */
2791 }
2801 /* never any data in such packets */
2803 }
2804 }
2806 /* by default, enable interrupt on urb completion */
2811 cleanup:
2814 }
2816 /*-------------------------------------------------------------------------*/
2817 /*
2818 * Would be best to create all qh's from config descriptors,
2819 * when each interface/altsetting is established. Unlink
2820 * any previous qh and cancel its urbs first; endpoints are
2821 * implicitly reset then (data toggle too).
2822 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2823 */
2826 /*
2827 * Each QH holds a qtd list; a QH is used for everything except iso.
2828 *
2829 * For interrupt urbs, the scheduler must set the microframe scheduling
2830 * mask(s) each time the QH gets scheduled. For highspeed, that's
2831 * just one microframe in the s-mask. For split interrupt transactions
2832 * there are additional complications: c-mask, maybe FSTNs.
2833 */
2838 gfp_t flags
2839 ) {
2850 /*
2851 * init endpoint/device data for this QH
2852 */
2860 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2861 * acts like up to 3KB, but is built from smaller packets.
2862 */
2867 }
2869 /* Compute interrupt scheduling parameters just once, and save.
2870 * - allowing for high bandwidth, how many nsec/uframe are used?
2871 * - split transactions need a second CSPLIT uframe; same question
2872 * - splits also need a schedule gap (for full/low speed I/O)
2873 * - qh has a polling interval
2874 *
2875 * For control/bulk requests, the HC or TT handles these.
2876 */
2889 /* NOTE interval 2 or 4 uframes could work.
2890 * But interval 1 scheduling is simpler, and
2891 * includes high bandwidth.
2892 */
2897 }
2901 /* gap is f(FS/LS transfer times) */
2905 /* FIXME this just approximates SPLIT/CSPLIT times */
2912 }
2922 }
2923 }
2924 }
2926 /* support for tt scheduling, and access to toggles */
2929 /* using TT? */
2933 /* FALL THROUGH */
2936 /* EPS 0 means "full" */
2942 }
2947 /* Some Freescale processors have an erratum in which the
2948 * port number in the queue head was 0..N-1 instead of 1..N.
2949 */
2952 else
2955 /* set the address of the TT; for TDI's integrated
2956 * root hub tt, leave it zeroed.
2957 */
2961 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2974 /* The USB spec says that high speed bulk endpoints
2975 * always use 512 byte maxpacket. But some device
2976 * vendors decided to ignore that, and MSFT is happy
2977 * to help them do so. So now people expect to use
2978 * such nonconformant devices with Linux too; sigh.
2979 */
2985 }
2990 done:
2993 }
2995 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2997 /* init as live, toggle clear, advance to dummy */
3006 }
3008 /*-------------------------------------------------------------------------*/
3011 {
3015 /* Stop waiting to turn off the async schedule */
3018 /* Don't start the schedule until ASS is 0 */
3021 }
3024 {
3028 /* The async schedule and async_unlink list are supposed to be empty */
3031 /* Don't turn off the schedule until ASS is 1 */
3033 }
3035 /* move qh (and its qtds) onto async queue; maybe enable queue. */
3038 {
3042 /* Don't link a QH if there's a Clear-TT-Buffer pending */
3048 /* clear halt and/or toggle; and maybe recover from silicon quirk */
3051 /* splice right after start */
3062 /* qtd completions reported later by interrupt */
3065 }
3067 /*-------------------------------------------------------------------------*/
3069 /*
3070 * For control/bulk/interrupt, return QH with these TDs appended.
3071 * Allocates and initializes the QH if necessary.
3072 * Returns null if it can't allocate a QH it needs to.
3073 * If the QH has TDs (urbs) already, that's great.
3074 */
3081 )
3082 {
3088 /* can't sleep here, we have fotg210->lock... */
3091 }
3097 else
3099 qtd_list);
3101 /* control qh may need patching ... */
3103 /* usb_reset_device() briefly reverts to address 0 */
3106 }
3108 /* just one way to queue requests: swap with the dummy qtd.
3109 * only hc or qh_refresh() ever modify the overlay.
3110 */
3113 dma_addr_t dma;
3114 __hc32 token;
3116 /* to avoid racing the HC, use the dummy td instead of
3117 * the first td of our list (becomes new dummy). both
3118 * tds stay deactivated until we're done, when the
3119 * HC is allowed to fetch the old dummy (4.10.2).
3120 */
3137 /* hc must see the new dummy at list end */
3143 /* let the hc process these next qtds */
3148 }
3149 }
3151 }
3153 /*-------------------------------------------------------------------------*/
3155 static int
3160 gfp_t mem_flags
3161 ) {
3169 #ifdef FOTG210_URB_TRACE
3170 {
3179 }
3180 #endif
3186 }
3196 }
3198 /* Control/bulk operations through TTs don't need scheduling,
3199 * the HC and TT handle it when the TT has a buffer ready.
3200 */
3203 done:
3208 }
3210 /*-------------------------------------------------------------------------*/
3214 {
3217 /* Add to the end of the list of QHs waiting for the next IAAD */
3221 else
3225 /* Unlink it from the schedule */
3234 }
3237 {
3238 /*
3239 * Do nothing if an IAA cycle is already running or
3240 * if one will be started shortly.
3241 */
3245 /* Do all the waiting QHs at once */
3249 /* If the controller isn't running, we don't have to wait for it */
3254 /* Otherwise start a new IAA cycle */
3256 /* Make sure the unlinks are all visible to the hardware */
3264 }
3265 }
3267 /* the async qh for the qtds being unlinked are now gone from the HC */
3270 {
3273 /* Process the idle QHs */
3274 restart:
3289 }
3292 /* Start a new IAA cycle if any QHs are waiting for it */
3297 }
3298 }
3301 {
3306 /* Unlink all the async QHs that have been empty for a timer cycle */
3317 else
3319 }
3320 }
3322 /* Start a new IAA cycle if any QHs are waiting for it */
3326 /* QHs that haven't been empty for long enough will be handled later */
3331 }
3332 }
3334 /* makes sure the async qh will become idle */
3335 /* caller must own fotg210->lock */
3339 {
3340 /*
3341 * If the QH isn't linked then there's nothing we can do
3342 * unless we were called during a giveback, in which case
3343 * qh_completions() has to deal with it.
3344 */
3349 }
3353 }
3355 /*-------------------------------------------------------------------------*/
3358 {
3366 rescan:
3367 /* clean any finished work for this qh */
3371 /*
3372 * Unlinks could happen here; completion reporting
3373 * drops the lock. That's why fotg210->qh_scan_next
3374 * always holds the next qh to scan; if the next qh
3375 * gets unlinked then fotg210->qh_scan_next is adjusted
3376 * in single_unlink_async().
3377 */
3387 }
3388 }
3390 /*
3391 * Unlink empty entries, reducing DMA usage as well
3392 * as HCD schedule-scanning costs. Delay for any qh
3393 * we just scanned, there's a not-unusual case that it
3394 * doesn't stay idle for long.
3395 */
3402 }
3403 }
3404 /*-------------------------------------------------------------------------*/
3405 /*
3406 * EHCI scheduled transaction support: interrupt, iso, split iso
3407 * These are called "periodic" transactions in the EHCI spec.
3408 *
3409 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3410 * with the "asynchronous" transaction support (control/bulk transfers).
3411 * The only real difference is in how interrupt transfers are scheduled.
3412 *
3413 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3414 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3415 * pre-calculated schedule data to make appending to the queue be quick.
3416 */
3420 /*-------------------------------------------------------------------------*/
3422 /*
3423 * periodic_next_shadow - return "next" pointer on shadow list
3424 * @periodic: host pointer to qh/itd
3425 * @tag: hardware tag for type of this record
3426 */
3430 {
3438 }
3439 }
3444 {
3446 /* our fotg210_shadow.qh is actually software part */
3449 /* others are hw parts */
3452 }
3453 }
3455 /* caller must hold fotg210->lock */
3458 {
3463 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3470 }
3471 /* an interrupt entry (at list end) could have been shared */
3475 /* update shadow and hardware lists ... the old "next" pointers
3476 * from ptr may still be in use, the caller updates them.
3477 */
3483 }
3485 /* how many of the uframe's 125 usecs are allocated? */
3486 static unsigned short
3488 {
3498 /* is it in the S-mask? */
3501 /* ... or C-mask? */
3508 /* case Q_TYPE_FSTN: */
3510 /* for "save place" FSTNs, count the relevant INTR
3511 * bandwidth from the previous frame
3512 */
3525 }
3526 }
3531 }
3533 /*-------------------------------------------------------------------------*/
3536 {
3543 else
3545 }
3547 /* return true iff the device's transaction translator is available
3548 * for a periodic transfer starting at the specified frame, using
3549 * all the uframes in the mask.
3550 */
3556 u32 uf_mask
3557 )
3558 {
3562 /* note bandwidth wastage: split never follows csplit
3563 * (different dev or endpoint) until the next uframe.
3564 * calling convention doesn't make that distinction.
3565 */
3568 __hc32 type;
3582 u32 mask;
3586 /* "knows" no gap is needed */
3590 }
3594 /* case Q_TYPE_FSTN: */
3599 }
3601 /* collision or error */
3603 }
3604 }
3606 /* no collision */
3608 }
3610 /*-------------------------------------------------------------------------*/
3613 {
3617 /* Stop waiting to turn off the periodic schedule */
3621 /* Don't start the schedule until PSS is 0 */
3624 }
3627 {
3631 /* Don't turn off the schedule until PSS is 1 */
3633 }
3635 /*-------------------------------------------------------------------------*/
3637 /* periodic schedule slots have iso tds (normal or split) first, then a
3638 * sparse tree for active interrupt transfers.
3639 *
3640 * this just links in a qh; caller guarantees uframe masks are set right.
3641 * no FSTN support (yet; fotg210 0.96+)
3642 */
3644 {
3654 /* high bandwidth, or otherwise every microframe */
3664 /* skip the iso nodes at list head */
3672 }
3674 /* sorting each branch by period (slow-->fast)
3675 * enables sharing interior tree nodes
3676 */
3683 }
3684 /* link in this qh, unless some earlier pass did that */
3692 }
3693 }
3697 /* update per-qh bandwidth for usbfs */
3704 /* maybe enable periodic schedule processing */
3707 }
3711 {
3715 /*
3716 * If qh is for a low/full-speed device, simply unlinking it
3717 * could interfere with an ongoing split transaction. To unlink
3718 * it safely would require setting the QH_INACTIVATE bit and
3719 * waiting at least one frame, as described in EHCI 4.12.2.5.
3720 *
3721 * We won't bother with any of this. Instead, we assume that the
3722 * only reason for unlinking an interrupt QH while the current URB
3723 * is still active is to dequeue all the URBs (flush the whole
3724 * endpoint queue).
3725 *
3726 * If rebalancing the periodic schedule is ever implemented, this
3727 * approach will no longer be valid.
3728 */
3730 /* high bandwidth, or otherwise part of every microframe */
3738 /* update per-qh bandwidth for usbfs */
3749 /* qh->qh_next still "live" to HC */
3757 }
3761 {
3762 /* If the QH isn't linked then there's nothing we can do
3763 * unless we were called during a giveback, in which case
3764 * qh_completions() has to deal with it.
3765 */
3770 }
3774 /* Make sure the unlinks are visible before starting the timer */
3777 /*
3778 * The EHCI spec doesn't say how long it takes the controller to
3779 * stop accessing an unlinked interrupt QH. The timer delay is
3780 * 9 uframes; presumably that will be long enough.
3781 */
3784 /* New entries go at the end of the intr_unlink list */
3787 else
3799 }
3800 }
3803 {
3812 /* reschedule QH iff another request is queued */
3817 /* An error here likely indicates handshake failure
3818 * or no space left in the schedule. Neither fault
3819 * should happen often ...
3820 *
3821 * FIXME kill the now-dysfunctional queued urbs
3822 */
3826 }
3828 /* maybe turn off periodic schedule */
3831 }
3833 /*-------------------------------------------------------------------------*/
3840 unsigned usecs
3841 ) {
3844 /* complete split running into next frame?
3845 * given FSTN support, we could sometimes check...
3846 */
3850 /* convert "usecs we need" to "max already claimed" */
3853 /* we "know" 2 and 4 uframe intervals were rejected; so
3854 * for period 0, check _every_ microframe in the schedule.
3855 */
3860 uframe);
3863 }
3866 /* just check the specified uframe, at that period */
3873 }
3875 /* success! */
3877 }
3884 __hc32 *c_maskp
3885 )
3886 {
3899 }
3901 /* Make sure this tt's buffer is also available for CSPLITs.
3902 * We pessimize a bit; probably the typical full speed case
3903 * doesn't need the second CSPLIT.
3904 *
3905 * NOTE: both SPLIT and CSPLIT could be checked in just
3906 * one smart pass...
3907 */
3920 }
3921 done:
3923 }
3925 /* "first fit" scheduling policy used the first time through,
3926 * or when the previous schedule slot can't be re-used.
3927 */
3929 {
3932 __hc32 c_mask;
3940 /* reuse the previous schedule slots, if we can */
3949 }
3951 /* else scan the schedule to find a group of slots such that all
3952 * uframes have enough periodic bandwidth available.
3953 */
3955 /* "normal" case, uframing flexible except with splits */
3967 }
3968 }
3970 /* qh->period == 0 means every uframe */
3975 }
3980 /* reset S-frame and (maybe) C-frame masks */
3989 /* stuff into the periodic schedule */
3991 done:
3993 }
3999 gfp_t mem_flags
4000 ) {
4007 /* get endpoint and transfer/schedule data */
4015 }
4020 /* get qh and force any scheduling errors */
4026 }
4031 }
4033 /* then queue the urb's tds to the qh */
4037 /* ... update usbfs periodic stats */
4040 done:
4043 done_not_linked:
4049 }
4052 {
4057 rescan:
4058 /* clean any finished work for this qh */
4062 /*
4063 * Unlinks could happen here; completion reporting
4064 * drops the lock. That's why fotg210->qh_scan_next
4065 * always holds the next qh to scan; if the next qh
4066 * gets unlinked then fotg210->qh_scan_next is adjusted
4067 * in qh_unlink_periodic().
4068 */
4076 }
4077 }
4078 }
4080 /*-------------------------------------------------------------------------*/
4082 /* fotg210_iso_stream ops work with both ITD and SITD */
4086 {
4094 }
4096 }
4098 static void
4104 unsigned interval
4105 )
4106 {
4107 u32 buf1;
4113 /*
4114 * this might be a "high bandwidth" highspeed endpoint,
4115 * as encoded in the ep descriptor's wMaxPacket field
4116 */
4122 else
4134 /* usbfs wants to report the average usecs per frame tied up
4135 * when transfers on this endpoint are scheduled ...
4136 */
4145 }
4154 }
4158 {
4167 else
4180 }
4182 /* if dev->ep[epnum] is a QH, hw is set */
4188 }
4192 }
4194 /*-------------------------------------------------------------------------*/
4196 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4200 {
4210 }
4218 )
4219 {
4223 /* how many uframes are needed for these transfers */
4226 /* figure out per-uframe itd fields that we'll need later
4227 * when we fit new itds into the schedule.
4228 */
4232 dma_addr_t buf;
4233 u32 trans;
4246 /* might need to cross a buffer page within a uframe */
4251 }
4252 }
4254 static void
4258 )
4259 {
4262 /* caller must hold fotg210->lock!*/
4265 }
4267 static int
4272 gfp_t mem_flags
4273 )
4274 {
4276 dma_addr_t itd_dma;
4290 else
4293 /* allocate/init ITDs */
4297 /*
4298 * Use iTDs from the free list, but not iTDs that may
4299 * still be in use by the hardware.
4300 */
4309 alloc_itd:
4318 }
4319 }
4324 }
4327 /* temporarily store schedule info in hcpriv */
4331 }
4333 /*-------------------------------------------------------------------------*/
4338 u32 mod,
4339 u32 uframe,
4340 u8 usecs,
4341 u32 period
4342 )
4343 {
4346 /* can't commit more than uframe_periodic_max usec */
4351 /* we know urb->interval is 2^N uframes */
4355 }
4357 /*
4358 * This scheduler plans almost as far into the future as it has actual
4359 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4360 * "as small as possible" to be cache-friendlier.) That limits the size
4361 * transfers you can stream reliably; avoid more than 64 msec per urb.
4362 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4363 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4364 * and other factors); or more than about 230 msec total (for portability,
4365 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4366 */
4370 static int
4375 )
4376 {
4389 }
4393 /* Typical case: reuse current schedule, stream is still active.
4394 * Hopefully there are no gaps from the host falling behind
4395 * (irq delays etc), but if there are we'll take the next
4396 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4397 */
4399 u32 excess;
4401 /* For high speed devices, allow scheduling within the
4402 * isochronous scheduling threshold. For full speed devices
4403 * and Intel PCI-based controllers, don't (work around for
4404 * Intel ICH9 bug).
4405 */
4408 else
4411 /* Fell behind (by up to twice the slop amount)?
4412 * We decide based on the time of the last currently-scheduled
4413 * slot, not the time of the next available slot.
4414 */
4419 else
4424 mod);
4427 }
4428 }
4430 /* need to schedule; when's the next (u)frame we could start?
4431 * this is bigger than fotg210->i_thresh allows; scheduling itself
4432 * isn't free, the slop should handle reasonably slow cpus. it
4433 * can also help high bandwidth if the dma and irq loads don't
4434 * jump until after the queue is primed.
4435 */
4440 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4442 /* find a uframe slot with enough bandwidth.
4443 * Early uframes are more precious because full-speed
4444 * iso IN transfers can't use late uframes,
4445 * and therefore they should be allocated last.
4446 */
4450 start--;
4451 /* check schedule: enough space? */
4457 /* no room in the schedule */
4463 }
4464 }
4466 /* Tried to schedule too far into the future? */
4474 }
4478 /* report high speed start in uframes; full speed, in frames */
4483 /* Make sure scan_isoc() sees these */
4488 fail:
4492 }
4494 /*-------------------------------------------------------------------------*/
4499 {
4502 /* it's been recently zeroed */
4511 /* All other fields are filled when scheduling */
4512 }
4520 u16 uframe
4521 )
4522 {
4534 /* iso_frame_desc[].offset must be strictly increasing */
4541 }
4542 }
4546 {
4552 /* skip any iso nodes which might belong to previous microframes */
4560 }
4568 }
4570 /* fit urb's itds into the selected schedule slot; activate as needed */
4576 )
4577 {
4594 }
4596 /* fill iTDs uframe by uframe */
4599 /* ASSERT: we have all necessary itds */
4601 /* ASSERT: no itds for this endpoint in this uframe */
4609 }
4618 packet++;
4620 /* link completed itds into the schedule */
4624 itd);
4626 }
4627 }
4630 /* don't need that schedule data any more */
4636 }
4638 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4639 FOTG210_ISOC_XACTERR)
4641 /* Process and recycle a completed ITD. Return true iff its urb completed,
4642 * and hence its completion callback probably added things to the hardware
4643 * schedule.
4644 *
4645 * Note that we carefully avoid recycling this descriptor until after any
4646 * completion callback runs, so that it won't be reused quickly. That is,
4647 * assuming (a) no more than two urbs per frame on this endpoint, and also
4648 * (b) only this endpoint's completions submit URBs. It seems some silicon
4649 * corrupts things if you reuse completed descriptors very quickly...
4650 */
4652 {
4655 u32 t;
4662 /* for each uframe with a packet */
4672 /* report transfer status */
4684 /* HC need not update length with this error */
4689 }
4695 /* URB was too late */
4697 }
4698 }
4700 /* handle completion now? */
4704 /* ASSERT: it's really the last itd for this urb
4705 list_for_each_entry (itd, &stream->td_list, itd_list)
4706 BUG_ON (itd->urb == urb);
4707 */
4709 /* give urb back to the driver; completion often (re)submits */
4725 }
4727 done:
4730 /* Add to the end of the free list for later reuse */
4733 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4738 }
4741 }
4743 /*-------------------------------------------------------------------------*/
4746 gfp_t mem_flags)
4747 {
4752 /* Get iso_stream head */
4757 }
4760 USB_PORT_STAT_HIGH_SPEED)) {
4764 }
4766 #ifdef FOTG210_URB_TRACE
4774 stream);
4775 #endif
4777 /* allocate ITDs w/o locking anything */
4782 }
4784 /* schedule ... need to lock */
4789 }
4796 else
4798 done_not_linked:
4800 done:
4802 }
4804 /*-------------------------------------------------------------------------*/
4807 {
4812 /*
4813 * When running, scan from last scan point up to "now"
4814 * else clean up by scanning everything that's left.
4815 * Touches as few pages as possible: cache-friendly.
4816 */
4824 }
4832 restart:
4833 /* scan each element in frame's queue for completions */
4843 /* If this ITD is still active, leave it for
4844 * later processing ... check the next entry.
4845 * No need to check for activity unless the
4846 * frame is current.
4847 */
4854 }
4862 }
4863 }
4865 /* Take finished ITDs out of the schedule
4866 * and process them: recycle, maybe report
4867 * URB completion. HC won't cache the
4868 * pointer for much longer, if at all.
4869 */
4880 /* FALL THROUGH */
4883 /* End of the iTDs and siTDs */
4886 }
4888 /* assume completion callbacks modify the queue */
4891 }
4893 /* Stop when we have reached the current frame */
4897 }
4899 }
4900 /*-------------------------------------------------------------------------*/
4901 /*
4902 * Display / Set uframe_periodic_max
4903 */
4907 {
4914 }
4920 {
4926 ssize_t ret;
4934 uframe_periodic_max);
4936 }
4940 /*
4941 * lock, so that our checking does not race with possible periodic
4942 * bandwidth allocation through submitting new urbs.
4943 */
4946 /*
4947 * for request to decrease max periodic bandwidth, we have to check
4948 * every microframe in the schedule to see whether the decrease is
4949 * possible.
4950 */
4961 "cannot decrease uframe_periodic_max because "
4962 "periodic bandwidth is already allocated "
4966 }
4967 }
4969 /* increasing is always ok */
4980 out_unlock:
4983 }
4986 store_uframe_periodic_max);
4989 {
4997 out:
4999 }
5002 {
5006 }
5007 /*-------------------------------------------------------------------------*/
5009 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
5010 * The firmware seems to think that powering off is a wakeup event!
5011 * This routine turns off remote wakeup and everything else, on all ports.
5012 */
5014 {
5018 }
5020 /*
5021 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
5022 * Must be called with interrupts enabled and the lock not held.
5023 */
5025 {
5032 }
5034 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
5035 * This forcibly disables dma and IRQs, helping kexec and other cases
5036 * where the next system software may expect clean state.
5037 */
5039 {
5051 }
5053 /*-------------------------------------------------------------------------*/
5055 /*
5056 * fotg210_work is called from some interrupts, timers, and so on.
5057 * it calls driver completion functions, after dropping fotg210->lock.
5058 */
5060 {
5061 /* another CPU may drop fotg210->lock during a schedule scan while
5062 * it reports urb completions. this flag guards against bogus
5063 * attempts at re-entrant schedule scanning.
5064 */
5068 }
5071 rescan:
5083 /* the IO watchdog guards against hardware or driver bugs that
5084 * misplace IRQs, and should let us run completely without IRQs.
5085 * such lossage has been observed on both VT6202 and VT8235.
5086 */
5088 }
5090 /*
5091 * Called when the fotg210_hcd module is removed.
5092 */
5094 {
5099 /* no more interrupts ... */
5113 /* root hub is shut down separately (first, when possible) */
5119 #ifdef FOTG210_STATS
5125 #endif
5129 }
5131 /* one-time init, only for memory state */
5133 {
5135 u32 temp;
5137 u32 hcc_params;
5142 /*
5143 * keep io watchdog by default, those good HCDs could turn off it later
5144 */
5153 /*
5154 * by default set standard 80% (== 100 usec/uframe) max periodic
5155 * bandwidth as required by USB 2.0
5156 */
5159 /*
5160 * hw default: 1K periodic list heads, one per frame.
5161 * periodic_size can shrink by USBCMD update if hcc_params allows.
5162 */
5168 /* periodic schedule size can be smaller than default */
5181 }
5182 }
5187 /* controllers may cache some of the periodic schedule ... */
5190 /*
5191 * dedicate a qh for the async ring head, since we couldn't unlink
5192 * a 'real' qh without stopping the async schedule [4.8]. use it
5193 * as the 'reclamation list head' too.
5194 * its dummy is used in hw_alt_next of many tds, to prevent the qh
5195 * from automatically advancing to the next td after short reads.
5196 */
5206 /* clear interrupt enables, set irq latency */
5211 /* HW default park == 3, on hardware that supports it (like
5212 * NVidia and ALI silicon), maximizes throughput on the async
5213 * schedule by avoiding QH fetches between transfers.
5214 *
5215 * With fast usb storage devices and NForce2, "park" seems to
5216 * make problems: throughput reduction (!), data errors...
5217 */
5222 }
5224 }
5226 /* periodic schedule size can be smaller than default */
5229 }
5232 /* Accept arbitrarily long scatter-gather lists */
5236 }
5238 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
5240 {
5242 u32 temp;
5243 u32 hcc_params;
5247 /* EHCI spec section 4.1 */
5254 /*
5255 * hcc_params controls whether fotg210->regs->segment must (!!!)
5256 * be used; it constrains QH/ITD/SITD and QTD locations.
5257 * pci_pool consistent memory always uses segment zero.
5258 * streaming mappings for I/O buffers, like pci_map_single(),
5259 * can return segments above 4GB, if the device allows.
5260 *
5261 * NOTE: the dma mask is visible through dma_supported(), so
5262 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5263 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5264 * host side drivers though.
5265 */
5268 /*
5269 * Philips, Intel, and maybe others need CMD_RUN before the
5270 * root hub will detect new devices (why?); NEC doesn't
5271 */
5277 /*
5278 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5279 * are explicitly handed to companion controller(s), so no TT is
5280 * involved with the root hub. (Except where one is integrated,
5281 * and there's no companion controller unless maybe for USB OTG.)
5282 *
5283 * Turning on the CF flag will transfer ownership of all ports
5284 * from the companions to the EHCI controller. If any of the
5285 * companions are in the middle of a port reset at the time, it
5286 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5287 * guarantees that no resets are in progress. After we set CF,
5288 * a short delay lets the hardware catch up; new resets shouldn't
5289 * be started before the port switching actions could complete.
5290 */
5293 /* unblock posted writes */
5309 /* GRR this is run-once init(), being done every time the HC starts.
5310 * So long as they're part of class devices, we can't do it init()
5311 * since the class device isn't created that early.
5312 */
5317 }
5320 {
5330 /* cache this readonly data; minimize chip reads */
5336 /* data structure init */
5348 }
5350 /*-------------------------------------------------------------------------*/
5353 {
5362 /* e.g. cardbus physical eject */
5366 }
5368 /*
5369 * We don't use STS_FLR, but some controllers don't like it to
5370 * remain on, so mask it out along with the other status bits.
5371 */
5374 /* Shared IRQ? */
5379 }
5381 /* clear (just) interrupts */
5386 /* unrequested/ignored: Frame List Rollover */
5389 /* INT, ERR, and IAA interrupt rates can be throttled */
5391 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5395 else
5398 }
5400 /* complete the unlinking of some qh [4.15.2.3] */
5403 /* Turn off the IAA watchdog */
5407 /*
5408 * Mild optimization: Allow another IAAD to reset the
5409 * hrtimer, if one occurs before the next expiration.
5410 * In theory we could always cancel the hrtimer, but
5411 * tests show that about half the time it will be reset
5412 * for some other event anyway.
5413 */
5417 /* guard against (alleged) silicon errata */
5425 }
5427 /* remote wakeup [4.3.1] */
5432 /* kick root hub later */
5435 /* resume root hub? */
5447 /* start 20 msec resume signaling from this port,
5448 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5449 * stop that signaling. Use 5 ms extra for safety,
5450 * like usb_port_resume() does.
5451 */
5456 }
5457 }
5459 /* PCI errors [4.15.2.4] */
5464 dead:
5467 /* Don't let the controller do anything more */
5476 /* Handle completions when the controller stops */
5478 }
5486 }
5488 /*-------------------------------------------------------------------------*/
5490 /*
5491 * non-error returns are a promise to giveback() the urb later
5492 * we drop ownership so next owner (or urb unlink) can get it
5493 *
5494 * urb + dev is in hcd.self.controller.urb_list
5495 * we're queueing TDs onto software and hardware lists
5496 *
5497 * hcd-specific init for hcpriv hasn't been done yet
5498 *
5499 * NOTE: control, bulk, and interrupt share the same code to append TDs
5500 * to a (possibly active) QH, and the same QH scanning code.
5501 */
5505 gfp_t mem_flags
5506 ) {
5514 /* qh_completions() code doesn't handle all the fault cases
5515 * in multi-TD control transfers. Even 1KB is rare anyway.
5516 */
5519 /* FALLTHROUGH */
5520 /* case PIPE_BULK: */
5533 }
5534 }
5536 /* remove from hardware lists
5537 * completions normally happen asynchronously
5538 */
5541 {
5553 /* case PIPE_CONTROL: */
5554 /* case PIPE_BULK:*/
5566 /* already started */
5569 /* QH might be waiting for a Clear-TT-Buffer */
5572 }
5591 }
5595 /* itd... */
5597 /* wait till next completion, do it then. */
5598 /* completion irqs can wait up to 1024 msec, */
5600 }
5601 done:
5604 }
5606 /*-------------------------------------------------------------------------*/
5608 /* bulk qh holds the data toggle */
5610 static void
5612 {
5617 /* ASSERT: any requests/urbs are being unlinked */
5618 /* ASSERT: nobody can be submitting urbs for this any more */
5620 rescan:
5626 /* endpoints can be iso streams. for now, we don't
5627 * accelerate iso completions ... so spin a while.
5628 */
5635 /* BUG_ON(!list_empty(&stream->free_list)); */
5638 }
5649 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5650 * may already be unlinked.
5651 */
5654 /* FALL THROUGH */
5657 idle_timeout:
5667 }
5668 /* else FALL THROUGH */
5670 /* caller was supposed to have unlinked any requests;
5671 * that's not our job. just leak this memory.
5672 */
5677 }
5678 done:
5681 }
5683 static void
5685 {
5699 /* For Bulk and Interrupt endpoints we maintain the toggle state
5700 * in the hardware; the toggle bits in udev aren't used at all.
5701 * When an endpoint is reset by usb_clear_halt() we must reset
5702 * the toggle bit in the QH.
5703 */
5711 /* The toggle value in the QH can't be updated
5712 * while the QH is active. Unlink it now;
5713 * re-linking will call qh_refresh().
5714 */
5717 else
5719 }
5720 }
5722 }
5725 {
5729 }
5731 /*-------------------------------------------------------------------------*/
5733 /*
5734 * The EHCI in ChipIdea HDRC cannot be a separate module or device,
5735 * because its registers (and irq) are shared between host/gadget/otg
5736 * functions and in order to facilitate role switching we cannot
5737 * give the fotg210 driver exclusive access to those.
5738 */
5748 /*
5749 * generic hardware linkage
5750 */
5754 /*
5755 * basic lifecycle operations
5756 */
5762 /*
5763 * managing i/o requests and associated device resources
5764 */
5770 /*
5771 * scheduling support
5772 */
5775 /*
5776 * root hub support
5777 */
5787 };
5790 {
5791 u32 value;
5800 }
5802 /**
5803 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5804 *
5805 * Allocates basic resources for this USB host controller, and
5806 * then invokes the start() method for the HCD associated with it
5807 * through the hotplug entry's driver_data.
5808 */
5810 {
5829 }
5839 }
5848 }
5867 }
5872 failed:
5874 fail_create_hcd:
5877 }
5879 /**
5880 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5881 * @dev: USB Host Controller being removed
5882 *
5883 */
5885 {
5896 }
5901 },
5904 };
5907 {
5917 pr_warn(KERN_WARNING "Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5920 hcd_name,
5928 }
5936 clean:
5939 err_debug:
5942 }
5946 {
5950 }