Linux 4.2.1
[linux/fpc-iii.git] / drivers / usb / host / uhci-grlib.c
blob0342991c9507a24b31afcb7ca27b4cafb82512e3
1 /*
2 * UHCI HCD (Host Controller Driver) for GRLIB GRUSBHC
4 * Copyright (c) 2011 Jan Andersson <jan@gaisler.com>
6 * This file is based on UHCI PCI HCD:
7 * (C) Copyright 1999 Linus Torvalds
8 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
9 * (C) Copyright 1999 Randy Dunlap
10 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
11 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
12 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
13 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
14 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
15 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
16 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
17 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
20 #include <linux/device.h>
21 #include <linux/of_irq.h>
22 #include <linux/of_address.h>
23 #include <linux/of_platform.h>
25 static int uhci_grlib_init(struct usb_hcd *hcd)
27 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
30 * Probe to determine the endianness of the controller.
31 * We know that bit 7 of the PORTSC1 register is always set
32 * and bit 15 is always clear. If uhci_readw() yields a value
33 * with bit 7 (0x80) turned on then the current little-endian
34 * setting is correct. Otherwise we assume the value was
35 * byte-swapped; hence the register interface and presumably
36 * also the descriptors are big-endian.
38 if (!(uhci_readw(uhci, USBPORTSC1) & 0x80)) {
39 uhci->big_endian_mmio = 1;
40 uhci->big_endian_desc = 1;
43 uhci->rh_numports = uhci_count_ports(hcd);
45 /* Set up pointers to to generic functions */
46 uhci->reset_hc = uhci_generic_reset_hc;
47 uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc;
48 /* No special actions need to be taken for the functions below */
49 uhci->configure_hc = NULL;
50 uhci->resume_detect_interrupts_are_broken = NULL;
51 uhci->global_suspend_mode_is_broken = NULL;
53 /* Reset if the controller isn't already safely quiescent. */
54 check_and_reset_hc(uhci);
55 return 0;
58 static const struct hc_driver uhci_grlib_hc_driver = {
59 .description = hcd_name,
60 .product_desc = "GRLIB GRUSBHC UHCI Host Controller",
61 .hcd_priv_size = sizeof(struct uhci_hcd),
63 /* Generic hardware linkage */
64 .irq = uhci_irq,
65 .flags = HCD_MEMORY | HCD_USB11,
67 /* Basic lifecycle operations */
68 .reset = uhci_grlib_init,
69 .start = uhci_start,
70 #ifdef CONFIG_PM
71 .pci_suspend = NULL,
72 .pci_resume = NULL,
73 .bus_suspend = uhci_rh_suspend,
74 .bus_resume = uhci_rh_resume,
75 #endif
76 .stop = uhci_stop,
78 .urb_enqueue = uhci_urb_enqueue,
79 .urb_dequeue = uhci_urb_dequeue,
81 .endpoint_disable = uhci_hcd_endpoint_disable,
82 .get_frame_number = uhci_hcd_get_frame_number,
84 .hub_status_data = uhci_hub_status_data,
85 .hub_control = uhci_hub_control,
89 static int uhci_hcd_grlib_probe(struct platform_device *op)
91 struct device_node *dn = op->dev.of_node;
92 struct usb_hcd *hcd;
93 struct uhci_hcd *uhci = NULL;
94 struct resource res;
95 int irq;
96 int rv;
98 if (usb_disabled())
99 return -ENODEV;
101 dev_dbg(&op->dev, "initializing GRUSBHC UHCI USB Controller\n");
103 rv = of_address_to_resource(dn, 0, &res);
104 if (rv)
105 return rv;
107 /* usb_create_hcd requires dma_mask != NULL */
108 op->dev.dma_mask = &op->dev.coherent_dma_mask;
109 hcd = usb_create_hcd(&uhci_grlib_hc_driver, &op->dev,
110 "GRUSBHC UHCI USB");
111 if (!hcd)
112 return -ENOMEM;
114 hcd->rsrc_start = res.start;
115 hcd->rsrc_len = resource_size(&res);
117 irq = irq_of_parse_and_map(dn, 0);
118 if (irq == NO_IRQ) {
119 printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
120 rv = -EBUSY;
121 goto err_usb;
124 hcd->regs = devm_ioremap_resource(&op->dev, &res);
125 if (IS_ERR(hcd->regs)) {
126 rv = PTR_ERR(hcd->regs);
127 goto err_irq;
130 uhci = hcd_to_uhci(hcd);
132 uhci->regs = hcd->regs;
134 rv = usb_add_hcd(hcd, irq, 0);
135 if (rv)
136 goto err_irq;
138 device_wakeup_enable(hcd->self.controller);
139 return 0;
141 err_irq:
142 irq_dispose_mapping(irq);
143 err_usb:
144 usb_put_hcd(hcd);
146 return rv;
149 static int uhci_hcd_grlib_remove(struct platform_device *op)
151 struct usb_hcd *hcd = platform_get_drvdata(op);
153 dev_dbg(&op->dev, "stopping GRLIB GRUSBHC UHCI USB Controller\n");
155 usb_remove_hcd(hcd);
157 irq_dispose_mapping(hcd->irq);
158 usb_put_hcd(hcd);
160 return 0;
163 /* Make sure the controller is quiescent and that we're not using it
164 * any more. This is mainly for the benefit of programs which, like kexec,
165 * expect the hardware to be idle: not doing DMA or generating IRQs.
167 * This routine may be called in a damaged or failing kernel. Hence we
168 * do not acquire the spinlock before shutting down the controller.
170 static void uhci_hcd_grlib_shutdown(struct platform_device *op)
172 struct usb_hcd *hcd = platform_get_drvdata(op);
174 uhci_hc_died(hcd_to_uhci(hcd));
177 static const struct of_device_id uhci_hcd_grlib_of_match[] = {
178 { .name = "GAISLER_UHCI", },
179 { .name = "01_027", },
182 MODULE_DEVICE_TABLE(of, uhci_hcd_grlib_of_match);
185 static struct platform_driver uhci_grlib_driver = {
186 .probe = uhci_hcd_grlib_probe,
187 .remove = uhci_hcd_grlib_remove,
188 .shutdown = uhci_hcd_grlib_shutdown,
189 .driver = {
190 .name = "grlib-uhci",
191 .of_match_table = uhci_hcd_grlib_of_match,