ath9k_hw: tweak noise immunity thresholds for older chipsets
[linux/fpc-iii.git] / arch / arm / mach-s3c24xx / s3c2410.c
blobffb92cbca08cc06e2b23728cd9c88a826c9b52a8
1 /* linux/arch/arm/mach-s3c2410/s3c2410.c
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://www.simtec.co.uk/products/EB2410ITX/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/gpio.h>
20 #include <linux/clk.h>
21 #include <linux/device.h>
22 #include <linux/syscore_ops.h>
23 #include <linux/serial_core.h>
24 #include <linux/platform_device.h>
25 #include <linux/reboot.h>
26 #include <linux/io.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/irq.h>
32 #include <mach/hardware.h>
33 #include <mach/gpio-samsung.h>
34 #include <asm/irq.h>
35 #include <asm/system_misc.h>
37 #include <plat/cpu-freq.h>
39 #include <mach/regs-clock.h>
40 #include <plat/regs-serial.h>
42 #include <plat/cpu.h>
43 #include <plat/devs.h>
44 #include <plat/clock.h>
45 #include <plat/pll.h>
46 #include <plat/pm.h>
47 #include <plat/watchdog-reset.h>
49 #include <plat/gpio-core.h>
50 #include <plat/gpio-cfg.h>
51 #include <plat/gpio-cfg-helpers.h>
53 #include "common.h"
55 /* Initial IO mappings */
57 static struct map_desc s3c2410_iodesc[] __initdata = {
58 IODESC_ENT(CLKPWR),
59 IODESC_ENT(TIMER),
60 IODESC_ENT(WATCHDOG),
63 /* our uart devices */
65 /* uart registration process */
67 void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
69 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
72 /* s3c2410_map_io
74 * register the standard cpu IO areas, and any passed in from the
75 * machine specific initialisation.
78 void __init s3c2410_map_io(void)
80 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
81 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
83 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
86 void __init_or_cpufreq s3c2410_setup_clocks(void)
88 struct clk *xtal_clk;
89 unsigned long tmp;
90 unsigned long xtal;
91 unsigned long fclk;
92 unsigned long hclk;
93 unsigned long pclk;
95 xtal_clk = clk_get(NULL, "xtal");
96 xtal = clk_get_rate(xtal_clk);
97 clk_put(xtal_clk);
99 /* now we've got our machine bits initialised, work out what
100 * clocks we've got */
102 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
104 tmp = __raw_readl(S3C2410_CLKDIVN);
106 /* work out clock scalings */
108 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
109 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
111 /* print brieft summary of clocks, etc */
113 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
114 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
116 /* initialise the clocks here, to allow other things like the
117 * console to use them
120 s3c24xx_setup_clocks(fclk, hclk, pclk);
123 /* fake ARMCLK for use with cpufreq, etc. */
125 static struct clk s3c2410_armclk = {
126 .name = "armclk",
127 .parent = &clk_f,
128 .id = -1,
131 static struct clk_lookup s3c2410_clk_lookup[] = {
132 CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
133 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
136 void __init s3c2410_init_clocks(int xtal)
138 s3c24xx_register_baseclocks(xtal);
139 s3c2410_setup_clocks();
140 s3c2410_baseclk_add();
141 s3c24xx_register_clock(&s3c2410_armclk);
142 clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
143 samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
146 struct bus_type s3c2410_subsys = {
147 .name = "s3c2410-core",
148 .dev_name = "s3c2410-core",
151 /* Note, we would have liked to name this s3c2410-core, but we cannot
152 * register two subsystems with the same name.
154 struct bus_type s3c2410a_subsys = {
155 .name = "s3c2410a-core",
156 .dev_name = "s3c2410a-core",
159 static struct device s3c2410_dev = {
160 .bus = &s3c2410_subsys,
163 /* need to register the subsystem before we actually register the device, and
164 * we also need to ensure that it has been initialised before any of the
165 * drivers even try to use it (even if not on an s3c2410 based system)
166 * as a driver which may support both 2410 and 2440 may try and use it.
169 static int __init s3c2410_core_init(void)
171 return subsys_system_register(&s3c2410_subsys, NULL);
174 core_initcall(s3c2410_core_init);
176 static int __init s3c2410a_core_init(void)
178 return subsys_system_register(&s3c2410a_subsys, NULL);
181 core_initcall(s3c2410a_core_init);
183 int __init s3c2410_init(void)
185 printk("S3C2410: Initialising architecture\n");
187 #ifdef CONFIG_PM
188 register_syscore_ops(&s3c2410_pm_syscore_ops);
189 register_syscore_ops(&s3c24xx_irq_syscore_ops);
190 #endif
192 return device_register(&s3c2410_dev);
195 int __init s3c2410a_init(void)
197 s3c2410_dev.bus = &s3c2410a_subsys;
198 return s3c2410_init();
201 void s3c2410_restart(enum reboot_mode mode, const char *cmd)
203 if (mode == REBOOT_SOFT) {
204 soft_restart(0);
207 samsung_wdt_reset();
209 /* we'll take a jump through zero as a poor second */
210 soft_restart(0);