2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright Novell Inc 2010
17 * Authors: Alexander Graf <agraf@suse.de>
21 #include <asm/kvm_ppc.h>
22 #include <asm/disassemble.h>
23 #include <asm/kvm_book3s.h>
24 #include <asm/kvm_fpu.h>
26 #include <asm/cacheflush.h>
27 #include <asm/switch_to.h>
28 #include <linux/vmalloc.h>
33 #define dprintk printk
35 #define dprintk(...) do { } while(0);
51 #define OP_31_LFSX 535
52 #define OP_31_LFSUX 567
53 #define OP_31_LFDX 599
54 #define OP_31_LFDUX 631
55 #define OP_31_STFSX 663
56 #define OP_31_STFSUX 695
57 #define OP_31_STFX 727
58 #define OP_31_STFUX 759
59 #define OP_31_LWIZX 887
60 #define OP_31_STFIWX 983
62 #define OP_59_FADDS 21
63 #define OP_59_FSUBS 20
64 #define OP_59_FSQRTS 22
65 #define OP_59_FDIVS 18
67 #define OP_59_FMULS 25
68 #define OP_59_FRSQRTES 26
69 #define OP_59_FMSUBS 28
70 #define OP_59_FMADDS 29
71 #define OP_59_FNMSUBS 30
72 #define OP_59_FNMADDS 31
75 #define OP_63_FCPSGN 8
77 #define OP_63_FCTIW 14
78 #define OP_63_FCTIWZ 15
81 #define OP_63_FSQRT 22
85 #define OP_63_FRSQRTE 26
86 #define OP_63_FMSUB 28
87 #define OP_63_FMADD 29
88 #define OP_63_FNMSUB 30
89 #define OP_63_FNMADD 31
90 #define OP_63_FCMPO 32
91 #define OP_63_MTFSB1 38 // XXX
94 #define OP_63_MCRFS 64
95 #define OP_63_MTFSB0 70
97 #define OP_63_MTFSFI 134
98 #define OP_63_FABS 264
99 #define OP_63_MFFS 583
100 #define OP_63_MTFSF 711
102 #define OP_4X_PS_CMPU0 0
103 #define OP_4X_PSQ_LX 6
104 #define OP_4XW_PSQ_STX 7
105 #define OP_4A_PS_SUM0 10
106 #define OP_4A_PS_SUM1 11
107 #define OP_4A_PS_MULS0 12
108 #define OP_4A_PS_MULS1 13
109 #define OP_4A_PS_MADDS0 14
110 #define OP_4A_PS_MADDS1 15
111 #define OP_4A_PS_DIV 18
112 #define OP_4A_PS_SUB 20
113 #define OP_4A_PS_ADD 21
114 #define OP_4A_PS_SEL 23
115 #define OP_4A_PS_RES 24
116 #define OP_4A_PS_MUL 25
117 #define OP_4A_PS_RSQRTE 26
118 #define OP_4A_PS_MSUB 28
119 #define OP_4A_PS_MADD 29
120 #define OP_4A_PS_NMSUB 30
121 #define OP_4A_PS_NMADD 31
122 #define OP_4X_PS_CMPO0 32
123 #define OP_4X_PSQ_LUX 38
124 #define OP_4XW_PSQ_STUX 39
125 #define OP_4X_PS_NEG 40
126 #define OP_4X_PS_CMPU1 64
127 #define OP_4X_PS_MR 72
128 #define OP_4X_PS_CMPO1 96
129 #define OP_4X_PS_NABS 136
130 #define OP_4X_PS_ABS 264
131 #define OP_4X_PS_MERGE00 528
132 #define OP_4X_PS_MERGE01 560
133 #define OP_4X_PS_MERGE10 592
134 #define OP_4X_PS_MERGE11 624
136 #define SCALAR_NONE 0
137 #define SCALAR_HIGH (1 << 0)
138 #define SCALAR_LOW (1 << 1)
139 #define SCALAR_NO_PS0 (1 << 2)
140 #define SCALAR_NO_PS1 (1 << 3)
142 #define GQR_ST_TYPE_MASK 0x00000007
143 #define GQR_ST_TYPE_SHIFT 0
144 #define GQR_ST_SCALE_MASK 0x00003f00
145 #define GQR_ST_SCALE_SHIFT 8
146 #define GQR_LD_TYPE_MASK 0x00070000
147 #define GQR_LD_TYPE_SHIFT 16
148 #define GQR_LD_SCALE_MASK 0x3f000000
149 #define GQR_LD_SCALE_SHIFT 24
151 #define GQR_QUANTIZE_FLOAT 0
152 #define GQR_QUANTIZE_U8 4
153 #define GQR_QUANTIZE_U16 5
154 #define GQR_QUANTIZE_S8 6
155 #define GQR_QUANTIZE_S16 7
157 #define FPU_LS_SINGLE 0
158 #define FPU_LS_DOUBLE 1
159 #define FPU_LS_SINGLE_LOW 2
161 static inline void kvmppc_sync_qpr(struct kvm_vcpu
*vcpu
, int rt
)
163 kvm_cvt_df(&VCPU_FPR(vcpu
, rt
), &vcpu
->arch
.qpr
[rt
]);
166 static void kvmppc_inject_pf(struct kvm_vcpu
*vcpu
, ulong eaddr
, bool is_store
)
169 u64 msr
= kvmppc_get_msr(vcpu
);
171 msr
= kvmppc_set_field(msr
, 33, 36, 0);
172 msr
= kvmppc_set_field(msr
, 42, 47, 0);
173 kvmppc_set_msr(vcpu
, msr
);
174 kvmppc_set_dar(vcpu
, eaddr
);
176 dsisr
= kvmppc_set_field(0, 33, 33, 1);
178 dsisr
= kvmppc_set_field(dsisr
, 38, 38, 1);
179 kvmppc_set_dsisr(vcpu
, dsisr
);
180 kvmppc_book3s_queue_irqprio(vcpu
, BOOK3S_INTERRUPT_DATA_STORAGE
);
183 static int kvmppc_emulate_fpr_load(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
184 int rs
, ulong addr
, int ls_type
)
186 int emulated
= EMULATE_FAIL
;
189 int len
= sizeof(u32
);
191 if (ls_type
== FPU_LS_DOUBLE
)
194 /* read from memory */
195 r
= kvmppc_ld(vcpu
, &addr
, len
, tmp
, true);
196 vcpu
->arch
.paddr_accessed
= addr
;
199 kvmppc_inject_pf(vcpu
, addr
, false);
201 } else if (r
== EMULATE_DO_MMIO
) {
202 emulated
= kvmppc_handle_load(run
, vcpu
, KVM_MMIO_REG_FPR
| rs
,
207 emulated
= EMULATE_DONE
;
209 /* put in registers */
212 kvm_cvt_fd((u32
*)tmp
, &VCPU_FPR(vcpu
, rs
));
213 vcpu
->arch
.qpr
[rs
] = *((u32
*)tmp
);
216 VCPU_FPR(vcpu
, rs
) = *((u64
*)tmp
);
220 dprintk(KERN_INFO
"KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64
*)tmp
,
227 static int kvmppc_emulate_fpr_store(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
228 int rs
, ulong addr
, int ls_type
)
230 int emulated
= EMULATE_FAIL
;
238 kvm_cvt_df(&VCPU_FPR(vcpu
, rs
), (u32
*)tmp
);
242 case FPU_LS_SINGLE_LOW
:
243 *((u32
*)tmp
) = VCPU_FPR(vcpu
, rs
);
244 val
= VCPU_FPR(vcpu
, rs
) & 0xffffffff;
248 *((u64
*)tmp
) = VCPU_FPR(vcpu
, rs
);
249 val
= VCPU_FPR(vcpu
, rs
);
257 r
= kvmppc_st(vcpu
, &addr
, len
, tmp
, true);
258 vcpu
->arch
.paddr_accessed
= addr
;
260 kvmppc_inject_pf(vcpu
, addr
, true);
261 } else if (r
== EMULATE_DO_MMIO
) {
262 emulated
= kvmppc_handle_store(run
, vcpu
, val
, len
, 1);
264 emulated
= EMULATE_DONE
;
267 dprintk(KERN_INFO
"KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n",
273 static int kvmppc_emulate_psq_load(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
274 int rs
, ulong addr
, bool w
, int i
)
276 int emulated
= EMULATE_FAIL
;
281 /* read from memory */
283 r
= kvmppc_ld(vcpu
, &addr
, sizeof(u32
), tmp
, true);
284 memcpy(&tmp
[1], &one
, sizeof(u32
));
286 r
= kvmppc_ld(vcpu
, &addr
, sizeof(u32
) * 2, tmp
, true);
288 vcpu
->arch
.paddr_accessed
= addr
;
290 kvmppc_inject_pf(vcpu
, addr
, false);
292 } else if ((r
== EMULATE_DO_MMIO
) && w
) {
293 emulated
= kvmppc_handle_load(run
, vcpu
, KVM_MMIO_REG_FPR
| rs
,
295 vcpu
->arch
.qpr
[rs
] = tmp
[1];
297 } else if (r
== EMULATE_DO_MMIO
) {
298 emulated
= kvmppc_handle_load(run
, vcpu
, KVM_MMIO_REG_FQPR
| rs
,
303 emulated
= EMULATE_DONE
;
305 /* put in registers */
306 kvm_cvt_fd(&tmp
[0], &VCPU_FPR(vcpu
, rs
));
307 vcpu
->arch
.qpr
[rs
] = tmp
[1];
309 dprintk(KERN_INFO
"KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp
[0],
310 tmp
[1], addr
, w
? 4 : 8);
316 static int kvmppc_emulate_psq_store(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
317 int rs
, ulong addr
, bool w
, int i
)
319 int emulated
= EMULATE_FAIL
;
322 int len
= w
? sizeof(u32
) : sizeof(u64
);
324 kvm_cvt_df(&VCPU_FPR(vcpu
, rs
), &tmp
[0]);
325 tmp
[1] = vcpu
->arch
.qpr
[rs
];
327 r
= kvmppc_st(vcpu
, &addr
, len
, tmp
, true);
328 vcpu
->arch
.paddr_accessed
= addr
;
330 kvmppc_inject_pf(vcpu
, addr
, true);
331 } else if ((r
== EMULATE_DO_MMIO
) && w
) {
332 emulated
= kvmppc_handle_store(run
, vcpu
, tmp
[0], 4, 1);
333 } else if (r
== EMULATE_DO_MMIO
) {
334 u64 val
= ((u64
)tmp
[0] << 32) | tmp
[1];
335 emulated
= kvmppc_handle_store(run
, vcpu
, val
, 8, 1);
337 emulated
= EMULATE_DONE
;
340 dprintk(KERN_INFO
"KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n",
341 tmp
[0], tmp
[1], addr
, len
);
347 * Cuts out inst bits with ordering according to spec.
348 * That means the leftmost bit is zero. All given bits are included.
350 static inline u32
inst_get_field(u32 inst
, int msb
, int lsb
)
352 return kvmppc_get_field(inst
, msb
+ 32, lsb
+ 32);
355 static bool kvmppc_inst_is_paired_single(struct kvm_vcpu
*vcpu
, u32 inst
)
357 if (!(vcpu
->arch
.hflags
& BOOK3S_HFLAG_PAIRED_SINGLE
))
360 switch (get_op(inst
)) {
376 switch (inst_get_field(inst
, 21, 30)) {
387 case OP_4X_PS_MERGE00
:
388 case OP_4X_PS_MERGE01
:
389 case OP_4X_PS_MERGE10
:
390 case OP_4X_PS_MERGE11
:
394 switch (inst_get_field(inst
, 25, 30)) {
396 case OP_4XW_PSQ_STUX
:
400 switch (inst_get_field(inst
, 26, 30)) {
405 case OP_4A_PS_MADDS0
:
406 case OP_4A_PS_MADDS1
:
413 case OP_4A_PS_RSQRTE
:
422 switch (inst_get_field(inst
, 21, 30)) {
430 switch (inst_get_field(inst
, 26, 30)) {
440 switch (inst_get_field(inst
, 21, 30)) {
462 switch (inst_get_field(inst
, 26, 30)) {
473 switch (inst_get_field(inst
, 21, 30)) {
491 static int get_d_signext(u32 inst
)
493 int d
= inst
& 0x8ff;
501 static int kvmppc_ps_three_in(struct kvm_vcpu
*vcpu
, bool rc
,
502 int reg_out
, int reg_in1
, int reg_in2
,
503 int reg_in3
, int scalar
,
504 void (*func
)(u64
*fpscr
,
506 u32
*src2
, u32
*src3
))
508 u32
*qpr
= vcpu
->arch
.qpr
;
510 u32 ps0_in1
, ps0_in2
, ps0_in3
;
511 u32 ps1_in1
, ps1_in2
, ps1_in3
;
517 kvm_cvt_df(&VCPU_FPR(vcpu
, reg_in1
), &ps0_in1
);
518 kvm_cvt_df(&VCPU_FPR(vcpu
, reg_in2
), &ps0_in2
);
519 kvm_cvt_df(&VCPU_FPR(vcpu
, reg_in3
), &ps0_in3
);
521 if (scalar
& SCALAR_LOW
)
522 ps0_in2
= qpr
[reg_in2
];
524 func(&vcpu
->arch
.fp
.fpscr
, &ps0_out
, &ps0_in1
, &ps0_in2
, &ps0_in3
);
526 dprintk(KERN_INFO
"PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
527 ps0_in1
, ps0_in2
, ps0_in3
, ps0_out
);
529 if (!(scalar
& SCALAR_NO_PS0
))
530 kvm_cvt_fd(&ps0_out
, &VCPU_FPR(vcpu
, reg_out
));
533 ps1_in1
= qpr
[reg_in1
];
534 ps1_in2
= qpr
[reg_in2
];
535 ps1_in3
= qpr
[reg_in3
];
537 if (scalar
& SCALAR_HIGH
)
540 if (!(scalar
& SCALAR_NO_PS1
))
541 func(&vcpu
->arch
.fp
.fpscr
, &qpr
[reg_out
], &ps1_in1
, &ps1_in2
, &ps1_in3
);
543 dprintk(KERN_INFO
"PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
544 ps1_in1
, ps1_in2
, ps1_in3
, qpr
[reg_out
]);
549 static int kvmppc_ps_two_in(struct kvm_vcpu
*vcpu
, bool rc
,
550 int reg_out
, int reg_in1
, int reg_in2
,
552 void (*func
)(u64
*fpscr
,
556 u32
*qpr
= vcpu
->arch
.qpr
;
558 u32 ps0_in1
, ps0_in2
;
560 u32 ps1_in1
, ps1_in2
;
566 kvm_cvt_df(&VCPU_FPR(vcpu
, reg_in1
), &ps0_in1
);
568 if (scalar
& SCALAR_LOW
)
569 ps0_in2
= qpr
[reg_in2
];
571 kvm_cvt_df(&VCPU_FPR(vcpu
, reg_in2
), &ps0_in2
);
573 func(&vcpu
->arch
.fp
.fpscr
, &ps0_out
, &ps0_in1
, &ps0_in2
);
575 if (!(scalar
& SCALAR_NO_PS0
)) {
576 dprintk(KERN_INFO
"PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
577 ps0_in1
, ps0_in2
, ps0_out
);
579 kvm_cvt_fd(&ps0_out
, &VCPU_FPR(vcpu
, reg_out
));
583 ps1_in1
= qpr
[reg_in1
];
584 ps1_in2
= qpr
[reg_in2
];
586 if (scalar
& SCALAR_HIGH
)
589 func(&vcpu
->arch
.fp
.fpscr
, &ps1_out
, &ps1_in1
, &ps1_in2
);
591 if (!(scalar
& SCALAR_NO_PS1
)) {
592 qpr
[reg_out
] = ps1_out
;
594 dprintk(KERN_INFO
"PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n",
595 ps1_in1
, ps1_in2
, qpr
[reg_out
]);
601 static int kvmppc_ps_one_in(struct kvm_vcpu
*vcpu
, bool rc
,
602 int reg_out
, int reg_in
,
604 u32
*dst
, u32
*src1
))
606 u32
*qpr
= vcpu
->arch
.qpr
;
614 kvm_cvt_df(&VCPU_FPR(vcpu
, reg_in
), &ps0_in
);
615 func(&vcpu
->arch
.fp
.fpscr
, &ps0_out
, &ps0_in
);
617 dprintk(KERN_INFO
"PS1 ps0 -> f(0x%x) = 0x%x\n",
620 kvm_cvt_fd(&ps0_out
, &VCPU_FPR(vcpu
, reg_out
));
623 ps1_in
= qpr
[reg_in
];
624 func(&vcpu
->arch
.fp
.fpscr
, &qpr
[reg_out
], &ps1_in
);
626 dprintk(KERN_INFO
"PS1 ps1 -> f(0x%x) = 0x%x\n",
627 ps1_in
, qpr
[reg_out
]);
632 int kvmppc_emulate_paired_single(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
)
635 enum emulation_result emulated
= EMULATE_DONE
;
636 int ax_rd
, ax_ra
, ax_rb
, ax_rc
;
638 u64
*fpr_d
, *fpr_a
, *fpr_b
, *fpr_c
;
646 emulated
= kvmppc_get_last_inst(vcpu
, INST_GENERIC
, &inst
);
647 if (emulated
!= EMULATE_DONE
)
650 ax_rd
= inst_get_field(inst
, 6, 10);
651 ax_ra
= inst_get_field(inst
, 11, 15);
652 ax_rb
= inst_get_field(inst
, 16, 20);
653 ax_rc
= inst_get_field(inst
, 21, 25);
654 full_d
= inst_get_field(inst
, 16, 31);
656 fpr_d
= &VCPU_FPR(vcpu
, ax_rd
);
657 fpr_a
= &VCPU_FPR(vcpu
, ax_ra
);
658 fpr_b
= &VCPU_FPR(vcpu
, ax_rb
);
659 fpr_c
= &VCPU_FPR(vcpu
, ax_rc
);
661 rcomp
= (inst
& 1) ? true : false;
662 cr
= kvmppc_get_cr(vcpu
);
664 if (!kvmppc_inst_is_paired_single(vcpu
, inst
))
667 if (!(kvmppc_get_msr(vcpu
) & MSR_FP
)) {
668 kvmppc_book3s_queue_irqprio(vcpu
, BOOK3S_INTERRUPT_FP_UNAVAIL
);
669 return EMULATE_AGAIN
;
672 kvmppc_giveup_ext(vcpu
, MSR_FP
);
675 /* Do we need to clear FE0 / FE1 here? Don't think so. */
678 for (i
= 0; i
< ARRAY_SIZE(vcpu
->arch
.fp
.fpr
); i
++) {
680 kvm_cvt_df(&VCPU_FPR(vcpu
, i
), &f
);
681 dprintk(KERN_INFO
"FPR[%d] = 0x%x / 0x%llx QPR[%d] = 0x%x\n",
682 i
, f
, VCPU_FPR(vcpu
, i
), i
, vcpu
->arch
.qpr
[i
]);
686 switch (get_op(inst
)) {
689 ulong addr
= ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0;
690 bool w
= inst_get_field(inst
, 16, 16) ? true : false;
691 int i
= inst_get_field(inst
, 17, 19);
693 addr
+= get_d_signext(inst
);
694 emulated
= kvmppc_emulate_psq_load(run
, vcpu
, ax_rd
, addr
, w
, i
);
699 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
);
700 bool w
= inst_get_field(inst
, 16, 16) ? true : false;
701 int i
= inst_get_field(inst
, 17, 19);
703 addr
+= get_d_signext(inst
);
704 emulated
= kvmppc_emulate_psq_load(run
, vcpu
, ax_rd
, addr
, w
, i
);
706 if (emulated
== EMULATE_DONE
)
707 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
712 ulong addr
= ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0;
713 bool w
= inst_get_field(inst
, 16, 16) ? true : false;
714 int i
= inst_get_field(inst
, 17, 19);
716 addr
+= get_d_signext(inst
);
717 emulated
= kvmppc_emulate_psq_store(run
, vcpu
, ax_rd
, addr
, w
, i
);
722 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
);
723 bool w
= inst_get_field(inst
, 16, 16) ? true : false;
724 int i
= inst_get_field(inst
, 17, 19);
726 addr
+= get_d_signext(inst
);
727 emulated
= kvmppc_emulate_psq_store(run
, vcpu
, ax_rd
, addr
, w
, i
);
729 if (emulated
== EMULATE_DONE
)
730 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
735 switch (inst_get_field(inst
, 21, 30)) {
738 emulated
= EMULATE_FAIL
;
742 ulong addr
= ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0;
743 bool w
= inst_get_field(inst
, 21, 21) ? true : false;
744 int i
= inst_get_field(inst
, 22, 24);
746 addr
+= kvmppc_get_gpr(vcpu
, ax_rb
);
747 emulated
= kvmppc_emulate_psq_load(run
, vcpu
, ax_rd
, addr
, w
, i
);
752 emulated
= EMULATE_FAIL
;
756 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
);
757 bool w
= inst_get_field(inst
, 21, 21) ? true : false;
758 int i
= inst_get_field(inst
, 22, 24);
760 addr
+= kvmppc_get_gpr(vcpu
, ax_rb
);
761 emulated
= kvmppc_emulate_psq_load(run
, vcpu
, ax_rd
, addr
, w
, i
);
763 if (emulated
== EMULATE_DONE
)
764 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
768 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_rb
);
769 VCPU_FPR(vcpu
, ax_rd
) ^= 0x8000000000000000ULL
;
770 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rb
];
771 vcpu
->arch
.qpr
[ax_rd
] ^= 0x80000000;
775 emulated
= EMULATE_FAIL
;
779 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_rb
);
780 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rb
];
784 emulated
= EMULATE_FAIL
;
788 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_rb
);
789 VCPU_FPR(vcpu
, ax_rd
) |= 0x8000000000000000ULL
;
790 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rb
];
791 vcpu
->arch
.qpr
[ax_rd
] |= 0x80000000;
795 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_rb
);
796 VCPU_FPR(vcpu
, ax_rd
) &= ~0x8000000000000000ULL
;
797 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rb
];
798 vcpu
->arch
.qpr
[ax_rd
] &= ~0x80000000;
800 case OP_4X_PS_MERGE00
:
802 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_ra
);
803 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
804 kvm_cvt_df(&VCPU_FPR(vcpu
, ax_rb
),
805 &vcpu
->arch
.qpr
[ax_rd
]);
807 case OP_4X_PS_MERGE01
:
809 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_ra
);
810 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rb
];
812 case OP_4X_PS_MERGE10
:
814 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
815 kvm_cvt_fd(&vcpu
->arch
.qpr
[ax_ra
],
816 &VCPU_FPR(vcpu
, ax_rd
));
817 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
818 kvm_cvt_df(&VCPU_FPR(vcpu
, ax_rb
),
819 &vcpu
->arch
.qpr
[ax_rd
]);
821 case OP_4X_PS_MERGE11
:
823 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
824 kvm_cvt_fd(&vcpu
->arch
.qpr
[ax_ra
],
825 &VCPU_FPR(vcpu
, ax_rd
));
826 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rb
];
830 switch (inst_get_field(inst
, 25, 30)) {
833 ulong addr
= ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0;
834 bool w
= inst_get_field(inst
, 21, 21) ? true : false;
835 int i
= inst_get_field(inst
, 22, 24);
837 addr
+= kvmppc_get_gpr(vcpu
, ax_rb
);
838 emulated
= kvmppc_emulate_psq_store(run
, vcpu
, ax_rd
, addr
, w
, i
);
841 case OP_4XW_PSQ_STUX
:
843 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
);
844 bool w
= inst_get_field(inst
, 21, 21) ? true : false;
845 int i
= inst_get_field(inst
, 22, 24);
847 addr
+= kvmppc_get_gpr(vcpu
, ax_rb
);
848 emulated
= kvmppc_emulate_psq_store(run
, vcpu
, ax_rd
, addr
, w
, i
);
850 if (emulated
== EMULATE_DONE
)
851 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
856 switch (inst_get_field(inst
, 26, 30)) {
858 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
859 ax_rb
, ax_ra
, SCALAR_NO_PS0
| SCALAR_HIGH
, fps_fadds
);
860 VCPU_FPR(vcpu
, ax_rd
) = VCPU_FPR(vcpu
, ax_rc
);
863 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
864 ax_ra
, ax_rb
, SCALAR_NO_PS1
| SCALAR_LOW
, fps_fadds
);
865 vcpu
->arch
.qpr
[ax_rd
] = vcpu
->arch
.qpr
[ax_rc
];
868 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
869 ax_ra
, ax_rc
, SCALAR_HIGH
, fps_fmuls
);
872 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
873 ax_ra
, ax_rc
, SCALAR_LOW
, fps_fmuls
);
875 case OP_4A_PS_MADDS0
:
876 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
877 ax_ra
, ax_rc
, ax_rb
, SCALAR_HIGH
, fps_fmadds
);
879 case OP_4A_PS_MADDS1
:
880 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
881 ax_ra
, ax_rc
, ax_rb
, SCALAR_LOW
, fps_fmadds
);
884 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
885 ax_ra
, ax_rb
, SCALAR_NONE
, fps_fdivs
);
888 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
889 ax_ra
, ax_rb
, SCALAR_NONE
, fps_fsubs
);
892 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
893 ax_ra
, ax_rb
, SCALAR_NONE
, fps_fadds
);
896 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
897 ax_ra
, ax_rc
, ax_rb
, SCALAR_NONE
, fps_fsel
);
900 emulated
= kvmppc_ps_one_in(vcpu
, rcomp
, ax_rd
,
904 emulated
= kvmppc_ps_two_in(vcpu
, rcomp
, ax_rd
,
905 ax_ra
, ax_rc
, SCALAR_NONE
, fps_fmuls
);
907 case OP_4A_PS_RSQRTE
:
908 emulated
= kvmppc_ps_one_in(vcpu
, rcomp
, ax_rd
,
912 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
913 ax_ra
, ax_rc
, ax_rb
, SCALAR_NONE
, fps_fmsubs
);
916 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
917 ax_ra
, ax_rc
, ax_rb
, SCALAR_NONE
, fps_fmadds
);
920 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
921 ax_ra
, ax_rc
, ax_rb
, SCALAR_NONE
, fps_fnmsubs
);
924 emulated
= kvmppc_ps_three_in(vcpu
, rcomp
, ax_rd
,
925 ax_ra
, ax_rc
, ax_rb
, SCALAR_NONE
, fps_fnmadds
);
930 /* Real FPU operations */
934 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) + full_d
;
936 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
, addr
,
942 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) + full_d
;
944 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
, addr
,
947 if (emulated
== EMULATE_DONE
)
948 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
953 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) + full_d
;
955 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
, addr
,
961 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) + full_d
;
963 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
, addr
,
966 if (emulated
== EMULATE_DONE
)
967 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
972 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) + full_d
;
974 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
, addr
,
980 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) + full_d
;
982 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
, addr
,
985 if (emulated
== EMULATE_DONE
)
986 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
991 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) + full_d
;
993 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
, addr
,
999 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) + full_d
;
1001 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
, addr
,
1004 if (emulated
== EMULATE_DONE
)
1005 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
1009 switch (inst_get_field(inst
, 21, 30)) {
1012 ulong addr
= ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0;
1014 addr
+= kvmppc_get_gpr(vcpu
, ax_rb
);
1015 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
,
1016 addr
, FPU_LS_SINGLE
);
1021 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) +
1022 kvmppc_get_gpr(vcpu
, ax_rb
);
1024 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
,
1025 addr
, FPU_LS_SINGLE
);
1027 if (emulated
== EMULATE_DONE
)
1028 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
1033 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) +
1034 kvmppc_get_gpr(vcpu
, ax_rb
);
1036 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
,
1037 addr
, FPU_LS_DOUBLE
);
1042 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) +
1043 kvmppc_get_gpr(vcpu
, ax_rb
);
1045 emulated
= kvmppc_emulate_fpr_load(run
, vcpu
, ax_rd
,
1046 addr
, FPU_LS_DOUBLE
);
1048 if (emulated
== EMULATE_DONE
)
1049 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
1054 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) +
1055 kvmppc_get_gpr(vcpu
, ax_rb
);
1057 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
,
1058 addr
, FPU_LS_SINGLE
);
1063 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) +
1064 kvmppc_get_gpr(vcpu
, ax_rb
);
1066 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
,
1067 addr
, FPU_LS_SINGLE
);
1069 if (emulated
== EMULATE_DONE
)
1070 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
1075 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) +
1076 kvmppc_get_gpr(vcpu
, ax_rb
);
1078 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
,
1079 addr
, FPU_LS_DOUBLE
);
1084 ulong addr
= kvmppc_get_gpr(vcpu
, ax_ra
) +
1085 kvmppc_get_gpr(vcpu
, ax_rb
);
1087 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
,
1088 addr
, FPU_LS_DOUBLE
);
1090 if (emulated
== EMULATE_DONE
)
1091 kvmppc_set_gpr(vcpu
, ax_ra
, addr
);
1096 ulong addr
= (ax_ra
? kvmppc_get_gpr(vcpu
, ax_ra
) : 0) +
1097 kvmppc_get_gpr(vcpu
, ax_rb
);
1099 emulated
= kvmppc_emulate_fpr_store(run
, vcpu
, ax_rd
,
1108 switch (inst_get_field(inst
, 21, 30)) {
1110 fpd_fadds(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1111 kvmppc_sync_qpr(vcpu
, ax_rd
);
1114 fpd_fsubs(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1115 kvmppc_sync_qpr(vcpu
, ax_rd
);
1118 fpd_fdivs(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1119 kvmppc_sync_qpr(vcpu
, ax_rd
);
1122 fpd_fres(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1123 kvmppc_sync_qpr(vcpu
, ax_rd
);
1125 case OP_59_FRSQRTES
:
1126 fpd_frsqrtes(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1127 kvmppc_sync_qpr(vcpu
, ax_rd
);
1130 switch (inst_get_field(inst
, 26, 30)) {
1132 fpd_fmuls(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
);
1133 kvmppc_sync_qpr(vcpu
, ax_rd
);
1136 fpd_fmsubs(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1137 kvmppc_sync_qpr(vcpu
, ax_rd
);
1140 fpd_fmadds(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1141 kvmppc_sync_qpr(vcpu
, ax_rd
);
1144 fpd_fnmsubs(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1145 kvmppc_sync_qpr(vcpu
, ax_rd
);
1148 fpd_fnmadds(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1149 kvmppc_sync_qpr(vcpu
, ax_rd
);
1154 switch (inst_get_field(inst
, 21, 30)) {
1159 /* XXX need to implement */
1162 /* XXX missing CR */
1163 *fpr_d
= vcpu
->arch
.fp
.fpscr
;
1166 /* XXX missing fm bits */
1167 /* XXX missing CR */
1168 vcpu
->arch
.fp
.fpscr
= *fpr_b
;
1173 u32 cr0_mask
= 0xf0000000;
1174 u32 cr_shift
= inst_get_field(inst
, 6, 8) * 4;
1176 fpd_fcmpu(&vcpu
->arch
.fp
.fpscr
, &tmp_cr
, fpr_a
, fpr_b
);
1177 cr
&= ~(cr0_mask
>> cr_shift
);
1178 cr
|= (cr
& cr0_mask
) >> cr_shift
;
1184 u32 cr0_mask
= 0xf0000000;
1185 u32 cr_shift
= inst_get_field(inst
, 6, 8) * 4;
1187 fpd_fcmpo(&vcpu
->arch
.fp
.fpscr
, &tmp_cr
, fpr_a
, fpr_b
);
1188 cr
&= ~(cr0_mask
>> cr_shift
);
1189 cr
|= (cr
& cr0_mask
) >> cr_shift
;
1193 fpd_fneg(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1199 fpd_fabs(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1202 fpd_fcpsgn(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1205 fpd_fdiv(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1208 fpd_fadd(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1211 fpd_fsub(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_b
);
1214 fpd_fctiw(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1217 fpd_fctiwz(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1220 fpd_frsp(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1221 kvmppc_sync_qpr(vcpu
, ax_rd
);
1228 fpd_fsqrt(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_b
);
1229 /* fD = 1.0f / fD */
1230 fpd_fdiv(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, (u64
*)&one
, fpr_d
);
1234 switch (inst_get_field(inst
, 26, 30)) {
1236 fpd_fmul(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
);
1239 fpd_fsel(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1242 fpd_fmsub(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1245 fpd_fmadd(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1248 fpd_fnmsub(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1251 fpd_fnmadd(&vcpu
->arch
.fp
.fpscr
, &cr
, fpr_d
, fpr_a
, fpr_c
, fpr_b
);
1258 for (i
= 0; i
< ARRAY_SIZE(vcpu
->arch
.fp
.fpr
); i
++) {
1260 kvm_cvt_df(&VCPU_FPR(vcpu
, i
), &f
);
1261 dprintk(KERN_INFO
"FPR[%d] = 0x%x\n", i
, f
);
1266 kvmppc_set_cr(vcpu
, cr
);
1268 disable_kernel_fp();