gpio: of: Break out OF-only code
[linux/fpc-iii.git] / drivers / clocksource / em_sti.c
blob8e12b11e81b096b77c8bcc6c9eca0cc0a3c5c240
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Emma Mobile Timer Support - STI
5 * Copyright (C) 2012 Magnus Damm
6 */
8 #include <linux/init.h>
9 #include <linux/platform_device.h>
10 #include <linux/spinlock.h>
11 #include <linux/interrupt.h>
12 #include <linux/ioport.h>
13 #include <linux/io.h>
14 #include <linux/clk.h>
15 #include <linux/irq.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/clocksource.h>
19 #include <linux/clockchips.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
23 enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };
25 struct em_sti_priv {
26 void __iomem *base;
27 struct clk *clk;
28 struct platform_device *pdev;
29 unsigned int active[USER_NR];
30 unsigned long rate;
31 raw_spinlock_t lock;
32 struct clock_event_device ced;
33 struct clocksource cs;
36 #define STI_CONTROL 0x00
37 #define STI_COMPA_H 0x10
38 #define STI_COMPA_L 0x14
39 #define STI_COMPB_H 0x18
40 #define STI_COMPB_L 0x1c
41 #define STI_COUNT_H 0x20
42 #define STI_COUNT_L 0x24
43 #define STI_COUNT_RAW_H 0x28
44 #define STI_COUNT_RAW_L 0x2c
45 #define STI_SET_H 0x30
46 #define STI_SET_L 0x34
47 #define STI_INTSTATUS 0x40
48 #define STI_INTRAWSTATUS 0x44
49 #define STI_INTENSET 0x48
50 #define STI_INTENCLR 0x4c
51 #define STI_INTFFCLR 0x50
53 static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
55 return ioread32(p->base + offs);
58 static inline void em_sti_write(struct em_sti_priv *p, int offs,
59 unsigned long value)
61 iowrite32(value, p->base + offs);
64 static int em_sti_enable(struct em_sti_priv *p)
66 int ret;
68 /* enable clock */
69 ret = clk_enable(p->clk);
70 if (ret) {
71 dev_err(&p->pdev->dev, "cannot enable clock\n");
72 return ret;
75 /* reset the counter */
76 em_sti_write(p, STI_SET_H, 0x40000000);
77 em_sti_write(p, STI_SET_L, 0x00000000);
79 /* mask and clear pending interrupts */
80 em_sti_write(p, STI_INTENCLR, 3);
81 em_sti_write(p, STI_INTFFCLR, 3);
83 /* enable updates of counter registers */
84 em_sti_write(p, STI_CONTROL, 1);
86 return 0;
89 static void em_sti_disable(struct em_sti_priv *p)
91 /* mask interrupts */
92 em_sti_write(p, STI_INTENCLR, 3);
94 /* stop clock */
95 clk_disable(p->clk);
98 static u64 em_sti_count(struct em_sti_priv *p)
100 u64 ticks;
101 unsigned long flags;
103 /* the STI hardware buffers the 48-bit count, but to
104 * break it out into two 32-bit access the registers
105 * must be accessed in a certain order.
106 * Always read STI_COUNT_H before STI_COUNT_L.
108 raw_spin_lock_irqsave(&p->lock, flags);
109 ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
110 ticks |= em_sti_read(p, STI_COUNT_L);
111 raw_spin_unlock_irqrestore(&p->lock, flags);
113 return ticks;
116 static u64 em_sti_set_next(struct em_sti_priv *p, u64 next)
118 unsigned long flags;
120 raw_spin_lock_irqsave(&p->lock, flags);
122 /* mask compare A interrupt */
123 em_sti_write(p, STI_INTENCLR, 1);
125 /* update compare A value */
126 em_sti_write(p, STI_COMPA_H, next >> 32);
127 em_sti_write(p, STI_COMPA_L, next & 0xffffffff);
129 /* clear compare A interrupt source */
130 em_sti_write(p, STI_INTFFCLR, 1);
132 /* unmask compare A interrupt */
133 em_sti_write(p, STI_INTENSET, 1);
135 raw_spin_unlock_irqrestore(&p->lock, flags);
137 return next;
140 static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
142 struct em_sti_priv *p = dev_id;
144 p->ced.event_handler(&p->ced);
145 return IRQ_HANDLED;
148 static int em_sti_start(struct em_sti_priv *p, unsigned int user)
150 unsigned long flags;
151 int used_before;
152 int ret = 0;
154 raw_spin_lock_irqsave(&p->lock, flags);
155 used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
156 if (!used_before)
157 ret = em_sti_enable(p);
159 if (!ret)
160 p->active[user] = 1;
161 raw_spin_unlock_irqrestore(&p->lock, flags);
163 return ret;
166 static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
168 unsigned long flags;
169 int used_before, used_after;
171 raw_spin_lock_irqsave(&p->lock, flags);
172 used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
173 p->active[user] = 0;
174 used_after = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
176 if (used_before && !used_after)
177 em_sti_disable(p);
178 raw_spin_unlock_irqrestore(&p->lock, flags);
181 static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)
183 return container_of(cs, struct em_sti_priv, cs);
186 static u64 em_sti_clocksource_read(struct clocksource *cs)
188 return em_sti_count(cs_to_em_sti(cs));
191 static int em_sti_clocksource_enable(struct clocksource *cs)
193 struct em_sti_priv *p = cs_to_em_sti(cs);
195 return em_sti_start(p, USER_CLOCKSOURCE);
198 static void em_sti_clocksource_disable(struct clocksource *cs)
200 em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
203 static void em_sti_clocksource_resume(struct clocksource *cs)
205 em_sti_clocksource_enable(cs);
208 static int em_sti_register_clocksource(struct em_sti_priv *p)
210 struct clocksource *cs = &p->cs;
212 cs->name = dev_name(&p->pdev->dev);
213 cs->rating = 200;
214 cs->read = em_sti_clocksource_read;
215 cs->enable = em_sti_clocksource_enable;
216 cs->disable = em_sti_clocksource_disable;
217 cs->suspend = em_sti_clocksource_disable;
218 cs->resume = em_sti_clocksource_resume;
219 cs->mask = CLOCKSOURCE_MASK(48);
220 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
222 dev_info(&p->pdev->dev, "used as clock source\n");
224 clocksource_register_hz(cs, p->rate);
225 return 0;
228 static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)
230 return container_of(ced, struct em_sti_priv, ced);
233 static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
235 struct em_sti_priv *p = ced_to_em_sti(ced);
236 em_sti_stop(p, USER_CLOCKEVENT);
237 return 0;
240 static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
242 struct em_sti_priv *p = ced_to_em_sti(ced);
244 dev_info(&p->pdev->dev, "used for oneshot clock events\n");
245 em_sti_start(p, USER_CLOCKEVENT);
246 return 0;
249 static int em_sti_clock_event_next(unsigned long delta,
250 struct clock_event_device *ced)
252 struct em_sti_priv *p = ced_to_em_sti(ced);
253 u64 next;
254 int safe;
256 next = em_sti_set_next(p, em_sti_count(p) + delta);
257 safe = em_sti_count(p) < (next - 1);
259 return !safe;
262 static void em_sti_register_clockevent(struct em_sti_priv *p)
264 struct clock_event_device *ced = &p->ced;
266 ced->name = dev_name(&p->pdev->dev);
267 ced->features = CLOCK_EVT_FEAT_ONESHOT;
268 ced->rating = 200;
269 ced->cpumask = cpu_possible_mask;
270 ced->set_next_event = em_sti_clock_event_next;
271 ced->set_state_shutdown = em_sti_clock_event_shutdown;
272 ced->set_state_oneshot = em_sti_clock_event_set_oneshot;
274 dev_info(&p->pdev->dev, "used for clock events\n");
276 clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
279 static int em_sti_probe(struct platform_device *pdev)
281 struct em_sti_priv *p;
282 struct resource *res;
283 int irq;
284 int ret;
286 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
287 if (p == NULL)
288 return -ENOMEM;
290 p->pdev = pdev;
291 platform_set_drvdata(pdev, p);
293 irq = platform_get_irq(pdev, 0);
294 if (irq < 0) {
295 dev_err(&pdev->dev, "failed to get irq\n");
296 return irq;
299 /* map memory, let base point to the STI instance */
300 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
301 p->base = devm_ioremap_resource(&pdev->dev, res);
302 if (IS_ERR(p->base))
303 return PTR_ERR(p->base);
305 ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
306 IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
307 dev_name(&pdev->dev), p);
308 if (ret) {
309 dev_err(&pdev->dev, "failed to request low IRQ\n");
310 return ret;
313 /* get hold of clock */
314 p->clk = devm_clk_get(&pdev->dev, "sclk");
315 if (IS_ERR(p->clk)) {
316 dev_err(&pdev->dev, "cannot get clock\n");
317 return PTR_ERR(p->clk);
320 ret = clk_prepare(p->clk);
321 if (ret < 0) {
322 dev_err(&pdev->dev, "cannot prepare clock\n");
323 return ret;
326 ret = clk_enable(p->clk);
327 if (ret < 0) {
328 dev_err(&p->pdev->dev, "cannot enable clock\n");
329 clk_unprepare(p->clk);
330 return ret;
332 p->rate = clk_get_rate(p->clk);
333 clk_disable(p->clk);
335 raw_spin_lock_init(&p->lock);
336 em_sti_register_clockevent(p);
337 em_sti_register_clocksource(p);
338 return 0;
341 static int em_sti_remove(struct platform_device *pdev)
343 return -EBUSY; /* cannot unregister clockevent and clocksource */
346 static const struct of_device_id em_sti_dt_ids[] = {
347 { .compatible = "renesas,em-sti", },
350 MODULE_DEVICE_TABLE(of, em_sti_dt_ids);
352 static struct platform_driver em_sti_device_driver = {
353 .probe = em_sti_probe,
354 .remove = em_sti_remove,
355 .driver = {
356 .name = "em_sti",
357 .of_match_table = em_sti_dt_ids,
361 static int __init em_sti_init(void)
363 return platform_driver_register(&em_sti_device_driver);
366 static void __exit em_sti_exit(void)
368 platform_driver_unregister(&em_sti_device_driver);
371 subsys_initcall(em_sti_init);
372 module_exit(em_sti_exit);
374 MODULE_AUTHOR("Magnus Damm");
375 MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
376 MODULE_LICENSE("GPL v2");