x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / Documentation / ABI / testing / sysfs-class-iommu-intel-iommu
blob258cc246d98e66b51391d61831373e2af968b84b
1 What:           /sys/class/iommu/<iommu>/intel-iommu/address
2 Date:           June 2014
3 KernelVersion:  3.17
4 Contact:        Alex Williamson <alex.williamson@redhat.com>
5 Description:
6                 Physical address of the VT-d DRHD for this IOMMU.
7                 Format: %llx.  This allows association of a sysfs
8                 intel-iommu with a DMAR DRHD table entry.
10 What:           /sys/class/iommu/<iommu>/intel-iommu/cap
11 Date:           June 2014
12 KernelVersion:  3.17
13 Contact:        Alex Williamson <alex.williamson@redhat.com>
14 Description:
15                 The cached hardware capability register value
16                 of this DRHD unit.  Format: %llx.
18 What:           /sys/class/iommu/<iommu>/intel-iommu/ecap
19 Date:           June 2014
20 KernelVersion:  3.17
21 Contact:        Alex Williamson <alex.williamson@redhat.com>
22 Description:
23                 The cached hardware extended capability register
24                 value of this DRHD unit.  Format: %llx.
26 What:           /sys/class/iommu/<iommu>/intel-iommu/version
27 Date:           June 2014
28 KernelVersion:  3.17
29 Contact:        Alex Williamson <alex.williamson@redhat.com>
30 Description:
31                 The architecture version as reported from the
32                 VT-d VER_REG.  Format: %d:%d, major:minor