x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / am335x-baltos-ir3220.dts
blob19f53b8569e1c9411dc43b7639d61e080ec40438
1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 /*
10  * VScom OnRISC
11  * http://www.vscom.de
12  */
14 /dts-v1/;
16 #include "am335x-baltos.dtsi"
18 / {
19         model = "OnRISC Baltos iR 3220";
22 &am33xx_pinmux {
23         tca6416_pins: pinmux_tca6416_pins {
24                 pinctrl-single,pins = <
25                         AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
26                 >;
27         };
29         uart1_pins: pinmux_uart1_pins {
30                 pinctrl-single,pins = <
31                         AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)      /* uart1_rxd */
32                         AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0)      /* uart1_txd */
33                         AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* uart1_ctsn */
34                         AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* uart1_rtsn */
35                         AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
36                         AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
37                         AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
38                         AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
39                 >;
40         };
42         uart2_pins: pinmux_uart2_pins {
43                 pinctrl-single,pins = <
44                         AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
45                         AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
46                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE2)      /* i2c0_sda.uart2_ctsn_mux0 */
47                         AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)      /* i2c0_scl.uart2_rtsn_mux0 */
48                         AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
49                         AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
50                         AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
51                         AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
53                         AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
54                 >;
55         };
58 &uart1 {
59         pinctrl-names = "default";
60         pinctrl-0 = <&uart1_pins>;
61         dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
62         dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
63         dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
64         rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
66         status = "okay";
69 &uart2 {
70         pinctrl-names = "default";
71         pinctrl-0 = <&uart2_pins>;
72         dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
73         dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
74         dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
75         rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
77         status = "okay";
80 &i2c1 {
81         tca6416: gpio@20 {
82                 compatible = "ti,tca6416";
83                 reg = <0x20>;
84                 gpio-controller;
85                 #gpio-cells = <2>;
86                 interrupt-parent = <&gpio0>;
87                 interrupts = <20 GPIO_ACTIVE_LOW>;
88                 pinctrl-names = "default";
89                 pinctrl-0 = <&tca6416_pins>;
90         };
93 &usb0_phy {
94         status = "okay";
97 &usb0 {
98         status = "okay";
99         dr_mode = "host";
102 &cpsw_emac0 {
103         phy-mode = "rmii";
104         dual_emac_res_vlan = <1>;
105         fixed-link {
106                 speed = <100>;
107                 full-duplex;
108         };
111 &cpsw_emac1 {
112         phy-mode = "rgmii-txid";
113         dual_emac_res_vlan = <2>;
114         phy-handle = <&phy1>;
117 &phy_sel {
118         rmii-clock-ext = <1>;