x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / am335x-baltos-ir5221.dts
blob2b9d7f4db23f0fa44c14e867f197db5034ae9261
1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 /*
10  * VScom OnRISC
11  * http://www.vscom.de
12  */
14 /dts-v1/;
16 #include "am335x-baltos.dtsi"
18 / {
19         model = "OnRISC Baltos iR 5221";
22 &am33xx_pinmux {
23         tca6416_pins: pinmux_tca6416_pins {
24                 pinctrl-single,pins = <
25                         AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
26                 >;
27         };
30         dcan1_pins: pinmux_dcan1_pins {
31                 pinctrl-single,pins = <
32                         AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2)      /* uart0_ctsn.dcan1_tx_mux0 */
33                         AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE2)      /* uart0_rtsn.dcan1_rx_mux0 */
34                 >;
35         };
37         uart1_pins: pinmux_uart1_pins {
38                 pinctrl-single,pins = <
39                         AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)      /* uart1_rxd */
40                         AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0)      /* uart1_txd */
41                         AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* uart1_ctsn */
42                         AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* uart1_rtsn */
43                         AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
44                         AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
45                         AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
46                         AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
47                 >;
48         };
50         uart2_pins: pinmux_uart2_pins {
51                 pinctrl-single,pins = <
52                         AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
53                         AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
54                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE2)      /* i2c0_sda.uart2_ctsn_mux0 */
55                         AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)      /* i2c0_scl.uart2_rtsn_mux0 */
56                         AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
57                         AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
58                         AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
59                         AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
61                         AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
62                 >;
63         };
67 &uart1 {
68         pinctrl-names = "default";
69         pinctrl-0 = <&uart1_pins>;
70         dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
71         dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
72         dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
73         rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
75         status = "okay";
78 &uart2 {
79         pinctrl-names = "default";
80         pinctrl-0 = <&uart2_pins>;
81         dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
82         dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
83         dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
84         rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
86         status = "okay";
89 &i2c1 {
90         tca6416: gpio@20 {
91                 compatible = "ti,tca6416";
92                 reg = <0x20>;
93                 gpio-controller;
94                 #gpio-cells = <2>;
95                 interrupt-parent = <&gpio0>;
96                 interrupts = <20 GPIO_ACTIVE_LOW>;
97                 pinctrl-names = "default";
98                 pinctrl-0 = <&tca6416_pins>;
99         };
102 &usb0_phy {
103         status = "okay";
106 &usb1_phy {
107         status = "okay";
110 &usb0 {
111         status = "okay";
112         dr_mode = "host";
115 &usb1 {
116         status = "okay";
117         dr_mode = "host";
120 &cpsw_emac0 {
121         phy-mode = "rmii";
122         dual_emac_res_vlan = <1>;
123         fixed-link {
124                 speed = <100>;
125                 full-duplex;
126         };
129 &cpsw_emac1 {
130         phy-mode = "rgmii-txid";
131         dual_emac_res_vlan = <2>;
132         phy-handle = <&phy1>;
135 &phy_sel {
136         rmii-clock-ext = <1>;
139 &dcan1 {
140         pinctrl-names = "default";
141         pinctrl-0 = <&dcan1_pins>;
143         status = "okay";