2 * Device Tree file for Marvell Armada 390 Development Board
5 * Copyright (C) 2016 Marvell
7 * Grzegorz Jaszczyk <jaz@semihalf.com>
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
14 * a) This file is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of the
17 * License, or (at your option) any later version.
19 * This file is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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49 #include "armada-390.dtsi"
52 model = "Marvell Armada 390 Development Board";
53 compatible = "marvell,a390-db", "marvell,armada390";
56 stdout-path = "serial0:115200n8";
60 device_type = "memory";
61 reg = <0x00000000 0x80000000>; /* 2 GB */
65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
66 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
71 clock-frequency = <100000>;
74 compatible = "atmel,24c64";
91 pinctrl-0 = <&nand_pins>;
92 pinctrl-names = "default";
94 marvell,nand-keep-config;
95 marvell,nand-enable-arbiter;
97 nand-ecc-strength = <8>;
98 nand-ecc-step-size = <512>;
101 compatible = "fixed-partitions";
102 #address-cells = <1>;
111 reg = <0x800000 0x800000>;
114 label = "Filesystem";
115 reg = <0x1000000 0x3f000000>;
149 pinctrl-0 = <&spi1_pins>;
150 pinctrl-names = "default";
153 #address-cells = <1>;
155 compatible = "n25q128a13",
157 reg = <0>; /* Chip select 0 */
158 spi-max-frequency = <108000000>;
161 compatible = "fixed-partitions";
162 #address-cells = <1>;
170 label = "Filesystem";
171 reg = <0x400000 0xc00000>;