arch/arm/boot/dts/armada-xp-synology-ds414.dts

   1 /*
   2  * Device Tree file for Synology DS414
   3  *
   4  * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  *
  44  * Note: this Device Tree assumes that the bootloader has remapped the
  45  * internal registers to 0xf1000000 (instead of the old 0xd0000000).
  46  * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
  47  * bootloaders provided by Marvell. It is used in recent versions of
  48  * DSM software provided by Synology. Nonetheless, some earlier boards
  49  * were delivered with an older version of u-boot that left internal
  50  * registers mapped at 0xd0000000. If you have such a device you will
  51  * not be able to directly boot a kernel based on this Device Tree. In
  52  * that case, the preferred solution is to update your bootloader (e.g.
  53  * by upgrading to latest version of DSM, or building a new one and
  54  * installing it from u-boot prompt) or adjust the Devive Tree
  55  * (s/0xf1000000/0xd0000000/ in 'ranges' below).
  56  */
  57
  58 /dts-v1/;
  59
  60 #include <dt-bindings/input/input.h>
  61 #include <dt-bindings/gpio/gpio.h>
  62 #include "armada-xp-mv78230.dtsi"
  63
  64 / {
  65         model = "Synology DS414";
  66         compatible = "synology,ds414", "marvell,armadaxp-mv78230",
  67                      "marvell,armadaxp", "marvell,armada-370-xp";
  68
  69         chosen {
  70                 stdout-path = "serial0:115200n8";
  71         };
  72
  73         memory@0 {
  74                 device_type = "memory";
  75                 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
  76         };
  77
  78         soc {
  79                 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
  80                           MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
  81                           MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
  82                           MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
  83
  84                 internal-regs {
  85
  86                         /* RTC is provided by Seiko S-35390A below */
  87                         rtc@10300 {
  88                                 status = "disabled";
  89                         };
  90
  91                         i2c@11000 {
  92                                 clock-frequency = <400000>;
  93                                 status = "okay";
  94
  95                                 s35390a: s35390a@30 {
  96                                          compatible = "sii,s35390a";
  97                                          reg = <0x30>;
  98                                 };
  99                         };
 100
 101                         /* Connected to a header on device's PCB. This
 102                          * provides the main console for the device.
 103                          *
 104                          * Warning: the device may not boot with a 3.3V
 105                          * USB-serial converter connected when the power
 106                          * button is pressed. The converter needs to be
 107                          * connected a few seconds after pressing the
 108                          * power button. This is possibly due to UART0_TXD
 109                          * pin being sampled at reset (bit 0 of SAR).
 110                          */
 111                         serial@12000 {
 112                                 status = "okay";
 113                         };
 114
 115                         /* Connected to a Microchip PIC16F883 for power control */
 116                         serial@12100 {
 117                                 status = "okay";
 118                         };
 119
 120                         poweroff@12100 {
 121                                 compatible = "synology,power-off";
 122                                 reg = <0x12100 0x100>;
 123                                 clocks = <&coreclk 0>;
 124                         };
 125
 126                         /* Front USB 2.0 port */
 127                         usb@50000 {
 128                                 status = "okay";
 129                         };
 130
 131                         ethernet@70000 {
 132                                 status = "okay";
 133                                 pinctrl-0 = <&ge0_rgmii_pins>;
 134                                 pinctrl-names = "default";
 135                                 phy = <&phy1>;
 136                                 phy-mode = "rgmii-id";
 137                         };
 138
 139                         ethernet@74000 {
 140                                 pinctrl-0 = <&ge1_rgmii_pins>;
 141                                 pinctrl-names = "default";
 142                                 status = "okay";
 143                                 phy = <&phy0>;
 144                                 phy-mode = "rgmii-id";
 145                         };
 146                 };
 147         };
 148
 149         regulators {
 150                 compatible = "simple-bus";
 151                 #address-cells = <1>;
 152                 #size-cells = <0>;
 153                 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
 154                              &sata3_pwr_pin &sata4_pwr_pin>;
 155                 pinctrl-names = "default";
 156
 157                 sata1_regulator: sata1-regulator@1 {
 158                         compatible = "regulator-fixed";
 159                         reg = <1>;
 160                         regulator-name = "SATA1 Power";
 161                         regulator-min-microvolt = <5000000>;
 162                         regulator-max-microvolt = <5000000>;
 163                         startup-delay-us = <2000000>;
 164                         enable-active-high;
 165                         regulator-always-on;
 166                         regulator-boot-on;
 167                         gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
 168                 };
 169
 170                 sata2_regulator: sata2-regulator@2 {
 171                         compatible = "regulator-fixed";
 172                         reg = <2>;
 173                         regulator-name = "SATA2 Power";
 174                         regulator-min-microvolt = <5000000>;
 175                         regulator-max-microvolt = <5000000>;
 176                         startup-delay-us = <4000000>;
 177                         enable-active-high;
 178                         regulator-always-on;
 179                         regulator-boot-on;
 180                         gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
 181                 };
 182
 183                 sata3_regulator: sata3-regulator@3 {
 184                         compatible = "regulator-fixed";
 185                         reg = <3>;
 186                         regulator-name = "SATA3 Power";
 187                         regulator-min-microvolt = <5000000>;
 188                         regulator-max-microvolt = <5000000>;
 189                         startup-delay-us = <6000000>;
 190                         enable-active-high;
 191                         regulator-always-on;
 192                         regulator-boot-on;
 193                         gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 194                 };
 195
 196                 sata4_regulator: sata4-regulator@4 {
 197                         compatible = "regulator-fixed";
 198                         reg = <4>;
 199                         regulator-name = "SATA4 Power";
 200                         regulator-min-microvolt = <5000000>;
 201                         regulator-max-microvolt = <5000000>;
 202                         startup-delay-us = <8000000>;
 203                         enable-active-high;
 204                         regulator-always-on;
 205                         regulator-boot-on;
 206                         gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
 207                 };
 208         };
 209 };
 210
 211 &pciec {
 212         status = "okay";
 213
 214         /*
 215          * Connected to Marvell 88SX7042 SATA-II controller
 216          * handling the four disks.
 217          */
 218         pcie@1,0 {
 219                 /* Port 0, Lane 0 */
 220                 status = "okay";
 221         };
 222
 223         /*
 224          * Connected to EtronTech EJ168A XHCI controller
 225          * providing the two rear USB 3.0 ports.
 226          */
 227         pcie@5,0 {
 228                 /* Port 1, Lane 0 */
 229                 status = "okay";
 230         };
 231 };
 232
 233
 234 &mdio {
 235         phy0: ethernet-phy@0 { /* Marvell 88E1512 */
 236                 reg = <0>;
 237         };
 238
 239         phy1: ethernet-phy@1 { /* Marvell 88E1512 */
 240                 reg = <1>;
 241         };
 242 };
 243
 244 &pinctrl {
 245         sata1_pwr_pin: sata1-pwr-pin {
 246                 marvell,pins = "mpp42";
 247                 marvell,function = "gpio";
 248         };
 249
 250         sata2_pwr_pin: sata2-pwr-pin {
 251                 marvell,pins = "mpp44";
 252                 marvell,function = "gpio";
 253         };
 254
 255         sata3_pwr_pin: sata3-pwr-pin {
 256                 marvell,pins = "mpp45";
 257                 marvell,function = "gpio";
 258         };
 259
 260         sata4_pwr_pin: sata4-pwr-pin {
 261                 marvell,pins = "mpp46";
 262                 marvell,function = "gpio";
 263         };
 264
 265         sata1_pres_pin: sata1-pres-pin {
 266                 marvell,pins = "mpp34";
 267                 marvell,function = "gpio";
 268         };
 269
 270         sata2_pres_pin: sata2-pres-pin {
 271                 marvell,pins = "mpp35";
 272                 marvell,function = "gpio";
 273         };
 274
 275         sata3_pres_pin: sata3-pres-pin {
 276                 marvell,pins = "mpp40";
 277                 marvell,function = "gpio";
 278         };
 279
 280         sata4_pres_pin: sata4-pres-pin {
 281                 marvell,pins = "mpp41";
 282                 marvell,function = "gpio";
 283         };
 284
 285         syno_id_bit0_pin: syno-id-bit0-pin {
 286                 marvell,pins = "mpp26";
 287                 marvell,function = "gpio";
 288         };
 289
 290         syno_id_bit1_pin: syno-id-bit1-pin {
 291                 marvell,pins = "mpp28";
 292                 marvell,function = "gpio";
 293         };
 294
 295         syno_id_bit2_pin: syno-id-bit2-pin {
 296                 marvell,pins = "mpp29";
 297                 marvell,function = "gpio";
 298         };
 299
 300         fan1_alarm_pin: fan1-alarm-pin {
 301                 marvell,pins = "mpp33";
 302                 marvell,function = "gpio";
 303         };
 304
 305         fan2_alarm_pin: fan2-alarm-pin {
 306                 marvell,pins = "mpp32";
 307                 marvell,function = "gpio";
 308         };
 309 };
 310
 311 &spi0 {
 312         status = "okay";
 313
 314         spi-flash@0 {
 315                 #address-cells = <1>;
 316                 #size-cells = <1>;
 317                 compatible = "micron,n25q064", "jedec,spi-nor";
 318                 reg = <0>; /* Chip select 0 */
 319                 spi-max-frequency = <20000000>;
 320
 321                 /*
 322                  * Warning!
 323                  *
 324                  * Synology u-boot uses its compiled-in environment
 325                  * and it seems Synology did not care to change u-boot
 326                  * default configuration in order to allow saving a
 327                  * modified environment at a sensible location. So,
 328                  * if you do a 'saveenv' under u-boot, your modified
 329                  * environment will be saved at 1MB after the start
 330                  * of the flash, i.e. in the middle of the uImage.
 331                  * For that reason, it is strongly advised not to
 332                  * change the default environment, unless you know
 333                  * what you are doing.
 334                  */
 335                 partition@00000000 { /* u-boot */
 336                         label = "RedBoot";
 337                         reg = <0x00000000 0x000d0000>; /* 832KB */
 338                 };
 339
 340                 partition@000c0000 { /* uImage */
 341                         label = "zImage";
 342                         reg = <0x000d0000 0x002d0000>; /* 2880KB */
 343                 };
 344
 345                 partition@003a0000 { /* uInitramfs */
 346                         label = "rd.gz";
 347                         reg = <0x003a0000 0x00430000>; /* 4250KB */
 348                 };
 349
 350                 partition@007d0000 { /* MAC address and serial number */
 351                         label = "vendor";
 352                         reg = <0x007d0000 0x00010000>; /* 64KB */
 353                 };
 354
 355                 partition@007e0000 {
 356                         label = "RedBoot config";
 357                         reg = <0x007e0000 0x00010000>; /* 64KB */
 358                 };
 359
 360                 partition@007f0000 {
 361                         label = "FIS directory";
 362                         reg = <0x007f0000 0x00010000>; /* 64KB */
 363                 };
 364         };
 365 };