1 #include "skeleton.dtsi"
5 compatible = "aspeed,ast2500";
8 interrupt-parent = <&vic>;
15 compatible = "arm,arm1176jzf-s";
22 compatible = "simple-bus";
27 vic: interrupt-controller@1e6c0080 {
28 compatible = "aspeed,ast2400-vic";
30 #interrupt-cells = <1>;
31 valid-sources = <0xfefff7ff 0x0807ffff>;
32 reg = <0x1e6c0080 0x80>;
35 mac0: ethernet@1e660000 {
36 compatible = "faraday,ftgmac100";
37 reg = <0x1e660000 0x180>;
43 mac1: ethernet@1e680000 {
44 compatible = "faraday,ftgmac100";
45 reg = <0x1e680000 0x180>;
52 compatible = "simple-bus";
57 clk_clkin: clk_clkin@1e6e2070 {
59 compatible = "aspeed,g5-clkin-clock";
60 reg = <0x1e6e2070 0x04>;
63 syscon: syscon@1e6e2000 {
64 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
65 reg = <0x1e6e2000 0x1a8>;
68 compatible = "aspeed,g5-pinctrl";
69 aspeed,external-nodes = <&gfx &lhc>;
71 pinctrl_acpi_default: acpi_default {
76 pinctrl_adc0_default: adc0_default {
81 pinctrl_adc1_default: adc1_default {
86 pinctrl_adc10_default: adc10_default {
91 pinctrl_adc11_default: adc11_default {
96 pinctrl_adc12_default: adc12_default {
101 pinctrl_adc13_default: adc13_default {
106 pinctrl_adc14_default: adc14_default {
111 pinctrl_adc15_default: adc15_default {
116 pinctrl_adc2_default: adc2_default {
121 pinctrl_adc3_default: adc3_default {
126 pinctrl_adc4_default: adc4_default {
131 pinctrl_adc5_default: adc5_default {
136 pinctrl_adc6_default: adc6_default {
141 pinctrl_adc7_default: adc7_default {
146 pinctrl_adc8_default: adc8_default {
151 pinctrl_adc9_default: adc9_default {
156 pinctrl_bmcint_default: bmcint_default {
161 pinctrl_ddcclk_default: ddcclk_default {
166 pinctrl_ddcdat_default: ddcdat_default {
171 pinctrl_espi_default: espi_default {
176 pinctrl_fwspics1_default: fwspics1_default {
177 function = "FWSPICS1";
181 pinctrl_fwspics2_default: fwspics2_default {
182 function = "FWSPICS2";
186 pinctrl_gpid0_default: gpid0_default {
191 pinctrl_gpid2_default: gpid2_default {
196 pinctrl_gpid4_default: gpid4_default {
201 pinctrl_gpid6_default: gpid6_default {
206 pinctrl_gpie0_default: gpie0_default {
211 pinctrl_gpie2_default: gpie2_default {
216 pinctrl_gpie4_default: gpie4_default {
221 pinctrl_gpie6_default: gpie6_default {
226 pinctrl_i2c10_default: i2c10_default {
231 pinctrl_i2c11_default: i2c11_default {
236 pinctrl_i2c12_default: i2c12_default {
241 pinctrl_i2c13_default: i2c13_default {
246 pinctrl_i2c14_default: i2c14_default {
251 pinctrl_i2c3_default: i2c3_default {
256 pinctrl_i2c4_default: i2c4_default {
261 pinctrl_i2c5_default: i2c5_default {
266 pinctrl_i2c6_default: i2c6_default {
271 pinctrl_i2c7_default: i2c7_default {
276 pinctrl_i2c8_default: i2c8_default {
281 pinctrl_i2c9_default: i2c9_default {
286 pinctrl_lad0_default: lad0_default {
291 pinctrl_lad1_default: lad1_default {
296 pinctrl_lad2_default: lad2_default {
301 pinctrl_lad3_default: lad3_default {
306 pinctrl_lclk_default: lclk_default {
311 pinctrl_lframe_default: lframe_default {
316 pinctrl_lpchc_default: lpchc_default {
321 pinctrl_lpcpd_default: lpcpd_default {
326 pinctrl_lpcplus_default: lpcplus_default {
327 function = "LPCPLUS";
331 pinctrl_lpcpme_default: lpcpme_default {
336 pinctrl_lpcrst_default: lpcrst_default {
341 pinctrl_lpcsmi_default: lpcsmi_default {
346 pinctrl_lsirq_default: lsirq_default {
351 pinctrl_mac1link_default: mac1link_default {
352 function = "MAC1LINK";
356 pinctrl_mac2link_default: mac2link_default {
357 function = "MAC2LINK";
361 pinctrl_mdio1_default: mdio1_default {
366 pinctrl_mdio2_default: mdio2_default {
371 pinctrl_ncts1_default: ncts1_default {
376 pinctrl_ncts2_default: ncts2_default {
381 pinctrl_ncts3_default: ncts3_default {
386 pinctrl_ncts4_default: ncts4_default {
391 pinctrl_ndcd1_default: ndcd1_default {
396 pinctrl_ndcd2_default: ndcd2_default {
401 pinctrl_ndcd3_default: ndcd3_default {
406 pinctrl_ndcd4_default: ndcd4_default {
411 pinctrl_ndsr1_default: ndsr1_default {
416 pinctrl_ndsr2_default: ndsr2_default {
421 pinctrl_ndsr3_default: ndsr3_default {
426 pinctrl_ndsr4_default: ndsr4_default {
431 pinctrl_ndtr1_default: ndtr1_default {
436 pinctrl_ndtr2_default: ndtr2_default {
441 pinctrl_ndtr3_default: ndtr3_default {
446 pinctrl_ndtr4_default: ndtr4_default {
451 pinctrl_nri1_default: nri1_default {
456 pinctrl_nri2_default: nri2_default {
461 pinctrl_nri3_default: nri3_default {
466 pinctrl_nri4_default: nri4_default {
471 pinctrl_nrts1_default: nrts1_default {
476 pinctrl_nrts2_default: nrts2_default {
481 pinctrl_nrts3_default: nrts3_default {
486 pinctrl_nrts4_default: nrts4_default {
491 pinctrl_oscclk_default: oscclk_default {
496 pinctrl_pewake_default: pewake_default {
501 pinctrl_pnor_default: pnor_default {
506 pinctrl_pwm0_default: pwm0_default {
511 pinctrl_pwm1_default: pwm1_default {
516 pinctrl_pwm2_default: pwm2_default {
521 pinctrl_pwm3_default: pwm3_default {
526 pinctrl_pwm4_default: pwm4_default {
531 pinctrl_pwm5_default: pwm5_default {
536 pinctrl_pwm6_default: pwm6_default {
541 pinctrl_pwm7_default: pwm7_default {
546 pinctrl_rgmii1_default: rgmii1_default {
551 pinctrl_rgmii2_default: rgmii2_default {
556 pinctrl_rmii1_default: rmii1_default {
561 pinctrl_rmii2_default: rmii2_default {
566 pinctrl_rxd1_default: rxd1_default {
571 pinctrl_rxd2_default: rxd2_default {
576 pinctrl_rxd3_default: rxd3_default {
581 pinctrl_rxd4_default: rxd4_default {
586 pinctrl_salt1_default: salt1_default {
591 pinctrl_salt10_default: salt10_default {
596 pinctrl_salt11_default: salt11_default {
601 pinctrl_salt12_default: salt12_default {
606 pinctrl_salt13_default: salt13_default {
611 pinctrl_salt14_default: salt14_default {
616 pinctrl_salt2_default: salt2_default {
621 pinctrl_salt3_default: salt3_default {
626 pinctrl_salt4_default: salt4_default {
631 pinctrl_salt5_default: salt5_default {
636 pinctrl_salt6_default: salt6_default {
641 pinctrl_salt7_default: salt7_default {
646 pinctrl_salt8_default: salt8_default {
651 pinctrl_salt9_default: salt9_default {
656 pinctrl_scl1_default: scl1_default {
661 pinctrl_scl2_default: scl2_default {
666 pinctrl_sd1_default: sd1_default {
671 pinctrl_sd2_default: sd2_default {
676 pinctrl_sda1_default: sda1_default {
681 pinctrl_sda2_default: sda2_default {
686 pinctrl_sgps1_default: sgps1_default {
691 pinctrl_sgps2_default: sgps2_default {
696 pinctrl_sioonctrl_default: sioonctrl_default {
697 function = "SIOONCTRL";
698 groups = "SIOONCTRL";
701 pinctrl_siopbi_default: siopbi_default {
706 pinctrl_siopbo_default: siopbo_default {
711 pinctrl_siopwreq_default: siopwreq_default {
712 function = "SIOPWREQ";
716 pinctrl_siopwrgd_default: siopwrgd_default {
717 function = "SIOPWRGD";
721 pinctrl_sios3_default: sios3_default {
726 pinctrl_sios5_default: sios5_default {
731 pinctrl_siosci_default: siosci_default {
736 pinctrl_spi1_default: spi1_default {
741 pinctrl_spi1cs1_default: spi1cs1_default {
742 function = "SPI1CS1";
746 pinctrl_spi1debug_default: spi1debug_default {
747 function = "SPI1DEBUG";
748 groups = "SPI1DEBUG";
751 pinctrl_spi1passthru_default: spi1passthru_default {
752 function = "SPI1PASSTHRU";
753 groups = "SPI1PASSTHRU";
756 pinctrl_spi2ck_default: spi2ck_default {
761 pinctrl_spi2cs0_default: spi2cs0_default {
762 function = "SPI2CS0";
766 pinctrl_spi2cs1_default: spi2cs1_default {
767 function = "SPI2CS1";
771 pinctrl_spi2miso_default: spi2miso_default {
772 function = "SPI2MISO";
776 pinctrl_spi2mosi_default: spi2mosi_default {
777 function = "SPI2MOSI";
781 pinctrl_timer3_default: timer3_default {
786 pinctrl_timer4_default: timer4_default {
791 pinctrl_timer5_default: timer5_default {
796 pinctrl_timer6_default: timer6_default {
801 pinctrl_timer7_default: timer7_default {
806 pinctrl_timer8_default: timer8_default {
811 pinctrl_txd1_default: txd1_default {
816 pinctrl_txd2_default: txd2_default {
821 pinctrl_txd3_default: txd3_default {
826 pinctrl_txd4_default: txd4_default {
831 pinctrl_uart6_default: uart6_default {
836 pinctrl_usbcki_default: usbcki_default {
841 pinctrl_vgabiosrom_default: vgabiosrom_default {
842 function = "VGABIOSROM";
843 groups = "VGABIOSROM";
846 pinctrl_vgahs_default: vgahs_default {
851 pinctrl_vgavs_default: vgavs_default {
856 pinctrl_vpi24_default: vpi24_default {
861 pinctrl_vpo_default: vpo_default {
866 pinctrl_wdtrst1_default: wdtrst1_default {
867 function = "WDTRST1";
871 pinctrl_wdtrst2_default: wdtrst2_default {
872 function = "WDTRST2";
879 clk_hpll: clk_hpll@1e6e2024 {
881 compatible = "aspeed,g5-hpll-clock";
882 reg = <0x1e6e2024 0x4>;
883 clocks = <&clk_clkin>;
886 clk_ahb: clk_ahb@1e6e2070 {
888 compatible = "aspeed,g5-ahb-clock";
889 reg = <0x1e6e2070 0x4>;
890 clocks = <&clk_hpll>;
893 clk_apb: clk_apb@1e6e2008 {
895 compatible = "aspeed,g5-apb-clock";
896 reg = <0x1e6e2008 0x4>;
897 clocks = <&clk_hpll>;
900 clk_uart: clk_uart@1e6e2008 {
902 compatible = "aspeed,uart-clock";
903 reg = <0x1e6e202c 0x4>;
906 gfx: display@1e6e6000 {
907 compatible = "aspeed,ast2500-gfx", "syscon";
908 reg = <0x1e6e6000 0x1000>;
913 compatible = "mmio-sram";
914 reg = <0x1e720000 0x9000>; // 36K
917 gpio: gpio@1e780000 {
920 compatible = "aspeed,ast2500-gpio";
921 reg = <0x1e780000 0x1000>;
923 gpio-ranges = <&pinctrl 0 0 220>;
924 interrupt-controller;
927 timer: timer@1e782000 {
928 compatible = "aspeed,ast2400-timer";
929 reg = <0x1e782000 0x90>;
930 // The moxart_timer driver registers only one
931 // interrupt and assumes it's for timer 1
932 //interrupts = <16 17 18 35 36 37 38 39>;
939 compatible = "aspeed,wdt";
940 reg = <0x1e785000 0x1c>;
945 compatible = "aspeed,wdt";
946 reg = <0x1e785020 0x1c>;
952 compatible = "aspeed,wdt";
953 reg = <0x1e785074 0x1c>;
957 uart1: serial@1e783000 {
958 compatible = "ns16550a";
959 reg = <0x1e783000 0x1000>;
962 clocks = <&clk_uart>;
968 compatible = "aspeed,ast2500-lpc", "simple-mfd";
969 reg = <0x1e789000 0x1000>;
971 #address-cells = <1>;
973 ranges = <0 0x1e789000 0x1000>;
976 compatible = "aspeed,ast2500-lpc-bmc";
980 lpc_host: lpc-host@80 {
981 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
984 #address-cells = <1>;
986 ranges = <0 0x80 0x1e0>;
991 compatible = "aspeed,ast2500-lhc";
992 reg = <0x20 0x24 0x48 0x8>;
997 uart2: serial@1e78d000 {
998 compatible = "ns16550a";
999 reg = <0x1e78d000 0x1000>;
1002 clocks = <&clk_uart>;
1004 status = "disabled";
1007 uart3: serial@1e78e000 {
1008 compatible = "ns16550a";
1009 reg = <0x1e78e000 0x1000>;
1012 clocks = <&clk_uart>;
1014 status = "disabled";
1017 uart4: serial@1e78f000 {
1018 compatible = "ns16550a";
1019 reg = <0x1e78f000 0x1000>;
1022 clocks = <&clk_uart>;
1024 status = "disabled";
1027 uart5: serial@1e784000 {
1028 compatible = "ns16550a";
1029 reg = <0x1e784000 0x1000>;
1032 clocks = <&clk_uart>;
1033 current-speed = <38400>;
1035 status = "disabled";
1038 uart6: serial@1e787000 {
1039 compatible = "ns16550a";
1040 reg = <0x1e787000 0x1000>;
1043 clocks = <&clk_uart>;
1045 status = "disabled";