2 * Samsung's Exynos54xx SoC series common device tree source
4 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2016 Krzysztof Kozlowski
8 * Device nodes common for Samsung Exynos5410/5420/5422/5800. Specific
9 * Exynos 54xx SoCs should include this file and customize it further
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include "exynos5.dtsi"
20 compatible = "samsung,exynos5";
27 usbdrdphy0 = &usbdrd_phy0;
28 usbdrdphy1 = &usbdrd_phy1;
33 compatible = "mmio-sram";
34 reg = <0x02020000 0x54000>;
37 ranges = <0 0x02020000 0x54000>;
40 compatible = "samsung,exynos4210-sysram";
45 compatible = "samsung,exynos4210-sysram-ns";
46 reg = <0x53000 0x1000>;
51 compatible = "samsung,exynos4210-mct";
52 reg = <0x101c0000 0xb00>;
53 interrupt-parent = <&mct_map>;
54 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
58 #interrupt-cells = <1>;
61 interrupt-map = <0 &combiner 23 3>,
65 <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
66 <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
67 <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
68 <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
69 <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
70 <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
71 <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
72 <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
76 watchdog: watchdog@101d0000 {
77 compatible = "samsung,exynos5420-wdt";
78 reg = <0x101d0000 0x100>;
79 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
83 compatible = "samsung,exynos4210-secss";
84 reg = <0x10830000 0x300>;
85 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
88 /* i2c_0-3 are defined in exynos5.dtsi */
89 hsi2c_4: i2c@12ca0000 {
90 compatible = "samsung,exynos5250-hsi2c";
91 reg = <0x12ca0000 0x1000>;
92 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
98 hsi2c_5: i2c@12cb0000 {
99 compatible = "samsung,exynos5250-hsi2c";
100 reg = <0x12cb0000 0x1000>;
101 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
102 #address-cells = <1>;
107 hsi2c_6: i2c@12cc0000 {
108 compatible = "samsung,exynos5250-hsi2c";
109 reg = <0x12cc0000 0x1000>;
110 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
111 #address-cells = <1>;
116 hsi2c_7: i2c@12cd0000 {
117 compatible = "samsung,exynos5250-hsi2c";
118 reg = <0x12cd0000 0x1000>;
119 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
120 #address-cells = <1>;
126 compatible = "samsung,exynos5250-dwusb3";
127 #address-cells = <1>;
131 usbdrd_dwc3_0: dwc3@12000000 {
132 compatible = "snps,dwc3";
133 reg = <0x12000000 0x10000>;
134 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
135 phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
136 phy-names = "usb2-phy", "usb3-phy";
140 usbdrd_phy0: phy@12100000 {
141 compatible = "samsung,exynos5420-usbdrd-phy";
142 reg = <0x12100000 0x100>;
147 compatible = "samsung,exynos5250-dwusb3";
148 #address-cells = <1>;
152 usbdrd_dwc3_1: dwc3@12400000 {
153 compatible = "snps,dwc3";
154 reg = <0x12400000 0x10000>;
155 phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
156 phy-names = "usb2-phy", "usb3-phy";
160 usbdrd_phy1: phy@12500000 {
161 compatible = "samsung,exynos5420-usbdrd-phy";
162 reg = <0x12500000 0x100>;
166 usbhost2: usb@12110000 {
167 compatible = "samsung,exynos4210-ehci";
168 reg = <0x12110000 0x100>;
169 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
171 #address-cells = <1>;
175 phys = <&usb2_phy 1>;
179 usbhost1: usb@12120000 {
180 compatible = "samsung,exynos4210-ohci";
181 reg = <0x12120000 0x100>;
182 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
184 #address-cells = <1>;
188 phys = <&usb2_phy 1>;
192 usb2_phy: phy@12130000 {
193 compatible = "samsung,exynos5250-usb2-phy";
194 reg = <0x12130000 0x100>;